JPS5861664A - Josephson circuit chip - Google Patents

Abstract

PURPOSE:To inhibit the hang-up of a circuit at the beginning of power source make, by providing a pi type filter which connects a DC input terminal to an active circuit part on the periphery of an IC chip having a Josephson circuit of DC power source drive system. CONSTITUTION:In the periphery of the IC substrate 1, the power source terminal 22 and earth terminal 21 which carry high currents are provided resulting in the prevention of the malfunction of the Josephson circuit sensitive to the magnetic field. Further, a filter 3 is provided in the neighborhood of the power source input terminal 22, i.e. substrate periphery, and then a power is introduced via an input line 51 and supplied into the active circuit 4 in the substrate via an output line. The concentration is formed in pi type, the alloy wherein Pb or Nb is the main constituent or the superconductive thin film of Nb single substance is used for input/output lines 51, 52 and inductance 6, and the same material is used also for capacities 71, 72. For an element 6, an alloy resistor 8 of Au-In, etc. can be used. A superconductive film for the earth is adhered on the substrate, and the superconductive film applied to patterning is mounted via an SiOx (x=1-2). In this constitution, the input of the Josephson circuit can be maintained at zero potential, and accordingly the hang-up can be inhibited.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit chip using a Josephson device, and particularly to a DC power supply and a DC power supply to a drive circuit.
The present invention relates to a method for controlling a signal input terminal during power supply.

Conventionally, research and development of Josephson circuits, especially logic circuits, has mainly focused on AC power drive systems. Generally, this drive system supplies power with positive and negative trapezoidal pulses of several hundred megahertz, and is characterized by the fact that the voltage or current becomes zero at the moment of switching between positive and negative. This was done because the logic gates of the logic circuits are basically latching gates, and new calculations cannot be started unless the power is turned off to zero. With this AC power supply drive method, the power is turned on with the same phase to the logic gates inside and outside the chip.

It has the major disadvantage of complicating the chip design, such as having to turn it off, and installing a thin film transformer etc. inside the chip to supply power, and standardizing the length of the output for each logic circuit block. was. It was necessary to design a system to roughly synchronize the power supply clocks for all chips, and it was possible to do so by using a large number of Josephson circuit chips! ! ! , which caused significant difficulties in configuring the aircraft.

On the other hand, among the Josephson circuits, a luffle circuit (which can be driven by a DC power supply) is known. It is also known that circuits using these DC power sources and drive systems are required as latch circuits in the logic gates of the above-mentioned AC power sources and decoders in memory circuits. These are mainly used as 7-lips and 70-tubs, and are useful for constantly holding signals. Furthermore, in the future, it is predicted that all general logic gates themselves will be constructed of the above-mentioned DC power supply driven circuits. This is the case with AC power-driven latching gates, as mentioned above.

The power supply system has a significant design complexity, and the power supply system on the chip is a factor that reduces the degree of integration, and the latching gate itself also responds incorrectly to erroneous signal (hazard) input, causing calculation problems. This is because there is a high probability that errors will occur in the results.

However, even in the case of DC power drive system 1 (Uffle circuit), the Josephson junction itself that constitutes a part of the circuit essentially functions in a latching operation mode, so a high peak value is not present in the power supply system. If a pulse gets mixed in or an abnormal pulse is superimposed on the signal input, there is a risk that the circuit will hang up, which is an insensible state.In general, this hangup occurs when all the Josephson junctions in the circuit are connected. This means that the device is latched into a state with a finite voltage.This hang-up is likely to occur during the initial stage of power supply when power is applied to the chip.

The purpose of the present invention is mainly to overcome the above-mentioned difficulties.
Josephson circuit chip to provide.

Examples of the present invention will be described in detail below. FIG. 1 shows a portion of a substrate for forming an integrated circuit using Josephson devices. There are bonding pads or CCBs (Controlled Collapses) around the substrate 1.
e13onding) A plurality of connection terminals 2 such as pads are provided. Most of these connection terminals are provided around the substrate 1. These connection terminals are roughly divided into those used for signal input/output and those used for power supply or grounding. In FIG. 1, 21 is a ground terminal, 22 is a power input terminal, and 23, 24, and 25 are circuit input terminals. In general, power lines can have noises with large peak values superimposed on them due to interference (noise) from other circuits. Because it generates
It is preferable to provide grounding terminals 21 and 9. This is because Josephson devices are generally extremely sensitive to magnetic fields, and a pulsed or static magnetic field emitted from a power supply line can act as an interference signal and cause errors in the operation of the Josephson circuit. In order to block such interference signals caused by the power supply line near the board, in the embodiment shown in FIG.
That is, it is installed near the outer periphery of the substrate. Power is introduced into this filter circuit from a power input terminal through an input line 51, and power is supplied to other active circuit sections 4 in the board through an output line 52. Here, the π-type filter connection shown in FIG. 2 is used for the connection of the filter circuit. Input line 51. The inductance 6 and the output line 52 are made of superconducting thin film material,
For example, an alloy containing lead as a main component, an alloy containing niobium as a main component, or niobium alone is used. The same superconducting material is also used for the capacitances 71 and 72.

- A significant difference from the π-type filter circuit, which is known as an ordinary electric circuit, is that these common ground lines (the shaded area in Figure 2) are constructed from a planar superconducting film. In any sense, the ground side electrode with a capacitance of 71°72 is constituted by the superconducting film itself, which serves as a ground plane, such as niobium. The manufacturing procedure for these π-type filter circuits is to first deposit a superconducting film as a ground plane on a substrate, then deposit an insulating film such as s1Qx (x = 1 to 2), and then The method is to place gold, V4, made of patterned superconducting material. Patterning can be performed by generally known glue-off techniques, and depending on the patterning, the input line 51, output line 52, inductance 6, capacitance 71, 72 . can be created on absolute #& membranes.

It is clear that this π-type filter circuit has the function of removing unnecessary pulse interference signals and high-frequency signals superimposed on the power supply line and intruding into the power supply line, and is especially suitable for Josephson devices in circuits that dislike unnecessary pulse input signals. It becomes possible to stably supply DC power. More importantly, according to the above configuration, when power is applied to the chip (referred to as power-on), the inrush pulse of the power supply itself is converted into one with a gradual rise. The circuit itself has the characteristic of being able to be prevented from going up due to this start-up standby power pulse.

The aforementioned π-type filter circuit (Fig. 2) uses superconducting materials as all conductor metal materials.

As shown in FIG. 3, a thin film metal material having a finite resistance value, such as an Au-Iu gold alloy G
A resistor 8 made of e-CLI alloy or the like may be used.

Assuming that the Josephson circuit itself hangs up due to the start-up standby power pulse, and if we turn the power back on again, when the power to the chip is cut off (hereinafter referred to as power-off), the potential of the power supply It is well known that the hang-up of a Josephson circuit is generally resolved when It is preferable to use superconducting components that can be made to have a much lower potential than the above.

As a device for this purpose, as shown in Figure 4, the power input terminal 2
A Josephson junction 9, marked with an X symbol, was installed at 2. The number of junctions may be one or a plurality connected in series. However, the other end of this joint 9 is connected to the ground plane. As is well known, a Josephson junction can pass a superconducting current up to a certain current value Im, and at this time the potential across the junction is zero. In this sense, the power supply terminal can be maintained at "superconducting zero potential" immediately before power-on. However, when power starts to be supplied and the current flowing through the junction 9 exceeds 1 m, the junction 9 itself begins to exhibit a finite resistance. It is preferable to connect the junctions in series as shown in FIG. 4 because the resistance value at this time increases by the number of junctions. In FIG. 4, a magnetic flux coupling input line 10 is further provided at the junction 9, so that when power starts to be supplied, a current flows through the input line 10 at the same time to generate magnetic flux.

The current to this input line is inductance 61, 62.

We started supplying it from the middle of the process. In this way, Im becomes smaller due to the influence of magnetic flux, and the junction 9 can quickly transition from zero potential to a state with finite resistance. (
In this sense, the magnetic flux coupling input line IO is not necessarily a main component of the present invention, but is merely a highly preferable condition. ) Next, we will discuss how the junction 9 can return to the "superconducting zero potential" at power-off timing. When the power is cut off, the current flowing in the direction 22→61→62 in FIG. 4 decreases. This current may gradually decrease and approach zero, or it may approach zero while oscillatingly returning to the original direction where it flowed in the opposite direction. In any case, from the moment when the current approaches zero and the current flowing through the junction 9 becomes smaller than the junction return current I m1m, the junction 9
returns to the "superconducting zero potential" after several ps.

Even if the current oscillates after this, the oscillation stops within about 1 ops as long as the amplitude does not exceed im.

As a result, the power input terminal 22 can stably maintain a "superconducting zero potential".

In the embodiment shown in FIG. 5, a delay circuit and signal input terminal control means are newly installed in addition to those shown in FIG.

This is to enable the signal input terminal of the integrated circuit to be held at superconducting zero potential at the initial stage of power-on. For this purpose, the circuit input terminals 23°24.25. Joseph non junctions 27, 28 and 29 as shown in Figure 5, respectively.
and grounded the other end. The operation of the Josephson junctions 27, 28 and 29 is the same as that of the junction 9 in the terminal 22. However, this junction requires a manual magnetic flux coupling method, and the maximum superconducting tunnel direct current Im of this junction is set to zero after a certain time delay from the initial power-on. If you do this.

The junction is forced to have a nonlinear resistance and does not exhibit superconductivity.

In order to reduce this process to zero, we made a jaw-heavy non-junction 27.
, 28 and 29. This control signal has a resistance of 89 degrees, an inductance of 69 degrees, a capacitance of 79 degrees. connected to a delay circuit consisting of A resistor 89 is used to adjust the magnitude of the control current.

The operation of the signal input end control means configured as described above is as follows. For example, the junction loses superconductivity when the value of the current that is shunted to the junction among the signal currents arriving at the terminal 23 exceeds Im, or when the input end control line control iIt & current is applied. When no control current is applied, even if a small pulse-like signal arrives at the terminal 23, the terminal 23 remains at superconducting zero potential. Due to this protective effect, the input of the Josephson circuit can be maintained at zero potential, and various signals will not arrive at the input end of the circuit at the time when the supply power starts to be supplied to the circuit.

Therefore, there is an effect of preventing the Josephson circuit from causing a hang-up. The design is such that the control current described above is applied to the terminal 23 after the supply power has been sufficiently applied and a steady state has been reached, creating a state in which the circuit can receive input, so that the circuit will not hang up at the beginning of power-up. You will be able to avoid doing so.

As described above, according to the present invention, it is possible to prevent circuit hang-up that may occur at the initial stage of power-on, especially in a Josephson circuit driven by a DC power supply.

[Brief explanation of the drawing]

Figure 1 is a plan view showing one embodiment of the present invention, Figures 2 and 3 are
Each figure is a circuit diagram showing an example of the part 3 in FIG. 1, and FIGS. 4 and 5 are circuit diagrams showing other examples. 3... π-type filter circuit, 4... Active circuit section, 6
゜61.62.64...Inductance, 8...Resistance, 9.27,28.29...Joseph non-junction, 2
2...α source input terminal, 23, 24.25... Circuit input terminal, 30... Input end control line, 71, 72.79...
··capacitance. Agent Patent Attorney Toshiyuki Usuda'! +7 Straw map

Claims (1)

[Scope of Claims] 1. A power input terminal for externally connecting a DC power source in a circuit chip including an active circuit section configured using a Josephson device. π disposed near the outer periphery of the integrated circuit chip and connecting the power input terminal and the active circuit section to supply power to the active circuit section.
2. A Josephson circuit chip characterized in that the conductor portion of the diamond-type filter circuit described in claim 1 is made of a superconducting thin film material. 3. A Josephson circuit chip, characterized in that a part of the π-type filter circuit described in claim 1 is made of a thin film resistive material having finite resistance. 4. Claim 1 A Josephson circuit chip characterized by having 11 or more Josephson junctions in series between the power supply terminal and ground as described in Item 1. 5. A circuit including an active circuit configured using a Josephson device. In the chip, a power input terminal connects a base current source to the active circuit, a circuit input terminal connects an input signal to the active circuit, a delay circuit connected to the power input terminal, and a ground between the input terminal and the ground. a Josephson junction connecting between the Josephson junction; and an input end control line disposed near the Josephson junction for switching the Josephson junction to a voltage state according to the output of the delay circuit.