JPS5856353A - アイソレ−シヨンの形成方法 - Google Patents

アイソレ−シヨンの形成方法

Info

Publication number
JPS5856353A
JPS5856353A JP15460881A JP15460881A JPS5856353A JP S5856353 A JPS5856353 A JP S5856353A JP 15460881 A JP15460881 A JP 15460881A JP 15460881 A JP15460881 A JP 15460881A JP S5856353 A JPS5856353 A JP S5856353A
Authority
JP
Japan
Prior art keywords
photo
resist film
groove
film
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15460881A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0358179B2 (enrdf_load_stackoverflow
Inventor
Junji Sakurai
桜井 「あ」治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15460881A priority Critical patent/JPS5856353A/ja
Publication of JPS5856353A publication Critical patent/JPS5856353A/ja
Publication of JPH0358179B2 publication Critical patent/JPH0358179B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
JP15460881A 1981-09-29 1981-09-29 アイソレ−シヨンの形成方法 Granted JPS5856353A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15460881A JPS5856353A (ja) 1981-09-29 1981-09-29 アイソレ−シヨンの形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15460881A JPS5856353A (ja) 1981-09-29 1981-09-29 アイソレ−シヨンの形成方法

Publications (2)

Publication Number Publication Date
JPS5856353A true JPS5856353A (ja) 1983-04-04
JPH0358179B2 JPH0358179B2 (enrdf_load_stackoverflow) 1991-09-04

Family

ID=15587895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15460881A Granted JPS5856353A (ja) 1981-09-29 1981-09-29 アイソレ−シヨンの形成方法

Country Status (1)

Country Link
JP (1) JPS5856353A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5192706A (en) * 1990-08-30 1993-03-09 Texas Instruments Incorporated Method for semiconductor isolation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53108773A (en) * 1977-03-04 1978-09-21 Matsushita Electric Ind Co Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53108773A (en) * 1977-03-04 1978-09-21 Matsushita Electric Ind Co Ltd Production of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5192706A (en) * 1990-08-30 1993-03-09 Texas Instruments Incorporated Method for semiconductor isolation

Also Published As

Publication number Publication date
JPH0358179B2 (enrdf_load_stackoverflow) 1991-09-04

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