JPS5856177B2 - magnetic bubble storage device - Google Patents

Description

[Detailed description of the invention] The present invention relates to magnetic bubble storage devices.

A magnetic bubble storage device using a magnetic bubble chip composed of a minor loop and a major loop is well known.

The stored information group is shifted within the minor loop by the action of a rotating magnetic field, and during read/write, a predetermined stored information group is transferred out to the major loop.

Then split the magnetic bubble in the major loop (when reading)
, erase or generate (when writing).

The stored information in the major loop is further shifted and transferred to its original position in the minor loop.

It is well known that magnetic bubbles can constitute a nonvolatile storage device because the stored information (magnetic bubbles) is not destroyed if the power is turned off while the rotating magnetic field for transferring the magnetic bubbles is stopped.

However, if the power is cut off while a rotating magnetic field is applied, the stored information generally no longer corresponds to the data address, resulting in the stored information being destroyed.

The conventional method for restarting without destroying stored information due to a power outage, etc. is that when a monitoring circuit that monitors the power supply voltage is activated, it moves the minor loop to a specific position (minor address counter output) and then stop the rotating magnetic field, or transfer out the memory information group and similarly step to a specific position in the minor loop and then stop the rotating magnetic field. ing.

It is conceivable to install a power supply capacitor and use the electric charge of this capacitor to supply the current required for the monitoring circuit to operate and advance the magnetic bubble to a specific position until the rotating magnetic field stops, but if the scale of the device is large, the power consumption will also be high. Since it is large, a large capacitance capacitor is required, which poses problems in terms of mounting space and maintenance.

In addition, if the monitoring circuit is stopped in a short time (10 to 100 μS) after operation in order to reduce the power supply capacitor, information remains in the measure loop, so to prevent information from being destroyed, it is necessary to Complex control is required and the number of control circuits increases.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art described above and to provide a magnetic bubble storage device that makes it possible to stop the rotating magnetic field in a short time.

The present invention has storage means for storing the contents of a minor address counter that counts the number of bits in the minor loop and the contents of a major address counter that counts the number of bits in the major loop.

By having such a storage means, it is possible to memorize the contents of each address counter in the event of an abnormality such as a power outage, so it is possible to stop the magnetic bubble immediately instead of advancing it to a specific position and stopping. Therefore, the mounting space for power supplies etc. is also reduced.

In addition, since operation can be resumed by setting the contents of the storage means in each address counter, control becomes extremely easy.

The figure shows an embodiment of the invention.

1 is a bubble memory module, the bit number of the minor loop is indicated by a minor address counter 10, the step of the minor address counter 10 is given to a start/stop instruction circuit 11, and a rotating magnetic field is generated by a coil and a drive circuit 2. Drive the coil to.

Therefore, the minor address counter 10 normally advances in synchronization with the rotating magnetic field.

The number of bits in the major loop is the major address counter 16.
shows.

An interface circuit 21 instructs the read/write instruction circuit 9 to perform read/write, and sets the minor part of the address in the data address register 6 and the major part of the address in the data address register 7.

These are set when the input prohibition circuit 17 does not indicate input prohibition, that is, when the match holding circuit 12 (described later) does not indicate a match state.

The interface circuit 21 is further connected to the data register 8, and sets data to be written in the data register 8 or takes in data read into the data register 8.

When read or write is instructed by the read/write designation circuit 9, the minor address counter 10 starts counting, and the minor address match circuit 13 compares it with the address register 6.

When the match circuit 13 detects a match, it gives a signal to the match holding circuit 12 and instructs the transfer circuit 3 to transfer out from the minor loop to the major loop.

The major address counter 16 starts counting in response to the output of the match holding circuit 12.

The contents of the major address counter 16 are compared with the contents of the address register 7 in the major address match circuit 14,
The coincidence signal is given to the bubble generation/elimination/division circuit 4.

This circuit 4 divides magnetic bubbles (at the time of reading), erases or generates them (at the time of writing).

Write data is written from the data register 8 to the bubble memory module via this circuit 4.

The read data is read from the sense circuit 5 to the data register 8.

When the content of the major address counter 16 becomes equal to the number of bits in the major loop, the transfer circuit 3 is activated to transfer the information from the major loop to the minor loop, and at the same time, the major address counter 16 is stopped. access is terminated.

15 indicates a decoder. In the figure, 19 is Combark (
or an inverter), and the input power supply voltage is distributed from this converter 19 to the necessary parts in the figure.

Reference numeral 20 denotes a power supply monitoring circuit, and when this circuit 20 detects an abnormality such as disconnection of the input power supply voltage from the converter 19, it sends out a power supply abnormality signal.

When the power abnormality signal is applied to the address counters 10 and 16, each counter stops advancing and acts to stop the rotating magnetic field.

If the contents of the stop address storage circuit 18 are changed in synchronization with the increment of the address counters 10 and 16 or depending on the timing after the increment, the increment of the address counters 10 and 16 will be changed when the power abnormality signal is sent. Since the rotating magnetic field stops, the contents of the address counter when the rotating magnetic field stops are stored.

Note that only the contents of the minor address count 10 may be stored when the transfer-out is not performed.

Further, a configuration may be adopted in which writing to the stop address storage circuit 18 is performed only when the monitoring circuit 20 operates.

Incidentally, Japanese Patent Publication No. 39-24502 states that by using a device that immediately detects a power outage, a non-destructive storage device, etc., in the event of a power outage, necessary destruction within the computer can be carried out before the output of the power supply device loses stability. Discloses an invention relating to an electronic computer having a computation protection operation in which the contents of the destructive memory circuit are stored in the non-destructive memory device, and after a power outage is restored, the content is returned to the original destructive memory device to continue calculation. has been done.

However, in this prior invention, in order to simply transfer the contents of a destructive storage device to a non-destructive storage device in the event of a power outage,
In addition to requiring a sufficient power supply circuit to support the required time, there is a concern that the control circuit at the start of operation will be complicated because the stored contents will be retransferred after recovery.

In the present invention, since the contents are written to the memory circuit 18 every time necessary information (minor counter, etc.) changes, a power supply capacitor etc. is not required when the power is cut off, and the control circuit when starting the operation is simplified. effective.

The operation is restarted after the contents of the address storage circuit 18 are set in each counter according to the resolution of the abnormal condition.

Furthermore, if the memory circuit 18 is constituted by a non-volatile memory element such as a core or some type of EP ROM, the power source of the memory circuit 18 can be taken into consideration, and damage can be further prevented.

The number of bits of bubble chips currently being considered is about several hundred to M bits, and the number of bits in the minor loop and the number of bits in the major loop of these chips are about several hundred to IOK. The number of memory bits may be 100 or less, and there is almost no effect on the size, cost, etc. of the entire device.

In addition, even when stopping the rotating magnetic field under normal conditions, the time from the stop request signal to stopping is shorter than when stopping the rotating magnetic field with a specific output of the minor address counter, so power consumption can be reduced. .

[Brief explanation of drawings]

The figure is a block diagram showing one embodiment of the present invention. 1... Bubble memory module, 2...
・Coil drive circuit, 3...Transfer circuit,
4...Bubble generation, erasure, division circuit, 5...
...Sense circuit, 6゜7...Data address register, 8...Data register, 9...
... Read/write designation circuit, 10... Minor address counter, 11... Start, stop instruction circuit, 12... Match holding circuit, 13゜1
4...Address match circuit, 15...
Decoder, 16... Major address counter,
17... Human power prohibition circuit, 18... Stop address storage circuit, 19... Converter,
20...Power supply monitoring circuit, 211...
interface circuit.

Claims (1)

[Claims] 1. A magnetic bubble storage device using a magnetic bubble chip composed of a minor loop and a major loop,
non-volatile storage means for storing the contents of a minor address counter that counts the number of bits in the minor loop and the contents of a major address counter that counts the number of bits in the major loop; A magnetic bubble storage device characterized by being provided with a power supply monitoring circuit for stopping advancement. 2. The storage means according to claim 1 stores the contents of the minor address count when the stored information group has not been transferred out from the minor loop to the major loop, and stores the contents of the major address count when the stored information group has been transferred out. A magnetic bubble storage device characterized in that it also stores the contents of.