JPH10240633A - Memory system and memory card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten data write time, to eliminate the number of times of rewrite to a specified area and to eliminate the destruction of data even by sudden power disconnection from the outside. SOLUTION: Write data are tentatively stored in a RAM 302 and then, written to a flash memory 301. An access history from a host system is stored in a memory 304, and based on the information, the data of an area with the large number of times of access are arranged not inside the flash memory but inside the RAM 302. After the power disconnection from the outside, an internal circuit is operated by an internal auxiliary power source 303 and the erasure operation of the flash memory 301 and the write to the flash memory 301 of the data arranged inside the RAM 302 are performed. The auxiliary power source 303 is charged while power is supplied from the outside.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for accessing and erasing a flash memory in a memory system having a flash memory as a main memory.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram showing an example of a conventional memory system using a flash memory as a main memory.

As shown in FIG. 4, in this example, the present memory system uses a flash memory 401 as a storage element.
You are using As an interface with the host system, a control circuit 407 is provided between the host interface (hereinafter abbreviated as host I / F) 406 and the flash memory 401 to read and write data from the host system to the memory system. This is converted into an operation on the memory 401. When the host system writes data to the memory system, the write data enters the control circuit 401 from the host system through the host I / F 406. The control circuit 401 has been erased,
A writable area is found in the flash memory 401, and the write data is written to the area. After the writing to the flash memory 401 is completed, the control circuit 401 checks whether there is an area to be erased in the flash memory 401, and if there is an area to be erased, performs an erasing operation on the flash memory 401. .

FIG. 5 is a configuration diagram showing another example of a conventional memory system using a flash memory as a main memory.

As shown in FIG. 5, in this example, the present memory system uses a flash memory 501 as a storage element.
You are using A control circuit 507 is provided between the host I / F 506 and the flash memory 501 as an interface with the host system, and converts data read and write operations from the host system to the memory system into operations on the flash memory 501. ing. RA
M502 is connected to the control circuit 501. When the host system writes data to the memory system, the write data is transmitted from the host system to the host I / F 50.
6, and enters the control circuit 507. The control circuit 507 writes the data to the RAM 502 once, and thereafter, the control circuit 507 finds an erased and writable area in the flash memory 501 and writes the write data to the area. After the writing to the flash memory 501 is completed, the control circuit 501 checks whether there is an area to be erased in the flash memory 501,
If there is an area to be erased, the flash memory 50
An erase operation to 1 is performed.

[0006]

However, in the above-mentioned prior art, the read time of the flash memory is short, but the write time is as long as 10 times or more the read time. However, it takes a long time.

For this purpose, an R for temporary storage of write data is used.
In the case of having the AM, if the power of the memory system is cut off by the host system or a third party before the write data temporarily stored in the RAM is completely written to the flash memory, the write data is lost. Had.

In addition, when writing data to be written to the flash memory, an erasing operation is performed in advance, or writing is performed on an already erased area, and thereafter, an erasing operation is performed. The above-mentioned erasing operation time is longer than the writing time, and further has the disadvantage of lowering the access speed to the memory system.

For this purpose, there is a case where an erasing operation is performed in a concentrated manner during a period in which there is no access to the memory system. In this case, during the erasing period, the host system or a third party supplies power to the memory system. Has a drawback that the erasing operation is invalidated when the is disconnected.

In addition, the number of times of erasing and writing is limited to about 100,000 to 1,000,000 times in a flash memory. In a usage in which the host system frequently rewrites data in the same area, the The disadvantage is that the system becomes unusable or at least the area becomes unusable.

The present invention has been made in order to solve such a problem, and has a RAM for temporarily storing write data to a flash memory.
The method of shortening the writing time from the host system to the memory system and the provision of the auxiliary power supply allow the operation to be continued even after the power supply to the memory system is cut off during the writing and erasing operation to the flash memory. It is an object of the present invention to provide a method for improving the limit number of times of writing and erasing data in a specific area by having a memory for storing an access history from a host system and an access history from a host system.

[0012]

According to a first aspect of the present invention, there is provided a memory system including at least a flash memory as a data storage element, a RAM for auxiliary storage or temporary storage of data, and a main power supply. And an auxiliary power source.

According to a second aspect of the present invention, there is provided a memory system including at least a flash memory as a data storage element and an R memory for auxiliary storage or temporary storage of data.
An AM and a memory for storing a location in the flash memory accessed in the past as an access history, and by referring to the access history, data in a specific flash memory is copied into the RAM. , Not to a flash memory, but to data existing in the RAM.

According to a third aspect of the present invention, there is provided a memory system comprising at least a flash memory as a data storage element and an R memory for auxiliary storage or temporary storage of data.
An access memory for storing a location in the flash memory accessed in the past as an access history and a chargeable auxiliary power supply from a main power supply, and referring to the access history to store data in a specific flash memory in the RAM.
The access to the specific position is not to the flash memory, but to the data present in the RAM, and after the main power is turned off, the data in the RAM to the specific position is read from the flash memory. It is characterized by writing to a specific position.

According to a fourth aspect of the present invention, there is provided a memory system comprising at least a flash memory as a data storage element and a chargeable auxiliary power supply from a main power supply. Range information is stored, and the flash memory is erased based on the information when the access to the flash memory is not longer than a preset time interval or after the main power is turned off.

A memory card according to a fifth aspect of the present invention is characterized in that the shape of the memory system according to the first aspect is a card size.

A memory card according to a sixth aspect of the present invention is characterized in that the shape of the memory system according to the second aspect is a card size.

A memory card according to a seventh aspect of the present invention is characterized in that the shape of the memory system according to the third aspect is a card size.

The memory card according to an eighth aspect of the present invention is characterized in that the shape of the memory system according to the fourth aspect is a card size.

[0020]

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram of a memory system showing one embodiment of the present invention.

As shown in FIG. 1, in this example, the memory system includes a control circuit 10 for controlling the inside of the system.
And a host I / F 106 as means for receiving data and commands from the host system and supplying power from the host system. A flash memory 101 is provided as a main memory element, and a RAM 102 is provided as a memory element for temporarily storing write data. Both memory elements are connected to a control circuit 107.

When the host system reads data stored in the memory system, the flash memory 10 used for the area designated by the host system is used.
The control circuit 107 reads the data in the area in 1 and outputs the data to the host system through the host I / F 106.

When the host system stores data in the memory system, the control circuit 107 receives write data and writes the data to the RAM 102, which has a shorter write time than the flash memory 101. Control circuit 10
7 is RAM after receiving the write data.
If data is read from the flash memory 102 and the write operation from the host system is a new write, the data is written to a designated area of the flash memory 101. If the write operation from the host system is to rewrite the designated area, the control circuit 107 detects the erased area in the flash memory 101, writes the data in this area, and writes the data in the designated area. Is stored as area information to be erased.

The control circuit 107 has a timer, and when the access from the host system has not been performed for a predetermined time or more, the erasing operation of the flash memory 101 is started based on the area information to be erased. If an access is made from the host system during the erasing operation, the erasing operation is stopped and a response is made to the access from the host system.

When power is supplied from the host system, the power of the present system is supplied from the host I / F 106 to the control circuit 107, the flash memory 101, and the RAM 102 via the power supply control circuit 105. Also,
At this time, when the auxiliary power supply 103 needs to be charged, the power supply control circuit 105 charges the auxiliary power supply 103. When the power supply from the host system is cut off, the power supply control circuit 105 detects that the power supply has been cut off, and continues to supply power to the control circuit 107, the flash memory 101, and the RAM 102 using the already charged auxiliary power supply 103. At the same time, it notifies the control circuit 107 that the power supply from the host system has been cut off. Control circuit 1 that received notification
In step 07, if there is any work being performed, the work is continued. After the operation is completed and when the operation is not performed, the flash memory 101 is determined based on the area information to be erased.
Perform the work of erasing. After the end of the erasing operation or when there is no area to be erased, the control circuit 107 notifies the power supply control circuit 105 of the end of the operation, and the power supply control circuit 105 stops supplying power to the control circuit 107, the flash memory 101, and the RAM 102. .

FIG. 2 is a configuration diagram of a memory system showing one embodiment of the present invention.

As shown in FIG. 2, in this example, the memory system includes a control circuit 20 for controlling the inside of the system.
And a host I / F 206 as means for receiving data and commands from the host system and supplying power from the host system. A flash memory 201 is provided as a main memory element, and a RAM 202 is provided as a memory element for temporarily storing write data. Both memory elements are connected to a control circuit 207.
Further, the memory 204 is connected to the control circuit 207.

When the host system reads data stored in the memory system, the control circuit 20 checks whether an area designated as read exists in the RAM 202.
The control circuit 207 reads out the data in the area in the RAM 202 and outputs the data to the host system through the host I / F 206 if the data is present in the RAM 202. If the area designated for writing is not in the RAM 202, the flash memory 201 used for the area designated by the host system is used.
The control circuit 207 reads the data in the area in the area, and outputs the data to the host system through the host I / F 206. After the data output to the host system is completed, the control circuit 207 stores the area information designated to be read from the host system (referred to as read area information) in the memory 204.
To memorize. Thereafter, the control circuit 207 searches the read area information, and if there is a read operation for the same area exceeding the preset number of times, reads the data of the area in the flash memory 201 and reads the data of the area.
Write in the AM 202, then read to the area,
The write operation reads and writes the data in the RAM 202, not in the flash memory 201.

When the host system stores data in the memory system, the control circuit 207 checks whether or not an area designated as a write exists in the RAM 202.
Receives the write data, and writes the data to the RAM 202. If the area designated for writing does not exist in the RAM 202, the control circuit 207 receives the data for writing, and temporarily writes the data to the RAM 202 which has a shorter writing time than the flash memory 201. After receiving the write data, the control circuit 207 reads the data from the RAM 202 and, if the write operation from the host system is a new write, writes the data to the designated area of the flash memory 201. When the write operation from the host system is to rewrite the designated area, the control circuit 207
After erasing a designated area in the flash memory 201, the data is written. After the completion of the data writing, the control circuit 207 writes area information designated by the host system for writing (hereinafter referred to as write area information).
Is stored in the memory 204. Thereafter, the control circuit 207
Searches for the write area information, and if there is a write operation to the same area exceeding a preset number of times, the read and write operations to the area thereafter are performed not to the flash memory 201, RA
Read and write to the data in M202.

FIG. 3 is a configuration diagram of a memory system showing one embodiment of the present invention.

As shown in FIG. 3, in this example, the memory system includes a control circuit 30 for controlling the inside of the system.
And a host I / F 306 as means for receiving data and commands from the host system and supplying power from the host system. A flash memory 301 is provided as a main memory element, and a RAM 302 is provided as a memory element for temporarily storing write data. Both memory elements are connected to a control circuit 307.
Further, a memory 304 is connected to the control circuit 307.

When the host system reads data stored in the memory system, the control circuit 30 checks whether an area designated as read exists in the RAM 302 or not.
The control circuit 307 reads out the data in the area in the RAM 302 and outputs the data to the host system through the host I / F 306 if the data is present in the RAM 302. If the area designated for writing is not in the RAM 302, the flash memory 301 used for the area designated by the host system is used.
The control circuit 307 reads the data in the area in the area, and outputs the data to the host system through the host I / F 306. After the data output to the host system is completed, the control circuit 307 stores the read area information in the memory 304. Thereafter, the control circuit 307 searches the read area information, and when there is a read operation for the same area exceeding a preset number of times, reads the data of the area in the flash memory 301 and
2 and thereafter read and write operations to the area are performed not on the flash memory 301 but on the R
The data in the AM 302 is read and written.

When the host system stores data in the memory system, the control circuit 307 checks whether an area designated as a write exists in the RAM 302, and if the area exists in the RAM 302, the control circuit 307
Receives the write data, and writes the data to the RAM 302. If the area designated for writing is not in the RAM 302, the control circuit 307 receives the data for writing, and temporarily writes the data to the RAM 302, which has a shorter writing time than the flash memory 301. After receiving the write data, the control circuit 307 reads the data from the RAM 302 and writes the data to the designated area of the flash memory 301 if the write operation from the host system is a new write. When the write operation from the host system is to rewrite the designated area, the control circuit 307
Detecting an erased area in the flash memory 301,
The data is written into this area, and the area used so far as the designated area is stored as area information to be erased. After the work is completed, the control circuit 307 stores the write area information in the memory 304. Thereafter, the control circuit 307 searches the write area information, and if a write operation to the same area is performed more than a preset number of times, the read and write operations to the area are performed thereafter by the flash memory 301. , But to the data in the RAM 302.

The control circuit 307 has a timer, and when there is no access from the host system for a predetermined time or more, starts erasing work of the flash memory 301 based on the area information to be erased. If an access is made from the host system during the erasing operation, the erasing operation is stopped and a response is made to the access from the host system.

When power is supplied from the host system, the power of the present system is supplied from the host I / F 306 to the control circuit 307, the flash memory 301, and the RAM 302 through the power control circuit 305. Also,
At this time, when the auxiliary power supply 303 needs to be charged, the power supply control circuit 305 charges the auxiliary power supply 303. When the power supply from the host system is cut off, the power supply control circuit 305 detects that the power supply has been cut off, and continues to supply power to the control circuit 307, the flash memory 301, and the RAM 302 by using the already charged auxiliary power supply 303. At the same time, it notifies the control circuit 307 that the power supply from the host system has been cut off. Control circuit 3 that received notification
In step 07, if there is any work being performed, the work is continued. After the end of the operation and when the operation is not performed, the control circuit 307 determines whether or not the R is in the flash memory 301 based on the read area information and the write area information.
Among the data written in the AM 302, data rewritten by the host system is detected, and a write operation is performed on an area in the flash memory 301 where the data is to be written. After the work or RAM
If there is no data to be written to the flash memory in the memory 302, the flash memory 301 is erased based on the area information to be erased. After completion of the erasing operation or when there is no area to be erased, the control circuit 30
7 notifies the power control circuit 305 of the end of the work, and the power control circuit 305
Then, the power supply to the RAM 302 is stopped.

FIGS. 1, 2 and 3 show examples of a memory system according to the present invention. In these examples, a memory card obtained by changing the device shape into a card type also performs the same operation as described above. .

[0038]

As described above, according to the memory system and the memory card of the present invention, there is an effect that the data writing time is short and the data is not lost even if the power supply from the outside is cut off. . In a system that frequently rewrites data in a specific area, the memory system and the memory card of the present invention have an effect of eliminating the number of rewrites.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a memory system according to an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a memory system according to an embodiment of the present invention.

FIG. 3 is a configuration diagram showing a memory system according to an embodiment of the present invention.

FIG. 4 is a configuration diagram showing a conventional memory system.

FIG. 5 is a configuration diagram showing a conventional memory system.

[Explanation of symbols]

101, 201, 301, 401, 501: Flash memory 102, 202, 302, 502: RAM 103, 303: Auxiliary power supply 204, 304: Memory 105, 305: Power supply control circuit 106, 206, 306, 406, 506: Host Interface 107, 207, 307, 407, 507: Control circuit

Claims (8)

[Claims] 1. A memory system comprising at least a flash memory as a data storage element, a RAM for auxiliary storage or temporary storage of data, and a chargeable auxiliary power supply from a main power supply. 2. An access history comprising at least a flash memory as a data storage element, a RAM for auxiliary storage or temporary storage of data, and a memory for storing a previously accessed location in the flash memory as an access history. The data in a specific flash memory is copied into the RAM by referring to the RAM, and the access to the specific position is performed by accessing data existing in the RAM, not to the flash memory. system. 3. A flash memory as a data storage element, a RAM for auxiliary storage or temporary storage of data, a memory for storing a location in the flash memory accessed in the past as an access history, and charging from a main power supply. Comprising a possible auxiliary power supply, having data in a specific flash memory in the RAM by reference to the access history, and accessing the specific position,
A memory system which accesses data existing in the RAM, not to a flash memory, and writes data in the RAM to the specific position to the specific position in the flash memory after a main power supply is turned off. 4. A flash memory as a data storage element and a chargeable auxiliary power supply from a main power supply, storing at least one or a plurality of range information to be erased in the flash memory, A memory system wherein an erasing operation of a flash memory is performed based on the information when access is not longer than a preset time interval or after a main power supply is cut off. 5. A memory card according to claim 1, wherein said memory card has a shape of a card size. 6. A memory card according to claim 2, wherein said memory card has a shape of a card size. 7. The memory card according to claim 3, wherein the shape is a card size. 8. The memory card according to claim 4, wherein the shape is a card size.