JPS5854497B2 - A method to increase the gettering effect due to internal defects in semiconductor substrates - Google Patents
A method to increase the gettering effect due to internal defects in semiconductor substratesInfo
- Publication number
- JPS5854497B2 JPS5854497B2 JP9604180A JP9604180A JPS5854497B2 JP S5854497 B2 JPS5854497 B2 JP S5854497B2 JP 9604180 A JP9604180 A JP 9604180A JP 9604180 A JP9604180 A JP 9604180A JP S5854497 B2 JPS5854497 B2 JP S5854497B2
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- defects
- temperature
- internal defects
- gettering effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000007547 defect Effects 0.000 title claims description 34
- 238000000034 method Methods 0.000 title claims description 21
- 230000000694 effects Effects 0.000 title claims description 19
- 238000005247 gettering Methods 0.000 title claims description 8
- 239000000758 substrate Substances 0.000 title claims description 7
- 239000004065 semiconductor Substances 0.000 title claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 48
- 239000001301 oxygen Substances 0.000 claims description 19
- 229910052760 oxygen Inorganic materials 0.000 claims description 19
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 17
- 239000012298 atmosphere Substances 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 238000001556 precipitation Methods 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 11
- 230000007423 decrease Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000002244 precipitate Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 206010050031 Muscle strain Diseases 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002926 oxygen Chemical class 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【発明の詳細な説明】
本発明は半導体基板の内部欠陥によるゲッタリング効果
を増大させる方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for increasing the gettering effect due to internal defects in a semiconductor substrate.
シリコンウェーバの表面やエピタキシアル膜に発生する
微小欠陥は、デバイスの電気的特性を悪化させることが
よく知られてかり、この微小欠陥を最小限に抑制するこ
とが素子の歩留り向上につながっている。It is well known that micro defects that occur on the surface of silicon wafers and epitaxial films deteriorate the electrical characteristics of devices, and minimizing these micro defects leads to improved device yields. .
この微小欠陥を発生させる原因としては、拡散速度の大
きい重金属の汚染が考えられており、種々の抑制方法が
施され、また提案されている。Contamination with heavy metals, which have a high diffusion rate, is thought to be the cause of the occurrence of these microdefects, and various methods of suppressing this have been implemented or proposed.
その抑制方法としては、現在市販のウェーバではサンド
ブラスト等による裏面歪層けが主であるが、この他にウ
ェーバの内部欠陥を利用したイントリンシックゲッタリ
ング効果（以下ＩＧ効果と称す）、イオン注入による歪
層の形成、Ｓｉ３Ｎ４膜による界面応力の導入、レーザ
による裏面歪層の形成などが実行又は提案されている。The main methods of suppressing this problem are the back side strain layer damage caused by sandblasting etc. in currently commercially available wafers, but other methods include the intrinsic gettering effect (hereinafter referred to as the IG effect) using internal defects of the wafer, and the distortion caused by ion implantation. Formation of a layer, introduction of interfacial stress using a Si3N4 film, formation of a back strain layer using a laser, etc. have been implemented or proposed.
本発明者らはＩＧ効果の有効性に着目し、ウェーバに熱
処理を施すことにより、エピタキシアル膜中の微小欠陥
を大幅に低減することができた（特願昭５４−１４４１
８３号参照）。The present inventors focused on the effectiveness of the IG effect, and by applying heat treatment to the wafer, they were able to significantly reduce micro defects in the epitaxial film (Japanese Patent Application No. 54-1441
(See No. 83).
ＩＧ効果はウェーバを熱処理することにより、過飽和な
酸素が点欠陥のところに析出し、その結果基板内部に５
ｉ０２ 析出物やそれから発生する転位、積層欠陥な
どが形成され、その歪応力が微小欠陥を吸収するもので
ある。The IG effect is caused by heat treatment of the wafer, which causes supersaturated oxygen to precipitate at point defects, resulting in the formation of 5% oxygen inside the substrate.
i02 Precipitates, dislocations generated therefrom, stacking faults, etc. are formed, and their strain stress absorbs minute defects.
しかしながら、この内部欠陥はその後の工程において高
温熱処理を施すと縮少又は消減し、多くの完全転位は原
子の上昇運動によって消減すること、また微小な積層欠
陥は完全転位ループに構造変換し、■Ｇ効来が低下する
ことが分ってきた。However, these internal defects are reduced or eliminated by high-temperature heat treatment in subsequent steps, and many complete dislocations are eliminated by the upward movement of atoms, and minute stacking faults are structurally transformed into complete dislocation loops. It has been found that G efficacy decreases.
ナしてて旦高温熱処理により内部欠陥が縮少又は消滅す
ると、次いで単一熱処理を施しても、酸素の析出したが
って内部欠陥の発生はほとんどみられないことも分って
きた。It has also been found that once internal defects are reduced or eliminated by high-temperature heat treatment, even if a single heat treatment is subsequently performed, oxygen precipitation and, therefore, the generation of internal defects is hardly observed.
シリコンのＩＣデバイスでは１２００℃前後の高温熱処
理プロセスを用いることが多く、バイポーラの埋込工程
やＣ−ＭＯＳのＰウェル押込工程では不可欠なプロセス
である。Silicon IC devices often use a high-temperature heat treatment process of around 1200° C., which is an essential process in the bipolar embedding process and the C-MOS P-well embedding process.
またＩＧ効果を利用する場合には、あらかじめウェーバ
を高温熱処理することにより表面に無欠陥層を形成する
ことがよく行われている。Furthermore, when the IG effect is utilized, it is common to form a defect-free layer on the surface by subjecting the wafer to high-temperature heat treatment in advance.
また、本発明者らの研究によると、ドナーキラー処理を
施したウェーバに、高温熱処理を施さずに直接後述する
ような二段階熱処理を施すと、ウェーバの表面に１で高
密度の積層欠陥や微小析出物が発生することが分ったの
で、あらかじめウェーバに高温熱処理を施すことはＩＧ
効果を適用する場合には極めて重要である。In addition, according to research by the present inventors, when a two-step heat treatment as described below is directly applied to a wafer that has been subjected to donor killer treatment without high-temperature heat treatment, a high density of stacking faults occurs on the surface of the wafer. It has been found that micro precipitates are generated, so it is recommended that the webber be subjected to high temperature heat treatment in advance.
This is extremely important when applying effects.
本発明者らは高温熱処理後に二段階熱処理を施すことに
より内部欠陥を生成し、■Ｇ効果をもたらすことができ
た（特願昭５５−７１７５３参照）。The present inventors were able to generate internal defects by performing a two-step heat treatment after high-temperature heat treatment, thereby producing the ``G'' effect (see Japanese Patent Application No. 71753/1983).
しかしながら、第１表に示すように二段階熱処理後の格
子間酸素濃度の減少量、つ捷り内部欠陥の発生の程度
は高温熱処理を施さずに、直接二段階熱処理を施した場
合よりは小さい。However, as shown in Table 1, the amount of decrease in interstitial oxygen concentration and the degree of occurrence of internal defects after two-step heat treatment are smaller than when direct two-step heat treatment is performed without high-temperature heat treatment. .
したがってＩＧ効果は完全であるとはいい難い。Therefore, it is difficult to say that the IG effect is perfect.
これは高温熱処理を施すことにより、臨界サイズ以上の
微小欠陥のみが成長し、臨界サイズ以下の大部分の微小
欠陥（発生核）は縮少、消減し、次の二段階熱処理では
一部の臨界サイズ以上のもののみが酸素の析出に寄与す
るためである。This is because by performing high-temperature heat treatment, only micro defects larger than the critical size grow, and most micro defects (generated nuclei) smaller than the critical size shrink and disappear, and in the next two-step heat treatment, some of the micro defects grow This is because only particles larger than the size contribute to the precipitation of oxygen.
そのために高温熱処理を施したウェーバにＩＧ効果を有
効にもたらすための熱処理プロセスの改良が必要である
。Therefore, it is necessary to improve the heat treatment process to effectively bring about the IG effect on the wafer subjected to high temperature heat treatment.
本発明はこのような問題を解決し、より強力なＩＧ効果
をもたらすことを目的としてなされたものであり、あら
かじめ１２００℃以上の高温熱処理されたシリコン基板
を乾燥酸素雰囲気中で、５００℃から出発して、５０〜
１００℃毎に処理温度を順次上昇させ、最終段階の温度
を８５０℃として多段階処理を行うことにより、ゲッタ
リング効果を増大させる方法を提供するものである。The present invention was made with the aim of solving these problems and bringing about a stronger IG effect.The present invention was made with the aim of solving these problems and bringing about a stronger IG effect. Then, 50~
The present invention provides a method for increasing the gettering effect by performing a multi-step process in which the processing temperature is sequentially increased by 100°C and the final stage temperature is 850°C.
以下実施例を用いて本発明の詳細な説明する。The present invention will be described in detail below using Examples.
実施例 Ｉ
Ｐ形（１１１）ウェーバを酸素を２５％含む窒素雰囲気
中で、１２３０℃、３ｈ熱処理したのち、乾燥酸素雰囲
気中で、５２０℃、６２０℃及び７２０℃の各温度で夫
々１６ｈずつ順次熱処理を施し、格子間酸素濃度の測定
及び誘起される内部欠陥のエツチング観察を行った。Example I A P-type (111) weber was heat-treated at 1230°C for 3 hours in a nitrogen atmosphere containing 25% oxygen, and then sequentially heated at 520°C, 620°C, and 720°C for 16 hours each in a dry oxygen atmosphere. After heat treatment, the interstitial oxygen concentration was measured and the etching of the induced internal defects was observed.
７２０℃の熱処理後では格子間酸素濃度の著しい減少が
みられ、第２表に示すように、高温熱処理を施さずに直
接二段階熱処理を施した値に匹適している。After heat treatment at 720° C., a significant decrease in interstitial oxygen concentration was observed, which, as shown in Table 2, is comparable to the value obtained by direct two-step heat treatment without high-temperature heat treatment.
ｌたエツチング観察から内部欠陥がスワール状に発生し
、その密度は５ Ｘ １０６／ｃｒｄ もあった。The etching observation revealed that internal defects were generated in a swirl shape, and the density was as high as 5 x 106/crd.
第１表に示した高温熱処理後に二段階熱処理を施したウ
ェーバの内部欠陥は２ Ｘ １０’／ｃｒＡ であり
、それに比較すると２桁も増大した。The internal defects of the wafers shown in Table 1 which were subjected to two-step heat treatment after high-temperature heat treatment were 2 x 10'/crA, which increased by two orders of magnitude.
また湿式酸素雰囲気中で、１１４０℃、２ｈ熱処理して
表面欠陥を観察したところ、全くみられずＩＧ効果が十
分起っていることが分った。Further, when the sample was heat-treated at 1140° C. for 2 hours in a wet oxygen atmosphere and surface defects were observed, it was found that no surface defects were observed, indicating that the IG effect was sufficiently occurring.
本発明による内部欠陥の生成メカニズムを考えると次の
ようになるであろう。Considering the internal defect generation mechanism according to the present invention, it will be as follows.
前述したように通常熱処理により生成される欠陥のサイ
ズには臨界サイズがあり、熱処理温度との関係は第１図
のようになっているといわれている。As mentioned above, it is said that there is a critical size for defects generated by normal heat treatment, and the relationship with heat treatment temperature is as shown in FIG.
ところが、熱処理に供せられる出発ウェーバには種々の
サイズの微小欠陥（発生核）が存在している。However, micro defects (nuclei) of various sizes are present in the starting waver to be subjected to heat treatment.
そこで各サイズの密度分布を決定するために、出発ウェ
ーバに各温度で熱処理を施醜生成された欠陥密度分布を
測定すると、模式的にはｙ第２図のようになっているこ
とが分った。Therefore, in order to determine the density distribution of each size, we heat-treated the starting webber at each temperature and measured the defect density distribution, which was found to be schematically as shown in Figure 2. Ta.
このようなウェーバに１２３０℃の高温熱処理を施すと
、サイズの小さいものほど密度が急激に減少し、密度分
布は第３図のようになる。When such a webber is subjected to high-temperature heat treatment at 1230° C., the smaller the size, the more rapidly the density decreases, and the density distribution becomes as shown in FIG.
次いで７２０℃の熱処理を施すと、Ａで示した斜線部分
より上の大きさの欠陥が成長することになる。When heat treatment is then performed at 720° C., defects larger than the shaded area indicated by A will grow.
本発明はウェーバに存在する微小欠陥（発生核）をでき
るだけ多く利用しようとする考えに基くものであり、捷
ず５２０℃で熱処理を施すと、第４図のＢの斜線部分よ
り上の欠陥が成長し、その結果、サイズと密度の関係は
第５図のようになる。The present invention is based on the idea of utilizing as many minute defects (nuclei) as possible existing in the webber, and if heat treatment is performed at 520°C without being separated, the defects above the shaded area B in Figure 4 will be removed. As a result, the relationship between size and density becomes as shown in Figure 5.
次に６２０℃で熱処理を施すと第５図のＣの斜線部分よ
り上の欠陥が成長に寄与し、密度分布は第６図のように
なる。Next, when heat treatment is performed at 620° C., defects above the shaded area C in FIG. 5 contribute to growth, and the density distribution becomes as shown in FIG. 6.
更に７２０℃の熱処理を施すと、Ｄの斜線部分のものが
成長するから、第３図の斜線部分Ａと比較すると、はる
かに多い微小欠陥が最終的に戒長し、析出することにな
る。When heat treatment is further performed at 720° C., the shaded area D grows, and compared to the shaded area A in FIG. 3, a much larger number of micro defects will eventually lengthen and precipitate.
本実施例は、１００℃間隔の熱処理の場合について述べ
たが、５０℃間隔で熱処理を行ってもよい。Although this embodiment describes the case where heat treatment is performed at intervals of 100°C, heat treatment may be performed at intervals of 50°C.
しかしながら、必要以上に間隔をせばめると多くのプロ
セスと時間を必要とし、工業的に興味がなくなる。However, making the interval smaller than necessary requires a lot of process and time, and is not industrially interesting.
捷た本実施例では１６ｈの例について述べたが、各プロ
セスとも１６ｈで十分であることが分った。In this embodiment, an example of 16 hours was described, but it was found that 16 hours was sufficient for each process.
実施例 ２
格子間酸素濃度の異なる出発ウェーバについて本方法を
適用し比較した。Example 2 This method was applied and compared to starting webs having different interstitial oxygen concentrations.
格子間酸素濃度としては、１８Ｘ１０１７個／Ｃｒｆｌ
、 １５Ｘｌ ０１７個／ｃ４及び１２Ｘ１０１７個
／ｃｒ／ｌの三種を選んだ。The interstitial oxygen concentration is 18X1017/Crfl
, 15Xl 017 pieces/c4 and 12X1017 pieces/cr/l were selected.
多段階熱処理後いずれのウェーバも格子間酸素濃度の顕
著な減少がみられ、特に１２Ｘ１０１７個／ｃ４の低酸
素ウェーバでも、高酸素ウェーバと同程度の減少であり
、■Ｇ効来が十分起っていることが分った。After multi-stage heat treatment, a remarkable decrease in interstitial oxygen concentration was observed in all the webbers, and in particular, even in the low-oxygen webber (12×1017 particles/c4), the decrease was about the same as that in the high-oxygen webber, indicating that the ■G effect was sufficiently occurring. I found out that
実施例 ３ Ｎ形（１００）ウェーバに本方法を適用した。Example 3 This method was applied to an N-type (100) Weber.
酸素を２５％含む窒素雰囲気中で、１２３０℃、３ｈ熱
処理したのち、乾燥酸素雰囲気中で７２０’Ｃ６４ｈ熱
処理を行い次いで湿式酸素雰囲気中で１１４０℃、２ｈ
熱処理したところ、内部欠陥密度は２ Ｘ １０３／Ｃ
ｒ／ｌであり、またウェーバの表面には、Ｉ Ｘ １０
３／ｃｖｉの密度で約１０μｍの長さの積層欠陥がみら
れた。After heat treatment at 1230°C for 3 hours in a nitrogen atmosphere containing 25% oxygen, heat treatment at 720°C for 64 hours in a dry oxygen atmosphere, and then at 1140°C for 2 hours in a wet oxygen atmosphere.
After heat treatment, the internal defect density was 2 x 103/C
r/l, and on the surface of the weber, I
Stacking faults with a length of about 10 μm were observed at a density of 3/cvi.
一方、実施例１と同様な方法を本ウェーバに適用したと
ころ、多段階熱処理後には４ Ｘ １０’ ／ｃｒｉの
内部欠陥がスワール状に発生し、會た、湿式酸素雰囲気
中で１１４０℃、２ｈの熱処理を施し、ウェーバの表面
を観察したところ前述の積層欠陥は全くみられなかった
。On the other hand, when the same method as in Example 1 was applied to this webber, internal defects of 4 x 10'/cri were generated in a swirl shape after multi-step heat treatment, and after 2 hours of heating at 1140°C in a wet oxygen atmosphere. When the surface of the wafer was observed after the heat treatment, no stacking faults were observed.
以上詳細に述べたように、高温熱処理を施した基板に、
低温からの多段階熱処理を順次施すことにより、高密度
の内部欠陥を発生させ、ゲッタリング効果を増大させる
ことができた。As described in detail above, on a substrate that has been subjected to high temperature heat treatment,
By sequentially performing multi-step heat treatment starting at low temperatures, we were able to generate a high density of internal defects and increase the gettering effect.
第１図は臨界サイズの温度依存性を示す模式図、第２図
はサイズと密度の関係を示す模式図、第３図は実線が１
２３０℃で高温熱処理を行ったときのサイズと密度の関
係を示し、７２０℃で熱処理を行うと斜線部分Ａのサイ
ズのものが成長することを示す図、第４図は高温熱処理
後、５２０℃で熱処理するとき、斜線部分Ｂのサイズの
ものが成長することを示す図、第５図は次いで６２０℃
で熱処理するときに、斜線部分Ｃが成長することを示す
図、第６図は更に７２０℃で熱処理するときに、斜線部
分りが成長することを示す図である。Figure 1 is a schematic diagram showing the temperature dependence of critical size, Figure 2 is a diagram showing the relationship between size and density, and Figure 3 is a diagram showing the relationship between size and density.
Figure 4 shows the relationship between size and density when heat treated at 230°C and shows that the size of the shaded area A grows when heat treated at 720°C. Figure 5 shows that the size of the shaded area B grows when heat treated at 620°C.
FIG. 6 is a diagram showing that the shaded area C grows when the heat treatment is performed at 720° C., and FIG. 6 is a diagram showing that the shaded area C grows when the heat treatment is further performed at 720° C.
Claims (1)
のち、乾燥酸素雰囲気中で低温から順次高温へ多段階熱
処理を施し、上記基板の内部にゲッタリングの沈澱の中
心を高密度に形成することにより、ゲッタリング効果を
増大させる方法。 ２ 多段階熱処理方法としては、５００℃から出発し、
５０〜１００℃の段階で順次上昇させ、最終温度を８５
０℃壕でとすることを特徴とする特許請求の範囲第１項
記載の半導体基板の内部欠陥によるゲッタリング効果を
増大させる方法。[Claims] 1. After heat treating a silicon single crystal substrate at 1200° C. or higher, multi-step heat treatment is performed in a dry oxygen atmosphere from a low temperature to a high temperature in order to form a center of gettering precipitation inside the substrate at a high density. A method of increasing the gettering effect by forming 2 As a multi-step heat treatment method, starting from 500°C,
Increase the temperature in stages from 50 to 100℃ until the final temperature reaches 85℃.
A method for increasing the gettering effect due to internal defects in a semiconductor substrate according to claim 1, wherein the method is carried out at a temperature of 0°C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9604180A JPS5854497B2 (en) | 1980-07-14 | 1980-07-14 | A method to increase the gettering effect due to internal defects in semiconductor substrates |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9604180A JPS5854497B2 (en) | 1980-07-14 | 1980-07-14 | A method to increase the gettering effect due to internal defects in semiconductor substrates |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5721825A JPS5721825A (en) | 1982-02-04 |
| JPS5854497B2 true JPS5854497B2 (en) | 1983-12-05 |
Family
ID=14154400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9604180A Expired JPS5854497B2 (en) | 1980-07-14 | 1980-07-14 | A method to increase the gettering effect due to internal defects in semiconductor substrates |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5854497B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6154098U (en) * | 1984-09-10 | 1986-04-11 | ||
| JPS639391U (en) * | 1986-07-01 | 1988-01-21 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63198334A (en) * | 1987-02-13 | 1988-08-17 | Komatsu Denshi Kinzoku Kk | Manufacture of semiconductor silicon wafer |
| GB2258356B (en) * | 1991-07-31 | 1995-02-22 | Metron Designs Ltd | Method and apparatus for conditioning an electronic component having a characteristic subject to variation with temperature |
| JPH07193072A (en) * | 1993-12-27 | 1995-07-28 | Nec Corp | Manufacture of semiconductor device |
-
1980
- 1980-07-14 JP JP9604180A patent/JPS5854497B2/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6154098U (en) * | 1984-09-10 | 1986-04-11 | ||
| JPS639391U (en) * | 1986-07-01 | 1988-01-21 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5721825A (en) | 1982-02-04 |
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