JPS5853849A - Semiconductor device and preparation thereof - Google Patents
Semiconductor device and preparation thereofInfo
- Publication number
- JPS5853849A JPS5853849A JP15143681A JP15143681A JPS5853849A JP S5853849 A JPS5853849 A JP S5853849A JP 15143681 A JP15143681 A JP 15143681A JP 15143681 A JP15143681 A JP 15143681A JP S5853849 A JPS5853849 A JP S5853849A
- Authority
- JP
- Japan
- Prior art keywords
- film
- polyimide
- thickness
- apertures
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
- H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、半導体装置及びその製造方法に関するもので
あり、詳しく述べるならは半導体チッグ懺面に樹脂層を
有する構造及びその製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device and a method for manufacturing the same, and more specifically to a structure having a resin layer on the surface of a semiconductor chip and a method for manufacturing the same.
半導体チップは、機械的な〆メージからの保護、あるい
は外的雰囲気からの保題等の丸めにパッケージによる封
止がなされる。しかしながらこのノ譬、ケージ材料から
のα線照射によシ半導体チッグ内に余剰電子が発生し、
メモリセル内の電荷量の変動による誤動作等のソフトエ
ラーを引き起す問題がある・従来、前述のα線照射を防
止する丸めに例えば第1図及び第2図で示されるような
半導体チツf表面のコーチ(ングが行なわれる。Semiconductor chips are sealed in packages to protect them from mechanical damage or to protect them from external atmosphere. However, in this parable, surplus electrons are generated within the semiconductor chip due to alpha ray irradiation from the cage material.
There is a problem of causing soft errors such as malfunctions due to fluctuations in the amount of charge in memory cells. Conventionally, in order to prevent α-ray irradiation, the semiconductor chip f surface as shown in FIGS. coaching will be conducted.
第1図によればシリコンチッf1上にポリイ建ド溶液が
ド四、!方式によ)滴下され、ポリインド接着剤層2が
形成されその接着剤層によりてIラインドフィルム3a
が接着せしめられている。According to Figure 1, the polyimide solution is on the silicon chip f1! method), a polyamide adhesive layer 2 is formed, and the adhesive layer forms an I-lined film 3a.
is glued.
ポリイミドは緻密な3次元構造によ〕α線ta収しノ臂
ツケージ材等からのα線照射を防止するとともに400
℃程度の耐熱性を有している。しかしながらポリイミド
フィルムを用いる場合、咳フィルム3a下の中心部の接
着剤層2が未硬化なるため溶剤、水分等が咳フィルム下
方に残9接着不良あるいは電気釣下&を招く場合がある
・4リイミドをシリ コンチ、f1の表面にコーティン
グする方法としては第1図で示した方法の他に第2図に
示しえようにシリコンチy7”l上にIリイミド溶液5
をドロップ方式でディスペンサー4により滴下する方法
がある。このようなドロ、!方式によ〕コーティングさ
れたポリイミド樹脂層5aは周辺端部で40〜50μ鯛
の厚さKなる場合があシα線防止に必要な75μmよシ
薄、j[となシα線防止が不可能となる・
そこで本発明の目的は上記欠点を改良し死生導体チップ
の表面コーティング方法を提供することである。Due to its dense three-dimensional structure, polyimide absorbs α-rays and prevents irradiation of α-rays from arm cage materials, etc.
It has heat resistance of about ℃. However, when using a polyimide film, since the adhesive layer 2 at the center under the cough film 3a is not cured, solvents, moisture, etc. may remain below the cough film, resulting in poor adhesion or electrostatic sinking. In addition to the method shown in Figure 1, there is a method for coating the surface of silicon chip, f1, in which 50% of Iliimide solution is coated on the silicon chip, as shown in Figure 2.
There is a method in which the liquid is dispensed by a dispenser 4 using a drop method. Such a dork! Depending on the method, the coated polyimide resin layer 5a may have a thickness K of 40 to 50 μm at the peripheral edge, but may be as thin as 75 μm, which is necessary for α-ray prevention, and may be as thin as 75 μm, which is necessary for α-ray prevention. Therefore, it is an object of the present invention to improve the above-mentioned drawbacks and provide a method for surface coating dead and living conductor chips.
本発明の他の目的は改良された半導体チ、fの表面、コ
ーティング構造を提供することである。Another object of the present invention is to provide improved semiconductor chip, surface and coating structures.
本発明の目的は半導体チオ1表面に樹脂コーティングを
行なう方法において、少なくとも1ケ所穴を設けた、7
5μm以上の厚みを有する樹脂フィルムを前記半導体チ
オ1表面に載置し、駄犬に樹脂溶液を滴下せしめて半導
体チッグ表面に樹脂層を形成することを特徴とする半導
体装置の製造方法によって達成される。An object of the present invention is to provide a method for coating the surface of a semiconductor thio 1 with a resin, in which at least one hole is provided.
This is achieved by a method for manufacturing a semiconductor device, which comprises placing a resin film having a thickness of 5 μm or more on the surface of the semiconductor chip 1, and dropping a resin solution onto the semiconductor chip to form a resin layer on the surface of the semiconductor chip. .
更に又本発明の目的は半導体チ、f表面上に少なくとも
1ケ所穴を設は厚さが75μm以上の樹脂フィルムと、
鋏穴内に設けられ九75μm以上の厚みの樹脂層とを有
することを特徴とする半導体装置によって達成場れる。Furthermore, an object of the present invention is to provide a resin film having a thickness of 75 μm or more and having at least one hole on the surface of the semiconductor chip.
This can be achieved by a semiconductor device characterized by having a resin layer provided in the scissors hole and having a thickness of 975 μm or more.
以下本発明を実施例に基づいて説明する。第3図ないし
第5図は本発明に係る実施例を説明する丸めの説明図で
ある。The present invention will be explained below based on examples. FIGS. 3 to 5 are explanatory diagrams of rounding for explaining an embodiment of the present invention.
先ず第3図に示すようにシリコンチップ1上に半導体セ
ル領域(第5図、8)を包い且つ長方形の穴6を有する
厚さ125μ溝のIリイ建ドフィルム3aを載置し、駄
犬6に、公知のドロップ方式でディスペンサー4を用い
てポリインド溶液5を滴下しコーティングする(第4図
)・第4図によれば滴下され九ポリイi Y@脂層5a
は4リインドフイルム3a下方にも浸透し誼フィルム3
aのシリコンチ、flに対する接着剤の役割を果たす、
この方法によれtflリイ建ドが硬化する際に発生する
水分、残留溶剤及び空気等は穴6から排出され(矢印7
)、又チ、f周辺部はフィルム3&のために膜厚はその
厚み125μmは確保されコーティングがなされる。第
5図は第4図の平面図であるが、少なくともシリコンチ
y7”l内に配置され九メモリーのセル領域8(斜線部
)はポリイミドフィルム31及び該フィル五人6内偶の
4リイミド樹脂層5aによりて遮へいされている。First, as shown in FIG. 3, an I-type film 3a having a thickness of 125 μm and having a rectangular hole 6 and surrounding the semiconductor cell region (8 in FIG. 5) is placed on the silicon chip 1. 6, the polyind solution 5 is dropped and coated using a dispenser 4 using a known drop method (Fig. 4).
It also penetrates below the 4-lead film 3a and the film 3
The silicone of a acts as an adhesive for fl,
By this method, moisture, residual solvent, air, etc. generated when the TFL re-build is cured are discharged from hole 6 (arrow 7
), and the peripheral portion of f is coated with a film thickness of 125 μm secured for the film 3&. FIG. 5 is a plan view of FIG. 4, and at least the cell area 8 (shaded area) of the nine memories disposed in the silicon chip y7''l is made of a polyimide film 31 and a four-layer imide resin layer of the film 5 and 6. 5a.
4リイミドフイルム3aが有する穴は矩形6に限られず
第6図に示すような一つの円形穴9又は第7図に示すよ
うな複数の円形穴10でもよい。The hole that the 4-limide film 3a has is not limited to the rectangular shape 6, but may be one circular hole 9 as shown in FIG. 6 or a plurality of circular holes 10 as shown in FIG.
勿論四角形以外の他の多角形状、楕円形状でもよい、な
おコーテイング材としてIリイミド樹脂を用い九がシリ
コン樹脂、テフロン樹脂等の樹脂でも耐熱性の点で許せ
ば十分に本発明の方法が使用される。又樹脂フィルムの
厚さはα線の防止の丸めに75μ割以上のものを使用し
、樹脂溶剤滴下によりて形成される樹脂層も75μ隅の
厚さ以上に適当に滴下量を定める必要がある。Of course, polygonal or elliptical shapes other than quadrangles may also be used; however, the method of the present invention can also be used with resins such as silicone resin and Teflon resin when using I-imide resin as the coating material, as long as they are acceptable in terms of heat resistance. Ru. In addition, the thickness of the resin film should be 75μ or more for rounding to prevent alpha rays, and the resin layer formed by dropping the resin solvent should also have an appropriate dropping amount at least 75μ thick at the corner. .
以上の本発明によって形成された半導体チッグの表面構
造、すなわち少なくとも1ケ所穴を設けた75μm以上
の厚みを有する樹脂フィルムと、この穴に75#畷の厚
みを有する構造のコーティングは前述の利点を有するも
のである。このような構造は半導体チ、f表面に樹脂溶
剤をドロップ方式によシ滴下し、滴下によりて形成され
た樹脂層の表面が少し粘着性を有する間に穴を有する樹
脂フィルムを張付けることによっても形成出来る。The surface structure of the semiconductor chip formed according to the present invention as described above, that is, the resin film having a thickness of 75 μm or more with at least one hole, and the coating having a structure in which the hole has a thickness of 75 mm has the above-mentioned advantages. It is something that you have. Such a structure is created by dropping a resin solvent onto the surface of a semiconductor chip using a drop method, and then pasting a resin film with holes while the surface of the resin layer formed by the drop is slightly sticky. can also be formed.
以上説明したように本発明によるとチッグ周辺部は樹脂
フィルムによシコーティングされ、さらに該フィルムは
穴を有しているため穴に滴下され九樹WIfI剤の硬化
条件が嵐(接着性の良好な且つα線によるソフトエラー
を改良しうる良好な半導体チッグ表面コーティングが得
られる。As explained above, according to the present invention, the surrounding area of the Chig is coated with a resin film, and since the film has holes, it is dropped into the holes, and the curing conditions of the Kuju WIf agent are adjusted to a storm (good adhesion). Moreover, a good semiconductor chip surface coating that can improve soft errors caused by α rays can be obtained.
第1図及び第2図は従来の実施例を示す概略断面図であ
り、菖3図ないし第5図は本発明に係る実施例を説明す
る丸めの説明図であシ、第6図、第7図は本発明に係る
穴を形成した樹脂フィルムの実施例である。
1・・・シリコン樹脂グ、2・・・ポリイミド接着剤層
、31・・・ポリイミドフィルム、4・・・ディスペン
サー、5・・・4リイミド溶液、5m・・・ポリイミド
樹脂層、6・・・ポリイミドフィルム大、7・・・排出
ガス、訃・・セル領域%9.10・・・穴。
特許出願人
富士通株式会社
tf#許出願代理人
弁理士 宵 木 朗
弁理士 西 舘 和 之
弁理士内田幸男
弁理士 山 口 昭 之
第1図
0
第4図
第5図
第6図
第7図
n1 and 2 are schematic cross-sectional views showing conventional embodiments, and FIGS. FIG. 7 shows an example of a resin film in which holes are formed according to the present invention. DESCRIPTION OF SYMBOLS 1... Silicone resin group, 2... Polyimide adhesive layer, 31... Polyimide film, 4... Dispenser, 5... 4 Riimide solution, 5m... Polyimide resin layer, 6... Large polyimide film, 7... Exhaust gas, Death... Cell area% 9.10... Hole. Patent Applicant: Fujitsu Limited tf
Claims (1)
ることを特徴とする半導体装置。 2、半導体チ、グ堀111に樹脂層を形成する方法にお
いて、少なくとも1ケ所穴を設けた175μm以上の厚
みを有する樹脂フィルムを前記牛導体チ、ゾ表面に載置
し、該穴に樹脂溶液を滴下しめ該樹脂溶液を硬化せしめ
る工程を有することを特徴とする半導体装置の製造方法
。[Scope of Claims] A semiconductor device characterized by having a resin layer with a thickness of 75 μm or more provided in the hole. 2. In the method of forming a resin layer on the semiconductor hole 111, a resin film having a thickness of 175 μm or more and having at least one hole is placed on the surface of the conductor hole 111, and a resin solution is poured into the hole. 1. A method of manufacturing a semiconductor device, comprising a step of dropping the resin solution and curing the resin solution.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15143681A JPS5853849A (en) | 1981-09-26 | 1981-09-26 | Semiconductor device and preparation thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15143681A JPS5853849A (en) | 1981-09-26 | 1981-09-26 | Semiconductor device and preparation thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5853849A true JPS5853849A (en) | 1983-03-30 |
Family
ID=15518565
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15143681A Pending JPS5853849A (en) | 1981-09-26 | 1981-09-26 | Semiconductor device and preparation thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5853849A (en) |
-
1981
- 1981-09-26 JP JP15143681A patent/JPS5853849A/en active Pending
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