CA2021682C - Chip-carrier with alpha ray shield - Google Patents

Chip-carrier with alpha ray shield

Info

Publication number
CA2021682C
CA2021682C CA 2021682 CA2021682A CA2021682C CA 2021682 C CA2021682 C CA 2021682C CA 2021682 CA2021682 CA 2021682 CA 2021682 A CA2021682 A CA 2021682A CA 2021682 C CA2021682 C CA 2021682C
Authority
CA
Canada
Prior art keywords
chip
carrier
carrier substrate
spacer
ray shielding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA 2021682
Other languages
French (fr)
Other versions
CA2021682A1 (en
Inventor
Yukio Yamaguchi
Mutsuo Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP18755289A external-priority patent/JPH0353549A/en
Priority claimed from JP3208790A external-priority patent/JP2836166B2/en
Priority claimed from JP2042933A external-priority patent/JP2570880B2/en
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2021682A1 publication Critical patent/CA2021682A1/en
Application granted granted Critical
Publication of CA2021682C publication Critical patent/CA2021682C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

In a chip-carrier provided with a chip-carrier substrate, a chip-carrier cover and an IC chip, said IC chip being arranged at a distance from a circuit surface of the IC
chip being directed toward the chip-carrier substrate, an .alpha.-ray shielding film made of film material containing few radioactive elements, and adhered to a surface of the chip-carrier substrate facing the IC chip or to the circuit surface of the IC chip is provided for protecting the IC chip from soft errors caused by .alpha.-rays.

Description

-The present invention relates to a chip-carrier, and specifically relates to a chip-carrier having means for preventing soft errors caused by a-rays. The present invention also relates to a semiconductor device of chip-carrier type and a semiconductor device having TAB IC, mountedon a printed circuit board for preventing soft errors caused by a-rays.
For example, where there are high degrees of integration of dynamic MOS memory, there are cases where errors called "soft errors" may arise due to a-rays radiated from a very small amount of radioactive material contained in a package.
Conventionally, in order to prevent the information stored in a memory cell of an IC chip from being destroyed by a-rays radiated from a chip-carrier package, a circuit surface of IC chip was protected by a coating layer of a-ray shielding resin. In this case, highly viscous silicone resin was used as a-ray shielding resin, and the silicon resin was applied on the circuit surface of an IC chip by potting, prior to packaging of the IC chip in a chip-carrier package. The chip-carrier package is comprised of a chip-carrier substrate provided with bumps to be connected with printed circuit of printed wiring board (not shown), a chip-carrier cover having inverted "U" shape in cross section, which chip-carrier cover is - adjoined to the chip-carrier substrate so that a hollow part for accommodating an IC chip is formed. The IC chip is mounted on the chip-carrier substrate face down through lead-formed leads. In order to assemble the chip-carrier by using such a chip-carrier package, first, ~-ray shielding resin is dropped on circuit surface of an IC chip and heat-cured by means of a potting equipment.
Therefore there are cases where ~-ray shielding silicone resin is protruded into a shape of a mountain in such an extent that the protruded silicone resin makes lead forming difficult. Further when dropped silicone resin on the IC chip is heat-cured, heat is applied to the IC
chip, thereby a reliability of the IC chip being lowered.

SUMMARY OF THE INVENTION
It is an object of the present invention to provide a chip-carrier wherein lead forming of the IC chip can be carried out simply and a reliability of the IC chip can be improved.
The above object of the present invention is attained by that in a chip-carrier comprising a chip-carrier substrate, a chip-carrier cover and an IC chip, having a circuit surface directed toward the chip-carrier substrate and being die-bonded to the chip-carrier cover and being arranged at a distance from the chip-carrier substrate, leads rising between the circuit surface of the IC chip and the chip-carrier substrate and being connected with X
2~21 68~

_ the IC chip and the chip-carrier substrate, and an o~ray shielding film made of film material containing few radioactive elements adhered to at least one of the circuit surface of the IC chip and a surface of the chip-carrier substrate facing the IC chip through an adhesive layer.
Further, the above object of the present invention is attained by that in a chip-carrier comprising a chip-carrier substrate, a chip-carrier cover and an IC
chip, said IC chip being arranged at a distance from the chip-carrier substrate through lead-formed leads with a circuit surface of the IC chip being directed toward the chip-carrier substrate, connected through the leads to pads provided on the chip-carrier substrate, and die-bonded to the chip-carrier cover, the chip-carrier comprises an ~-ray shielding film made of film material containing few radioactive elements, and adhered to the circuit surface of the IC chip through an adhesive layer containing few radioactive elements.
Further, the above object of the present invention is attained by that in a chip-carrier comprising a chip-carrier substrate, a chip-carrier cover and an IC
chip, said IC chip being arranged at a distance from the chip-carrier substrate through lead-formed leads with a circuit surface of the IC chip being directed toward the chip-carrier substrate, connected through the leads to pads provided on the chip-carrier substrate, and die-bonded to the chip-carrier cover, the chip-carrier comprises a X

spacer interposed between the IC chip and the chip-carrier substrate and made to come closely into contact with the whole circuit surface of the IC chip, said spacer being formed of rubber sheet and having an ~-ray shielding coating film made of coating material containing few radioactive elements on the surface of the spacer facing the IC chip, and said spacer being adhered to the chip-carrier substrate through an adhesive layer.
Furthermore, the object of the present invention is attained by that in a chip-carrier comprising a chip-carrier substrate, a chip-carrier cover and an IC chip, said IC chip being arranged away from the chip-carrier substrate through lead-formed leads with a circuit surface of the IC chip being directed toward the chip-carrier substrate, connected through the leads to pads provided on the chip-carrier substrate, and die-bonded to the chip-carrier cover, the chip-carrier comprises a spacer interposed between the IC chip and the chip-carrier substrate and made to come closely into contact with the whole circuit surface of the IC chip, said spacer being formed of ~-ray shielding rubber sheet containing few radioactive elements, and adhered to the chip-carrier substrate through an adhesive layer.
Accordingly, the present invention provides a chip-carrier which comprises a chip-carrier substrate, a chip-carrier cover adhered to a surface of said chip carrier substrate, an IC chip having a circuit surface directed toward the chip-carrier substrate and being die-bonded to said chip-carrier cover and arranged at a distance from the chip-carrier substrate, leads rising between the circuit surface of the IC chip and the surface of said chip-carrier substrate, and being electrically connected between the IC
chip and the chip-carrier substrate, and a spacer being interposed between the IC chip and the chip-carrier substrate and being provided in close and direct contact between its surface and the whole circuit surface of the IC chip, and said spacer being formed of an ~-ray shielding rubber sheet containing few radioactive elements and which gives off an ~-ray amount less than 0.001 counts/cm2hrs, and adhered to the chip-carrier substrate through an adhesive layer.
In the present invention, the ~-ray shielding film, and the adhesive layer between the IC chip and the a-ray shielding film should be selected on the criterion of ~-ray dose less than 0.001 count/c* hrs. Further the ~-ray shielding film should have a thickness more than - 4a -_ 50J~m. Furthermore when the ~-ray shielding film is provided on a surface of the chlp-carrier substrate facing the IC chip, the ~-ray shielding film should have an area greater than an area of the circuit surface of the IC chip.
In the present invention, the spacer provided between the IC chip and the chip-carrier substrate should be made to come closely into contact with the whole circuit surface of the IC chip, in order to protect the circuit of the IC chip from ~-ray. The ~-ray shielding coating film and the spacer formed of the ~-ray shielding rubber sheet should be selected on the criterion of ~-ray dose less than 0.001 count/cm2-hrs. Further the ~-ray shielding coating film should have a thickness more than 50~m.
In the present invention, since potting resin is not used, lead forming can be carried out easily without being hindered by protruded potting resin layer. Further since the chip-carrier can be fabricated without the process of heat-curing of potting resin, reliability of the IC chip can be improved as compared with the conventional chip-carrier.

BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a cross section of one embodiment of a chip-carrier according to the present invention;
Fig. 2 is a cross section of another embodiment of a chip-carrier according to the present invention;

202 ~ 682 - Fig. 3 is a cross section of further embodiment of a chip-carrier according to the present invention; and Fig. 4 is a cross section of further embodiment of a chip-carrier according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION
The present invention will be explained with reference to Figs. 1 to 4.
Fig. 1 is a cross section of one embodiment of a chip-carrier according to the present invention.
Referring to Fig. 1, a chip-carrier comprises a chip-carrier package 1. The chip-carrier package 1 comprises a chip-carrier substrate 1a and a chip-carrier cover or chip-carrier cap 1b having an inverted "U" shape in cross section. An IC chip 5 is packaged in the chip-carrier cover 1. The chip-carrier substrate 1b is provided with plural pads 4 on the upper side of the chip-carrier substrate and with input and output bumps 2 ~connected with the pads 4 by way of through-hole wires 3 on the under side of the chip-carrier substrate.
On an area of the chip-carrier substrate 1 facing at least the circuit surface 10 of the IC chip 5, an ~-ray shielding film 7 is provided through an adhesive layer 8, in order to protect the IC chip 5 against radiation damage caused by ~-ray radiated from radioactive material contained in the chip-carrier substrate 1a. The IC chip 5 is mounted on the chip-carrier substrate 1a through lead-formed leads 6. One ends of the respective leads 6 .~

202168~

are connected to the corresponding electrodes (not shown) of the IC chip 5, while the other ends of the respective leads 6 are connected to the corresponding pads 4 provided on the upper surface of the chip-carrier substrate 1a. In order to mount the IC chip S on the chip-carrier substrate 1a, first, the leads 6 are connected to the corresponding electrodes of the IC chip 5, for example by tape automated bonding, then the leads 6 are lead-formed in such a manner that the other ends of the respective leads are directed toward the corresponding pads 4, as shown in Fig. 1. Then, the other ends of the respective leads 6 are connected to the corresponding pads 4 by thermocompression bonding. Thereby the IC chip S is arranged at a distance from the chip-carrier substrate 1a through the lead-formed leads 6 with a circuit surface 10 of the IC chlp 5 being directed toward the chip-carrier substrate 1a.
In the above-mentioned embodiment of the present invention, as the ~-ray shielding film 7, use can be made of, for example, polyimide resin film containing few radioactive elements of uranium, thorium or the like as impurities, as Kapton (trade mark) 200H manufactured by Toray Dupon Co., Ltd., or the like selected on the criterion of ~-ray dose less than 0.001 count/cm2-hrs.
For shielding ~-ray dose radiatèd from radioactive material contained in the chip-carrier substrate 1a, a thickness of the a-ray shielding film 7 should be more than 50~m, and should have an area greater than an area of the X _ 7 _ _ circuit surface 10 of the IC chip 5.
In order to assemble the above-mentioned chip-carrier 1, first, the IC chip 5 is mounted face down on the chip-carrier substrate 1a as above-mentioned. Then, the IC chip 5 is die-bonded to the chip-carrier cover 1b through an adhesive layer 9, and an edge of an opening of the chip-carrier cover 1b is adhered to the upper surface of the chip-carrier substrate 1a through an adhesive layer 11 so that the chip-carrier is finished, thereby the IC chip being packaged hermetically in the chip-carrier package 1.
Accordingly, in the chip-carrier constructed as above-mentioned according to the present invention, since the ~-ray shielding film 7 is disposed on a portion of the chip-carrier substrate 1b facing at least the circuit surface 10 of the IC chip 5, an a-raY radiated from radioactive material contained in the chip-carrier substrate 1a is blocked by the ~-ray shielding film 7.
Therefore, it is possible to surely prevent the occurrence of soft error of the IC chip 5. Further even when bonding of the ~-ray shielding film 7 to the chip-carrier substrate 1b is carried out by heat, heat used for bonding cannot be transferred to the IC chip 5, therefore reliability of the IC chip being improved, because the ~-ray shielding film 7 is not adhered to the IC chip 5.
Furthermore, since there is not anything as conventional potting resin on the circuit surface 10 of the IC chip 5, the leads 6 can be easily lead-formed without being ~7 - hindered by the ~-ray shielding film 7. ~02 1 682 Then the second embodiment of a chip-carrier according to the present invention will be explained.
Fig. 2 is a cross section of the second embodiment of the present invention.
In Fig. 2, like or equal elements as in Fig. 1 are given same reference numerals as in Fig. 1, and description about these elements is omitted.
In the Fig. 2 embodiment, an a-ray shielding film 12 is provided on the circuit surface 10 of the IC chip 5 through an adhesive layer 13. As the ~-ray shielding film 12, use can be made of, for example, polyimide resin film containing few radioactive elements of uranium, thorium or the like as impurities, as Kapton (trade mark) 200H manufactured by Toray Dupon Co., Ltd., or the like selected on the criterion of a-ray dose less than 0.001 count/cm2 hrs. For shielding ~-ray dose radiated from radioactive material contained in the chip-carrier substrate 1a, a thickness of the a-ray shielding film 12 should be more than 50~m, and should have an area covering an area of the circuit surface 10 of the IC chip 5.
Further as the adhesive layer 13, use can be made of, for example, silicone resin layer containing few radioactive elements of uranium, thorium or the like as impurities, as JCR 6110 manufactured by Toray Silicone Co., Ltd., or the like selected on the criterion of ~-ray dose less than 0.001 count/cm2 hrs.

X

2o~ l 68~
When the ~-ray shielding film 12 is adhered to the IC chip 5 by way of the adhesive layer 13 in such a manner, a-ray radiated from radioactive material contained in the chip-carrier substrate can be blocked by the a-ray shielding film 12. Therefore it is possible to surely prevent the occurrence of soft error of the IC
chip 5. Although the ~-ray shielding film 12 is provided on the IC chip, since the ~-ray shielding film 12 is flat and the thickness thereof is uniform over the whole area thereof, the leads 6 can be easily lead-formed without being hindered by the ~-ray shielding film 12.
Then the third embodiment of a chip-carrier according to the present invention will be explained.
Fig. 3 is a cross section of the second embodiment of the present invention.
In Fig. 3, like or equal elements as in Fig. 1 are given same reference numerals as in Fig. 1, and description about these elements is omitted.
In the Fig. 3 embodiment, a spacer 14 is interposed between the TAB (Tape Automated Bonding) IC chip 5 and the chip-carrier substrate 1a, and made to come closely into contact with the whole circuit surface 10 of the TAB
IC chip 5. The spacer 14 is formed of silicone rubber sheet, and has an ~-ray shielding coating film 16 made of a-ray shielding silicone resin as, for example, JCR 6110`
manufactured by Toray Silicone Co., Ltd., or TSJ 3130 manufactured by Toshiba Silicone Co., Ltd., or the like selected on the criterion of ~-ray dose less than 0.001 count/cm2-hrs. The a-ray shielding silicone resin is coated on the surface of the spacer 14 facing the IC chip 5, and heat-cured. For shielding ~-ray dose radiated from radioactive material contained in the chip-carrier substrate 1a, a thickness of the ~-ray shielding coating film 16 should be more than 50~m.
In the above-mentioned chip-carrier 1, ~-ray radiated from radioactive material contained in the chip-carrier substrate 1a, the spacer 14 and the leads 6 can be blocked by the ~-ray shielding coating film 16. Therefore, it is possible to surely prevent the occurrence of soft error of the IC chip 5.
Further, in the Fig. 3 embodiment, since the thickness of the spacer 14 with the ~-ray shielding coating film 16 can be set with a given measure, a distance between the IC chip 6 and the chip-carrier substrate 1a can be set to an equal distance, therefore lead-forming easily carried out.
Further, in the Fig. 3 embodiment, since it is not necessary to coat and heat-cure silicone resin on the IC
chip 5, heat is not applied to the IC chip, therefore reliability of the IC chip being improved.
Then, in the process of manufacturing a chip-carrier 1 of the Fig. 3 embodiment, the spacer 14 is adhered to the chip-carrier substrate 1a by way of an adhesive layer 15.
Then the TAB IC chip 5 with lead-formed leads 6 is disposed on the spacer 14. Thereafter the leads 6 are connected to the pads 4 by thermocompression bonding.

`~ Further the IC chip 5 is die-bonded to the chip-carrier cover 1b and thereafter the chip-carrier cover 1b is bonded to the chip-carrier substrate 1a.
Further in the Fig. 3 embodiment, the spacer 14 is manufactured as follows: silicone resin is coated to a given thickness on a silicone rubber sheet with a given thickness by a spin-coater and heat-cured; then the silicone rubber sheet with the silicone resin coating film is cut into a given shape.
Then the fourth embodiment of a chip-carrier according to the present invention will be explained.
Fig. 4 is a cross section of the fourth embodiment of the present invention.
In Fig. 4, like or equal elements as in Fig. 1 are given same reference numerals as in Fig. 1, and description about these elements is omitted.
In the Fig. 4 embodiment, a spacer 17 is interposed between the TAB IC chip 5 and the chip-carrier substrate 1a and made to come closely into contact with the whole circuit surface 10 of the IC chip 5. The spacer 17 is formed of ~-ray shielding silicone rubber sheet as, for example, JCR 6110 manufactured by Toray Silicone Co., Ltd., or TSJ 3130 manufactured by Toshiba Silicone Co., Ltd., or the like selected on the criterion of ~-ray dose less than 0.001 count/cm2-hrs. The spacer 17 is adhered to the chip-carrier substrate 1a through an adhesive layer 15. The ~-ray shielding rubber sheet has a thickness more than 50 m at which ~-ray dose radiated from ~7 2021 68~

radioactive material contained in the chip-carrier substrate 1a can be blocked.
In the process of fabricating a chip-carrier, first, the leads 6 are lead-formed. Thereafter the TAB IC chip 5 is placed face down on the spacer 17. Then ends of the leads 6 are bonded to pads 4 by thermocompression bonding. Further the TAB IC chip 7 is die-bonded to the chip-carrier cover 1b through an adhesive layer 9.
Thereafter the chip-carrier cover 1b is hermetically adhered to the chip-carrier substrate 1b.
Since the spacer 17 made of ~-ray shielding silicone rubber sheet is made to come closely into contact with the whole circuit surface 10 of the TAB IC chip 5, ~-ray radiated from radioactive material contained in the chip-carrier substrate 1a and the leads 6 can be blocked. Further, since the spacer 17 is fixed to the chip-carrier substrate 1a, lead-forming can be easily carried out. Further since unnecessary heat is not applied to the TAB IC chip 5, reliability of the TAB IC
chip 5 is good.
Further since the spacer 17 is fixed to the chip-carrier substrate 1a and made to come closely into contact with the TAB IC chip 5, the TAB IC chip 5 can be supported by the spacer 17, thereby being die-bonded thoroughly to the chip-carrier cover 1b.

X - 13 _

Claims (2)

1. A chip-carrier which comprises a chip-carrier substrate, a chip-carrier cover adhered to a surface of said chip carrier substrate, an IC chip having a circuit surface directed toward the chip-carrier substrate and being die-bonded to said chip-carrier cover and arranged at a distance from the chip-carrier substrate, leads rising between the circuit surface of the IC chip and the surface of said chip-carrier substrate, and being electrically connected between the IC chip and the chip-carrier substrate, and a spacer being interposed between the IC chip and the chip-carrier substrate and being provided in close and direct contact between its surface and the whole circuit surface of the IC chip, and said spacer being formed of an .alpha.-ray shielding rubber sheet containing few radioactive elements and which gives off an .alpha.-ray amount less than 0.001 counts/cm2hrs, and adhered to the chip-carrier substrate through an adhesive layer.
2. A chip-carrier as claimed in claim 1, wherein said spacer is composed of a material selected from a group consisting of polyimide resin and silicon resin which contain few radioactive elements and which gives off an .alpha.-ray amount less than 0.001 count/cm2hrs.
CA 2021682 1989-07-21 1990-07-20 Chip-carrier with alpha ray shield Expired - Fee Related CA2021682C (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP18755289A JPH0353549A (en) 1989-07-21 1989-07-21 Chip carrier type semiconductor device
JP187552/1989 1989-07-21
JP3208790A JP2836166B2 (en) 1990-02-13 1990-02-13 Chip carrier
JP32087/1990 1990-02-13
JP42933/1990 1990-02-22
JP2042933A JP2570880B2 (en) 1990-02-22 1990-02-22 Chip carrier

Publications (2)

Publication Number Publication Date
CA2021682A1 CA2021682A1 (en) 1991-01-22
CA2021682C true CA2021682C (en) 1995-01-03

Family

ID=27287579

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2021682 Expired - Fee Related CA2021682C (en) 1989-07-21 1990-07-20 Chip-carrier with alpha ray shield

Country Status (2)

Country Link
CA (1) CA2021682C (en)
FR (1) FR2650121B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114942493B (en) * 2022-05-05 2024-01-30 武汉光迅科技股份有限公司 Chip assembly, optical device and assembly method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5588356A (en) * 1978-12-27 1980-07-04 Hitachi Ltd Semiconductor device
JPS55128851A (en) * 1979-03-28 1980-10-06 Hitachi Ltd Semiconductor memory device
JPS6015152B2 (en) * 1980-01-09 1985-04-17 株式会社日立製作所 Resin-encapsulated semiconductor memory device
JPS5931045A (en) * 1982-04-16 1984-02-18 Mitsubishi Electric Corp Resin sealed type semiconductor device and manufacture thereof
JPS59127843A (en) * 1983-01-12 1984-07-23 Fujitsu Ltd Manufacture of semiconductor device
US4709301A (en) * 1985-09-05 1987-11-24 Nec Corporation Package
JPH0638458B2 (en) * 1985-09-12 1994-05-18 日本電気株式会社 Chip carrier and method of manufacturing the same
JPS6376444A (en) * 1986-09-19 1988-04-06 Nec Corp Chip carrier
JPS6390843A (en) * 1986-10-03 1988-04-21 Nec Corp Structure for mounting integrated circuit
JPS63229726A (en) * 1987-03-18 1988-09-26 Nec Corp Hybrid integrated circuit device

Also Published As

Publication number Publication date
FR2650121B1 (en) 1997-07-25
FR2650121A1 (en) 1991-01-25
CA2021682A1 (en) 1991-01-22

Similar Documents

Publication Publication Date Title
JP3717937B2 (en) Package with multiple semiconductor dies
US5831836A (en) Power plane for semiconductor device
US4712129A (en) Integrated circuit device with textured bar cover
JP3061954B2 (en) Semiconductor device
US7211900B2 (en) Thin semiconductor package including stacked dies
US5394014A (en) Semiconductor device improved in light shielding property and light shielding package
US6400032B1 (en) Method and apparatus for packaging flip chip bare die on printed circuit boards
US5438216A (en) Light erasable multichip module
US4661837A (en) Resin-sealed radiation shield for a semiconductor device
US20060125093A1 (en) Multi-chip module having bonding wires and method of fabricating the same
US6072700A (en) Ball grid array package
EP0029858B1 (en) Semiconductor device
US5264726A (en) Chip-carrier
JPS6148265B2 (en)
KR100660882B1 (en) Board on chip package and manufacturing method thereof
CA2021682C (en) Chip-carrier with alpha ray shield
JP3065753B2 (en) Resin sealing method for semiconductor integrated circuit bare chip, semiconductor device
EP0045561A2 (en) Semiconductor device comprising memory circuits
JPH10284633A (en) Semiconductor integrated circuit device and manufacturing method therefor
KR940006578B1 (en) Semicondoctor package and manufacturing method thereof
JPS63250847A (en) Semiconductor device and manufacture thereof
JPH1187410A (en) Semiconductor device
JP2680969B2 (en) Semiconductor memory device
JP2836165B2 (en) Chip carrier
KR100468024B1 (en) Loc package

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed