JPS5851354U - arithmetic device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

Fig. 1 is a functional block diagram of a conventional arithmetic device, Fig. 2 is a microprogram of Fig. 1, Fig. 3 is a functional block diagram of the arithmetic device of the present invention, and Fig. 4 is a time chart of Fig. 3. . 11...Registers (registers A, B), 4.
...Control record tL 41...Address register, 43...Micro instruction register, 45.
...Flip-flops that do not operate simultaneously, 5...
... Main memory, 51 ... Address register, 52
...Write data register, 53...
Read data register.

Claims (1)

[Scope of utility model registration request] In an electronic computer controlled by a microprogram using the steal control method, in which execution of macro instruction words (machine language) and input/output operations are executed simultaneously, a control flip-flop is installed that prohibits the execution of macro instruction words (machine language) and input/output operations at the same time. Furthermore, the microinstruction word has a bit (I bit) that temporarily prohibits stealing by input/output operations, and in a state where the simultaneous operation prohibition flip-flop is set, the microinstruction word has the I bit. An arithmetic device characterized in that it is configured to forcefully change a specific register or flip-flop into a specific state when not specified.