JPS5850381B2 - Step control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a step control system for a user program executed under the control of a monitor program in an electronic computer.

This type of conventional step control method requires dedicated hardware to control step control interrupts; the step control interrupts can be set/reset by a program, and when the step mode is entered, software and hardware Processing was executed under the control of both software.

Therefore, conventional methods have had drawbacks such as complicated hardware and high cost.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a step control method that can realize step execution and monitoring of a user program under monitor control with a simple hardware configuration.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the parts of a microprocessor related to the present invention in blocks, and in the figure, 1 is an interrupt reception unit that accepts interrupt requests I RQ 1... of multiple levels;
3 is an interrupt mask section, 3 is an interrupt control section, 4 is an instruction execution control section, and 5 is a memory control section.

Further, 6 is a main memory in which program information is stored, IR is an interrupt signal, and IRP is an interrupt permission signal.

Here, one of the interrupt requests, for example, level 5 (Le
vel 5 ) is assigned to the step control, and its request is always set.

That is, the level 5 reception input terminal of the interrupt reception section 1 is always supplied with tt and pp level signals (interrupt requests) in terms of hardware.

FIG. 2 shows a flow of memory addresses to explain one implementation of the present invention. In the figure, MON-P is a monitor (monitor program), USE-P is a user program, and SPC is a monitor. EI is an interruptable instruction, and SSR is a step service routine in the monitor.

To describe the operation here, when the operator specifies step execution by operating a predetermined switch on the console (not shown) or by typing in a message, the monitor MON-
Control is transferred to the step service routine SSR in P, and the internal registers for executing the user program USE-P are saved.

This provides a mode in which a command designated by the slave program counter SPC is executed in a single step each time a predetermined key, such as the return key, is operated.

In other words, by operating the return key, 5PC
Save the instruction at address -i and assign interruptible instruction EI to address 5PC-i.

Next, reset the level 5 interrupt mask assigned to the step control of the interrupt mask section 2, save the internal register for monitoring, load the internal register for the user program, and then transfer to address spc-i. Jump.

After the instruction execution control unit 4 executes the interruptable instruction EI, when the instruction (executed instruction) at the specified address of the slave program counter SPC is executed, the instruction execution control unit 4 grants interrupt permission to the interrupt control unit 3. Signal IRP is sent to enable interrupts, which causes a level 5 interrupt and returns to step service routine SSR.

At this time, if other interrupts are permitted by the operator's selection, the interrupt processing higher than level 5 is executed first, and then the process returns.

Also, these lower level interrupts are not executed.

Then, when returning to the step service routine SSR, the internal register for the user program is saved, the internal register for monitoring is loaded, the contents of address 5PC-i are returned to the original, and the contents of various registers and specific memory are saved. is displayed and the slave program counter SPC is updated.

By operating the return key again, the above-described operations are repeatedly executed.

When returning from the step execution mode to the normal execution mode, the operator instructs switching of the mode by operating a predetermined switch or by typing in a message, and the step execution mode is returned to the normal execution mode.

By adopting the step control method as described above, in terms of hardware, one interrupt request from the interrupt reception unit 1 is processed by a pull amplifier resistor, etc.
level, and the interrupt request is always set, which greatly simplifies the hardware.

On the other hand, in terms of software, only the processing of the interrupt mask and the processing of the interrupt-enabled instruction EI are increased, and the number of steps can be realized with almost no increase.

As described in detail above, according to the present invention, in a step control method of a user program executed under monitor control, a step control system that can realize step execution and monitoring of a user program with a simple hardware configuration is provided. method can be provided.

[Brief explanation of the drawing]

The figure is for explaining one embodiment of this invention.
The figure is a block diagram showing the portions of the microprocessor related to the present invention, and FIG. 2 is a diagram showing the main part flow at memory addresses for explaining the operation of the embodiment. 1...Interrupt reception unit, 2...Interrupt mask unit, 3...Interrupt control unit, 4...Instruction execution control unit, 5... ...Memory control unit, MON-P...
...Monitor, USE-P...User program, SSR...Step service routine,
SPC...Slave program counter, EI
...Interruptable instruction.

Claims (1)

[Claims] 1. In the step control method of a user program executed under the control of a monitor program, the interrupt reception section of multiple levels, the interrupt mask section for each interrupt level, and the next A processing device having a function of entering an interrupt enabled state after execution of an instruction is used, and a means is provided in an interrupt reception unit of the processing device to always set one interrupt request assigned to a step control interrupt to a sent state, In the step control routine of the monitor program, the contents of the first address before the user instruction to be executed for step processing are saved and an interruptible instruction is substituted at the address;
Step control interrupt After resetting the corresponding interrupt mask, jump to the address to which the above interruptible instruction is assigned, execute the interruptible instruction and the user instruction to be executed at the next address, and execute this step. A step control method characterized in that step control processing is executed by returning to the step control routine again at an interrupt after execution of a user command to be executed, and returning the saved contents to the original address.