JPS584980A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS584980A
JPS584980A JP11105982A JP11105982A JPS584980A JP S584980 A JPS584980 A JP S584980A JP 11105982 A JP11105982 A JP 11105982A JP 11105982 A JP11105982 A JP 11105982A JP S584980 A JPS584980 A JP S584980A
Authority
JP
Japan
Prior art keywords
junction
layer
region
layers
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11105982A
Other languages
Japanese (ja)
Inventor
Kenichiro Ryono
漁野堅一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11105982A priority Critical patent/JPS584980A/en
Publication of JPS584980A publication Critical patent/JPS584980A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes

Abstract

PURPOSE:To improve the noise characteristic of a transistor and the current amplification factor of a low current region by preventing the crossing of a SiO2 film on a P-N junction determining breakdown voltage by a metallic wiring thin-film for an electrode. CONSTITUTION:A P base 12 and a P<+> auxiliary layer 11 in shape that adjoins to the base 12 and is deeper are formed to an N epitaxial layer 2 on P type Si 1. An N<+> emitter 13 and said electrode 16 extending to the layers 11, 12 are molded, and the layer 13 is not extended to the layer 12 side. In the N-P-N elements of the layers 13-12-2 and 13-11-2, the former has the high efficiency of injection and narrow base width and shows a high current amplification factor, and the current amplification factor is determined by the layers 13, 12 while using the contacting surface 21 of the layers 11, 12 as a boundary. The emitter electrode 16 is drawn out of the N<+> layer 13, and the crossing of the metallic thin-film 16 on the SiO2 5 on the junction of the layers 12, 13 is prevented. According to this constitution, the characteristics of the transistor is largely improved because the level at a low level of the interface of Si and SiO2 in the vicinity of the junction of the emitter and the base is decreased remarkably and the recrystallization layer of Si-the metal in the alloying process of the formation of the ohmic junction is separated from the dominant junction of the emitter and the base.

Description

【発明の詳細な説明】 この発明は、電極の引出しに豐値のある半導体装置K1
1するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a semiconductor device K1 having an advantageous value in drawing out electrodes.
1.

従来の一体構造の半導体集積回路装置において例えにダ
イオードの逆方向降伏電圧が利用されるいわゆるゼナー
ダイオードのPN接合上を引出電極金属が横切る場合に
、電極金属によ少そのi千の81−810.の界面近傍
に機械的ストレスが与えられる。その結果、逆方向降伏
電圧が時間と共に高い方に次纂に変動して行く現象が観
察される。通常その変動分tile〜100mVと小さ
く、大抵の場合には問題とならないが、ダイオードの順
方向電圧、抵抗等【利用してゼナーダイオード電圧の温
度係数を零近くに押えねばならない場合にはその経fR
t変動分が10〜100mVでも関亀となりてくる。
In a conventional integrated semiconductor integrated circuit device, for example, when the lead electrode metal crosses the PN junction of a so-called Zener diode, which utilizes the reverse breakdown voltage of the diode, the electrode metal has a small amount of 81- 810. Mechanical stress is applied near the interface. As a result, a phenomenon is observed in which the reverse breakdown voltage gradually fluctuates toward higher values over time. Normally, the variation is small at ~100mV, and is not a problem in most cases, but it is necessary to suppress the temperature coefficient of the Zener diode voltage close to zero by using the diode's forward voltage, resistance, etc. Kei fR
Even if the t variation is 10 to 100 mV, it becomes a barrier.

このJA@の目的鉱PN@会が電極金属の1譬を受性な
い半導体装置1m供するにある。
The purpose of this JA@ is to provide 1 m of semiconductor devices that are not susceptible to electrode metals by the PN@ association.

こ0!1ijjiKよれd例えdゼナーIK圧OM時変
動の小さなゼナーダイオードが得られ、またトランジス
タの工きツタペースに適用することによ如、雑音特性、
コレクタ低電流領域にお妙る電流増幅率等が改善される
。この発明tゼナーダイオードKxa用すれば、嬉10
Palの拡散領域KNmのs6磯度の不純物を拡散して
ゼナーダイオードが得られ、そのNfi高一度領域から
金属薄膜の電at引出す場合に、上記atPH領域及び
NW高濃度領領域のPH@金上を横切ることなく引出す
。このため、jllPNfi領域よりもドープ量の少な
い補助領域として$1のP層領域t、JIIIP盤聾領
域盤間領域て形成し、上記NI/Ii^a度懺域tすれ
等j11m1gノPml領域K ji りて延在させる
。電極を上記asp臘領域上のNil高−1領域から引
出す。仁のようにしてゼナーダイオードの逆方向電圧を
決定するPN接合上を金属配線が横切らないようにさせ
る・ 次に一自七参照して説明する。藻l崗は従来のゼナーダ
イオード【示し、pHシリコン蕪板l上にNmのエピタ
キシャル層2が形成され、この層2はその上面よp基&
IK達するP盤の絶縁分m*域8に分軸され、図に示し
てないが各分割されたNmmgに素子が*Xされる。こ
の素子分離のためのP梃の絶縁領域8にNfi領域4が
形成される。Nff1領域4は図に示してない1t41
のエピタキシャル層20分割領域に例え#1NPN)ラ
ンジスタt*成する場合におけるエンツタ形成用のリン
拡散により同時に形成される。エピタキシャル層2及び
分離領域8上に二酸化シリコンjIISが形成され、J
illI6に孔が開けられて、分離領域8に接続された
陰極金属引出配線6及びNff1懺域4に接続された陰
徳金属引出配線7がそれぞれ形成される。このようにし
て得られたダイオードの逆方向降伏電圧は、同時に得゛
られるNPN)ツンジスタのエンツタペース接合のそれ
よりも約1v低いものとなる。
By applying this to the construction of transistors, the noise characteristics,
The current amplification factor, etc. in the collector low current region is improved. If you use this invention zener diode Kxa, you will be happy 10
When a zener diode is obtained by diffusing impurities of s6 strength in the Pal diffusion region KNm, and when electricity is extracted from the metal thin film from the Nfi high degree region, the PH@gold in the atPH region and the NW high concentration region is Pull it out without crossing the top. For this reason, the P layer region t of $1, the JIIIP board deaf region and the inter-board region are formed as auxiliary regions with a lower doping amount than the jllPNfi region, and the J11m1g and Pml regions K ji and extend it. The electrode is pulled out from the Nil high-1 region above the asp bulge region. In this way, the metal wiring is prevented from crossing the PN junction that determines the reverse voltage of the Zener diode. This is a conventional zener diode, in which an epitaxial layer 2 of Nm is formed on a pH silicon substrate, and this layer 2 has p-groups and
The axis is divided into the insulation m* region 8 of the P board that reaches IK, and the element is divided into *X for each divided Nmmg, although not shown in the figure. An Nfi region 4 is formed in the insulating region 8 of the P lever for element isolation. Nff1 area 4 is not shown in the figure 1t41
For example, #1NPN) is simultaneously formed by phosphorus diffusion for forming an entrant in the 20 divided regions of the epitaxial layer. Silicon dioxide jIIS is formed on the epitaxial layer 2 and isolation region 8, and J
A hole is opened in the illI6, and a cathode metal lead wire 6 connected to the isolation region 8 and a negative metal lead wire 7 connected to the Nff1 area 4 are formed, respectively. The reverse breakdown voltage of the diode obtained in this way is about 1 V lower than that of the entrapped junction of the NPN transistor obtained at the same time.

この従来のダイオードにおいては、第1図に20として
示すように領域8及び4間のPN接合の少なくとも一部
の上管シリコン酸化膜を介して陰極の引出電極丁が必ず
横切りていゐ。先にも触れたように電極用金属薄@7は
直下のシリコン酸化簿膜6に機械的ストレスを与え、5
i−sio、界面附近に電荷がIjII獲され易い低レ
ベルの単位が形成される。ゼナーダイオードはその逆方
向降伏はゼナー効果のみならず雪崩降伏が起ると、熱い
荷電粒子が発生してシリコン酸化膜す中に壮大され、前
記低レベルの単位に艙嫌され、空関電萄の再分布が起り
、降伏電圧が時間と共にシフトする。アニール(600
’C°8G分)をすることにより成る@縦、機械的スト
レスは#lk和され、従って5t−sio、界面附近の
上記低レベル単位を減少することができるが完全でない
、。
In this conventional diode, as shown at 20 in FIG. 1, the cathode lead electrode always crosses at least part of the upper tube silicon oxide film of the PN junction between regions 8 and 4. As mentioned earlier, the electrode metal thin film @7 applies mechanical stress to the silicon oxide film 6 directly below it, and
i-sio, a low-level unit is formed near the interface where charges are easily captured by IjII. Zener diodes have reverse breakdown not only due to the Zener effect, but also when avalanche breakdown occurs, hot charged particles are generated and spread into the silicon oxide film, which is absorbed by the low-level units, causing air-transmission problems. redistribution occurs, and the breakdown voltage shifts with time. Anneal (600
By doing 'C°8G min) @longitudinal mechanical stress is summed, thus 5t-sio, the above-mentioned low level unit near the interface can be reduced, but not completely.

この発明では降伏電圧を決定するPNii合上の810
.1電極用金属薄膜が横切らないようにされる。
In this invention, 810 on the PNii joint that determines the breakdown voltage.
.. The metal thin film for one electrode is prevented from crossing.

この*@tNPN)ランジスタに適用した例’f:lA
2FgK示す、トランジスタの特性の中で、雑音特性、
低電t&領域内電流増幅率などは、籍にエミッタペース
接合とその近傍の81 810m界面の影響を大きく受
妙る。この影響を避けるようにしたのが仁のj1411
iIO例であってN]liのエピタキシャル層2にペー
ス領域12が形成される。この通常のベース領域12に
近接して、これよ)もドープ量が多く、最終的に領域1
2よりも接合が床くなるように、即ち基板IKより近づ
(P@0領域11Vr@助領域として形成する。これ等
領域11及び12に延在してエンツタをIl成するNl
l高濃度領域18が形成される。エミッタ電極16tP
l!領域11上のNg高濃度領域18より引出し、領域
12@には姑醍させない。よって2りυエミッタベース
接合ができて、領域1畠及びml!tそれぞれ工(ツタ
及びベースとするトランジスタと、領域l畠及びlit
それぞれエミッタ及びペースとする2つのトランジスタ
が併存する。#i者は#l!看に比べて注入効率は^く
、ベース中が狭く、^い電流増幅率を示すので、第2図
のトランジスタの電流増幅率は領域11及び12の接す
る部分21!境にしてエミッタ111、ベース12によ
って、はとんど決定される。従ってエミッタ電4ffi
 16 l 111111域〕上ノNllAl11度i
l域18から引出すと支配的なエミッタペース接合、即
ち領域12及び18間の接合のいずれの点の上の810
、上を金属薄m[16が横切ることがない。
Example applied to this *@tNPN) transistor 'f:lA
Among the transistor characteristics shown in 2FgK, the noise characteristics,
The low current t and current amplification factor within the region are greatly influenced by the emitter paste junction and the 81-810m interface in its vicinity. Jin's j1411 was designed to avoid this effect.
A space region 12 is formed in the epitaxial layer 2 of N]li in the iIO example. Close to this normal base region 12, this one) is also highly doped, and finally the region 1
2, that is, closer to the substrate IK (formed as a P@0 region 11Vr@auxiliary region).
A high concentration region 18 is formed. Emitter electrode 16tP
l! It is extracted from the Ng high concentration region 18 on the region 11, and is not applied to the region 12@. Therefore, two υ emitter base junctions are formed, and the area 1 and ml! trespective construction (ivy and base transistors, region l
Two transistors coexist, each serving as an emitter and a paste. #i person is #l! Since the injection efficiency is lower than that of the transistor shown in FIG. The boundary is determined by the emitter 111 and the base 12. Therefore, the emitter voltage 4ffi
16 l 111111 area] upper NlllAl11 degree i
810 above any point of the junction between regions 12 and 18, i.e.
, the metal thin m[16 does not cross over it.

Claims (1)

【特許請求の範囲】[Claims] 一導電鳳の高一度の蕗1M’4体領域と、これと連続す
る同−導電証の低II&度のmg半導体領域と、藺配s
iおよび爵2半導体領域にわ九りて形MLされた異なる
導電皺のm8半導体領域とvtj1Nシ、@紀惑2半導
体領域及び前記籐畠牛導体領域から引き出される各電極
はIm紀纂2牛導体領域とlIl紀畠8半導体領域との
境界部に形成されるPNm金の上を通らないように施さ
れていることt特徴とする半導体装置。
A 1M'4-body region with a high degree of conductivity, a continuous 1M'4 semiconductor region with a low II & degree of conductivity, and a 1M'4 body region with a high degree of conductivity
The m8 semiconductor region and vtj1N of different conductive wrinkles formed across the i and 2 semiconductor regions, and each electrode drawn from the 2 semiconductor region and the rattan conductor region are A semiconductor device characterized in that the PNm gold formed at the boundary between the conductive region and the semiconductor region is formed so as not to pass over the PNm gold.
JP11105982A 1982-06-28 1982-06-28 Semiconductor device Pending JPS584980A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11105982A JPS584980A (en) 1982-06-28 1982-06-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11105982A JPS584980A (en) 1982-06-28 1982-06-28 Semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2794474A Division JPS50120971A (en) 1974-03-09 1974-03-09

Publications (1)

Publication Number Publication Date
JPS584980A true JPS584980A (en) 1983-01-12

Family

ID=14551355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11105982A Pending JPS584980A (en) 1982-06-28 1982-06-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS584980A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0492339A2 (en) * 1990-12-24 1992-07-01 Motorola, Inc. Noise reduction technique for breakdown diodes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0492339A2 (en) * 1990-12-24 1992-07-01 Motorola, Inc. Noise reduction technique for breakdown diodes

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