JPS5848517A - Two-terminal type ultrasonic wave delay circuit - Google Patents

Abstract

PURPOSE:To obtain small sized delay circuit and comb type filter, by using a two-terminal type ultrasonic wave delay line with small external size. CONSTITUTION:A signal passing through a coupling capacitor C1 is introduced to a C-E type split phase inverting circuit consisting of resistors R1-R4 and a transistor TR. A signal generated across the resistor R4 passes through a coupling capacitor C3 and a matching impedance Z5 and is introduced to a two- terminal type ultrasonic wave delay line D. Further, a signal generated across the resistor R3 passes through a coupling capacitor C2 and the amplitude is varied at a variable resistor VR. The sum of a signal split at the resistor VR, a delay signal on the line D and a through-signal is applied to a load resistor 6. Thus, an output signal of a coupling capacitor C4 is the signal difference between two paths, then this circuit can be used as a delay circuit or a comb type filter by adjusting the variable resistor VR.

Description

[Detailed description of the invention] The ultrasonic delay line compensates for VTR dropouts.

It is indispensable for contour correction in broadcast video cameras and for constructing comb filters used to improve the image quality of NTSC color television receivers. FIG. 1 shows a conventionally used four-terminal ultrasonic delay line. Here, 1°2 indicates the input/output terminal, 3 indicates the delay medium, and the broken line indicates the direction of propagation of the ultrasonic wave. Such a delay line with separate input and output terminals has a limit in meeting the demands for lighter and more compact components. For example, 1H delay line (
The horizontal scanning time of a television signal is 63.556 μsea in the NTSC television system.
a), the ultrasonic path length is approximately 16,2 (1 m
Even if the ultrasonic waves are reflected multiple times for miniaturization, the size of the glass medium will be about 20 x 30 when suppressing spurious waves is taken into account.

The present invention aims to provide a new two-terminal type ultrasonic delay circuit that overcomes the drawbacks of the conventional delay line.

FIG. 2 shows a two-terminal ultrasonic delay line according to the present invention.

Here, 4 is a common input/output terminal, and 6 is a delay medium.

The characteristic of this delay line is that the input/output terminal 4 is common, and by passing the same path twice, it is possible to obtain a delay time of, for example, 1H with the size of the v2H delay line. .

FIG. 3 shows the basic configuration of a delay circuit using this new delay line. Here, 6 is a signal input terminal, 7 is a matching circuit, 8 is a schematic representation of the two-terminal ultrasonic delay line shown in Figure 2, 9.10 is an amplification degree, and 2 is an amplifier. ,
11 is a subtracter, and 12 is a signal output terminal. Now input end 6
Input signal to EA = αS11ω to fist...
・・・－・・・・・・・・・(1), then ゛■ of the subtractor 11
Large input EB = α + sinωt ・・・・・・・・・・・・
......(2). On the other hand, since the e input of the subtractor 11 is the sum of the through signal and the delayed signal, EC=α is 2dtnmt +, ak2 is 51+1. lω
(t-τag) - (3) (However, k3 is the attenuation amount due to delay a8, and τω is the delay time at the angular frequency ω. Also, the contribution by the matching circuit 7 is omitted.) Therefore, the subtracter The output of 11 is Eo = α((kl-kO plane t- to 2 to 5sfnω(t-
ra + month - 44) □. Here, if the gains of amplifiers 9 and 1o are adjusted and k1 = 2, then Eo knee α will be 2 and 3s stone ω (-τω)...
(5) As a result, the output signal is delayed by the delay time τ0 with respect to the input signal. Also, if we set % to +- to 2: k2ks, Eo := a k2ks (mast -s+Ina
+ (t-rω month = α = 2 kg (2 (1 + cos ωτω month - (ω = 1 ψ) 0., (6), so the amplitude of EO is 2 J as Eo(w) = :2α as ωτω changes. ;a
+τ, =2uyr(n=o, 1.2-・)Eo(jm)
=C; ωr(,,=(2n+1)π(n=o, 1.
2-) All bipolar. It exhibits so-called comb-shaped characteristics.

Next, a specific circuit configuration of the two-terminal ultrasonic delay circuit of the present invention based on the above-mentioned principle and conveniently using a two-terminal ultrasonic delay line is shown in the fourth diagram. Here, C1 to C4 are coupling capacitors, and R1 and R2 are bias resistors.
R5 and R4 are load resistances of the transistor Tri, and R3
=R4. z5 is matching impedance,
D is the two-terminal ultrasonic wave delay line, VRFi, a variable resistor for adjusting the amplitude of the through signal, and R6 is the load resistance of the entire delay circuit.O Next, the operation of this circuit will be described on page 4. . The signal that has passed through the coupling capacitor C1 is introduced into a C-E type split phase inversion circuit consisting of resistors R1 to R4 and a transistor Tr. Here, the transistor T
If the collector load resistance R3 and the emitter load resistance R4 of r are selected to be equal, output voltages having the same value and a phase difference of 1800 are taken out from the collector and emitter of the transistor Tr. The signal generated across the emitter load resistor R4 passes through the coupling capacitor C3, the matching impedance Z5, and is introduced into the two-terminal ultrasonic delay line. Further, the signal generated across the collector load resistor R3 passes through the pulling capacitor C2, and its amplitude is varied by the variable resistor VR. In this way, the load resistor R6 receives the sum of the signal generated at both ends of the collector load resistor R3 and divided by the variable resistor VR, the output signal (delayed signal) of the two-terminal ultrasonic delay line, and the through signal. It will be applied □. However, since the through signal applied between the terminals of the ultrasonic delay line and the signal applied to both ends of the variable resistor VR are 18o0 different in phase, the signal taken out from the coupling capacitor C4 is 2 Since this is the difference between the signals passing through the two paths, by adjusting the variable resistor VR, this circuit can be used as a delay circuit or as a comb filter as described above.

Here, an example of circuit constants will be described for reference: power supply voltage 9V, C1=C4=1500pF, C2=
C5=0.1 pF, Rt=100Kn, R2
=120Ω, Rs=l(4=asoo, Zs
=330fl *V R is 10Ω variable resistor, R6
=, 10 KΩ, attenuation (maximum value - minimum value of amplitude of comb-shaped characteristic) The frequency range of 20 dB or more is fO (
Center frequency i PAL TV') II 7
Image reception a I), 4.43MH2) ±0.4MH
It was z. On the upper side, as a matching circuit, a pure resistor is connected in series with the coupling capacitor C3. In order to widen the band, a circuit configuration as shown in FIGS. 6(a) and 6(b) may be used. However, when such a matching circuit is used, coupling capacitor C2,': signal power flowing into load resistor R6 through variable resistor VR, pulling capacitor C5, matching impedance Zs
There is a phase difference of 1800 degrees δ between the signal passing through the delay line and flowing into the load resistor R6, and even if the variable resistor VR is adjusted, the attenuation amount of the warped comb characteristic may decrease. Therefore, it becomes necessary to insert an appropriate phase shifter between the coupling capacitor C2 and the variable resistor VR.

In addition, the part enclosed by the dotted line in Fig. 4, that is, the two-terminal ultrasonic delay line and the variable resistor VR, are built into one case and connected to an external shift inversion circuit to obtain the desired characteristics without adjustment. By configuring the circuit so that it appears, an ultrasonic delay circuit with even higher functionality can be obtained.

By using the circuit of the present invention as described above, a delay circuit and a comb-shaped filter using a two-terminal ultrasonic delay line with small external dimensions can be constructed, and the effects thereof will be great.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of a conventional four-terminal ultrasonic delay line, FIG. 2 is an explanatory diagram of a two-terminal ultrasonic delay line according to the present invention, and FIG.
The figure is a principle diagram of a delay circuit using a two-terminal ultrasonic delay line for explaining the present invention, FIG. 4 is a circuit diagram of a two-terminal ultrasonic delay circuit according to the present invention, and FIG. 6 (A) , (b) are circuit diagrams showing a configuration example of a matching circuit for explaining the present invention. R3... Collector load circuit, R4...
Emi, load resistance, C2...first coupling capacitor, VR...variable resistor, C5...
...Second coupling capacitor, Z5...
・Matching circuit (matching impedance), D
-...2-terminal ultrasonic delay line, R6...
Load of delay circuit (load resistance). Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
rjA Figure 2 Figure 3 Breast Figure 4

Claims (1)

[Claims] The signal generated across the collector load resistance of the C-E type phase inversion circuit is voltage-divided by a variable resistor through the first coupling capacitor, and the output signal is applied to the load of the delay circuit. The signal 1J2- generated at both ends of the emitter load resistor of the phase inversion circuit is applied to a two-terminal ultrasonic delay circuit having a common input and output terminal through a coupling capacitor and a matching circuit, and the output signal is applied to the load of the delay circuit. A two-terminal ultrasonic delay circuit that applies voltage to