JPH0458676A - Contour correction circuit - Google Patents

Abstract

PURPOSE:To prevent noise from being remarkable at a low level by controlling a ratio of a 3rd signal to be added to a 1st signal with a 2nd signal. CONSTITUTION:With a signal (a) inputted to an input terminal 1, a signal (b) passing through a delay line 3 whose delay time is td is inputted to a noninverting input terminal of a subtractor 4 and fed to one input of an adder 5. Moreover, the input signal is reflected at an output terminal of the delay line 3 and delayed by a time 2td and becomes a signal (c) added to the input signal at an input matching resistor 2. The signal (c) is inputted to an inverting input terminal of the subtractor 4. The subtractor 4 subtracts the signal (c) at the inverting input terminal from the signal (b) inputted to the noninverting input terminal and outputs a signal (d). On the other hand, a voltage gain of a voltage controlled amplifier 7 is controlled by a level of the signal (c). Thus, an output of the amplifier 7 is a signal (e), and the correction quantity of contour is reduced when the level of the signal (d) is low, resulting that the contour is corrected and a video image whose noise is not remarkable is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a contour correction circuit used in a signal processing circuit of a video recording/reproducing device 1 such as a VTR, video disc player, or video camera.

[Conventional technology]

The conventional technique will be explained based on FIG. 8 of the accompanying drawings. A video signal is input to an input terminal 31, passes through an input matching resistor 32, and is input to a delay line 33. The delay line 33 delays the signal by a certain period of time (for example, td).

The signal delayed by the delay line 33 is input to the positive input of the subtracter 34 and one input terminal of the adder 35. delay! ! Since the output side of the delay line 33 is received at a high impedance, a reflection effect occurs at the output end of the delay line 33, and this reflected signal is further delayed and transmitted to the input side of the delay line 33. The input signal and the signal delayed by 2td time are:
Added by input matching resistor 32 and subtracted by input matching resistor 34
input to the negative polarity input. Note that the input of the subtracter 34 is supplied to the other input of the adder 35, and a signal in which the contour portion of the input video signal is emphasized is added to f! #35 is output to the output terminal 36. In addition, various signals are shown in FIG. 9, and (a) is a video signal input to the input terminal 31.

(b) is a signal delayed by the delay line 33 by the td waiting time.

(c) is a signal obtained by adding the input signal and the signal reflected at the output end of the delay line 33 and delayed by 2td time at the matching resistor 32.

(d) is the output signal of the subtracter 34.

(e) shows the output signal of the adder 35 obtained by adding (d) to the above cb>.

[Problem to be solved by the invention]

A problem with the above-mentioned conventional technology is that it not only emphasizes the contours of the video signal but also emphasizes noise in the high frequency band. As a result, noise becomes noticeable and becomes a problem, especially when the level of the video signal is low. Therefore, it is possible to control the degree of emphasis of the contour portion of the video signal in accordance with the level of the video signal, but with the prior art, it has been difficult to control the degree of emphasis in a natural manner. The present invention aims to eliminate this problem.

[Means to solve the problem]

The contour correction circuit of the present invention includes a first means for generating a first signal obtained by delaying an input video signal by a time td, and adding the input video signal and a signal obtained by delaying the input video signal by a time 2td. a second means for generating a second signal obtained by subtracting the second signal from the first signal; and a third means for generating a third signal obtained by subtracting the second signal from the first signal, and adding the first signal and the third signal. and means for controlling the ratio at which the third signal is added in accordance with the second signal.

[Effect]

In the contour correction circuit configured as described above, the first
The ratio of addition to the second signal is controlled in response to the second signal. Therefore, an image with less noticeable noise can be obtained.

〔Example〕

One embodiment of the present invention will be explained with reference to FIGS. 1 and 2. When the signal a shown in FIG. The signal is input to the positive input terminal of the adder 5, and is also supplied to one input of the adder 5.

Furthermore, the input signal is reflected at the output end of delay 1IX3, and 2t
After a delay of d time, the input matching resistor 2 adds the input signal to the signal C. This signal C is input to the negative input terminal of the subtracter 4. The subtracter 4 subtracts the signal at the negative input terminal C from the signal at the positive input terminal, and outputs a signal d.

If this signal d is directly added to the signal d by the adder 5, high-frequency noise will become noticeable where the level of the signal d is not high. Therefore, the voltage gain of the voltage control amplifier (VCA) 7 is controlled by the level of the signal C. As a result, the output of the voltage control amplifier 7 becomes the signal e, and the amount of contour correction can be reduced where the level of the signal d is low, making it possible to correct the contour and obtain an image with less noticeable noise.

If the voltage control amplifier 7 is directly controlled by the input signal a, the contour correction signal will become unbalanced between the up edge and the down edge, as shown in the signal f.If contour correction is performed using this signal, the image will become unnatural. It ends up. Further, if the signal already controls the voltage control amplifier 7, the contour correction signal becomes the signal g, resulting in an unbalanced signal.

Note that when the input video signal contains high frequency components, the voltage control amplifier is controlled by the high frequency signal components, and the contour correction signal is amplitude-modulated by the high frequency signal components. Therefore, as shown in FIG. 3, it is desirable to control the voltage control amplifier 7 with a signal passed through a low pass filter (LPF) 8.

Another embodiment of the present invention will be described with reference to FIGS. 4 to 6.

In the embodiments shown in FIGS. 1 and 3, both the original video signal and the video signal for creating the contour correction signal are input to the input terminal l.

On the other hand, as shown in Fig. 4, the original video signal and
The video signal for contour correction can be separate.

In the embodiment shown in FIG. 4, a video signal for creating a contour correction signal is input to the input terminal 1, and a contour correction signal is generated as in the case of FIG. Supplied.

In contrast, the original video signal is input to the input terminal 9, and is delayed by the same delay amount td as the resistor 10 and the delay line 3.
ii, and is input to the other input terminal of the adder 5. The adder 5 adds the contour correction signal to the original video signal and outputs the result to the output terminal 6. In addition, resistance 12
is the output matching resistance of delay line 1].

The original video signal input to the input terminal 9 and the correction video signal input to the input terminal 1 are generated by, for example, a circuit shown in FIG. 5 or FIG. 6.

Using a signal obtained by adding video signals of several lines as the video signal for creating the contour correction signal has the advantage that contour correction in the diagonal direction of the screen can be performed more naturally.

Therefore, in the embodiment shown in FIG. 5, the video signal input to the input terminal 13 is delayed by IH at the delay line 14, and is output as the original video signal from the output terminal 16. The IH-delayed signal and the non-delayed signal are added by an adder 15, and this is outputted from an output terminal 16 as a video signal for contour correction.

In the embodiment shown in FIG. 6, 1H delay lines are provided on two sides, and the signal delayed by IH by [14] and the signal further delayed by IH (2H in total) by delay line 18 are not delayed. The signals are added by an adder 19 to generate a video signal for correction using a total of three horizontal scanning lines.

FIG. 7 shows yet another embodiment.

In the embodiments of FIGS. 1, 3 and 4, 2t
A signal delayed by d time was generated using reflection by making the output terminal of the delay line 3 high impedance, but in the embodiment shown in FIG. It is generated using two delay lines.

〔Effect of the invention〕

As described above, according to the contour correction circuit of the present invention, the third
Since the ratio at which this signal is added to the first signal is controlled by the second signal, the contour correction of the video signal is performed in a well-balanced manner, and the contour correction is reduced in areas where the signal level is low. Therefore, the drawback that noise is noticeable at low levels can be avoided, and it is also suitable for IC implementation.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the contour correction circuit of the present invention, FIG. 2 is a waveform diagram explaining the operation of the embodiment of FIG. 1, and FIGS. 3, 4, and 7. 5 is a block diagram showing the configuration of another embodiment of the contour correction circuit of the present invention, and FIGS. FIG. 8 is a block diagram showing the configuration of an embodiment of a conventional contour correction circuit, and FIG. 9 is a waveform diagram illustrating the operation of FIG. 8. 1.9, 13, 31... input terminal, 2, 10.32...
...Input matching resistance, 12.22...Output matching resistance, 3, 11, 14, 18, 20, 21゜33.
・Delay line, 4.34 ・Subtractor, 5, 19.23・
... Adder, 6, 16, 17, 36 ... Output terminal, 7
...Voltage control amplifier, 8...Low pass filter, 2
4...Attenuation view. Figure 1 Cause 2 (d) One piece per yen Kiryu corrects ``The input of the subtracter 34 is'' on the 15th line of page 2 to ``The output of the subtracter 34 is''. (2) Kiryu, page 9, line 18, r5 in "Brief explanation of drawings" in the specification. 19. 23...Adder, ``, r5.
19, 23, 15, 35...Correct with adder j. Figure 8 of the drawings will be amended as shown in the attached sheet. 8th

Claims (1)

[Claims] A first means for generating a first signal obtained by delaying an input video signal by a time td, and a second signal obtained by adding the input video signal and a signal obtained by delaying the input video signal by a time 2td. a third means for generating a third signal by subtracting the second signal from the first signal; and a third means for adding the first signal and the third signal. 4 and means for controlling the ratio at which the third signal is added in accordance with the second signal.