JPS5847728B2 - Input/output control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for controlling information transfer between a central processing unit and an input/output device.

In recent years, LSI microcomputers have become popular and there is a trend toward higher performance, and microcomputers with such high processing power generally have high processing speed.

On the other hand, information transfer between the central processing unit and the input/output device is performed via the input/output control device, but generally the data bus is shared between the central processing unit and the input/output control device, so both Data in between can only be dropped onto the bus for a certain amount of time.

Therefore, in order to cope with the increase in the speed of central processing units, conventionally,
For example, the data lines may be twisted pairs and shielded, or the entire side of the motherboard may be used to connect the ground line between the central processing unit and the input/output control unit to lower the line impedance of the ground line, and the signal line connection may be They use complicated methods such as wrapping.

The present invention was developed in view of the above-mentioned circumstances, and even if microcomputers etc. become faster, highly stable data can be maintained without having to worry too much about the implementation between the central processing unit and the input/output control unit. The purpose of this invention is to provide an input/output control method that enables transfer.

Simply put, in the present invention, two instructions are used for one data transfer between the central processing unit and the input/output device, the first instruction drops data onto the data path, and then after a certain period of time (i.e. After the bus line signal has stabilized), the next command issues a strobe signal to actually capture the data on the bus line.

Hereinafter, the contents of the present invention will be explained in detail with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, particularly showing an interface section between a central processing unit and an input/output control unit.

In the figure, 10 is a microcomputer, that is, a central processing unit, 11 is a mode register that specifies the data transfer mode, that is, output or input, and 12 is a device register that latches address information, etc. of the input/output device to which the data is transferred. , 13 is a data register in which commands or output data for the other input/output device are latched in the output mode, and 14 is an input for taking in status information or data from the input/output device into the microcomputer 10 or main memory in the input mode. It is a gate.

The mode register 11, device register 12, data register 13, and input gate 14 are connected to the microcomputer 10 by a transfer mode designation line 15, address bus 16, and data bus 17, and are connected to the input/output control device side. and is coupled via an input/output mode line 20, a device designation line 21, and a bidirectional data bus 22.

18 is an input strobe line, 19 is an output strobe line, and 23 is an interrupt line.

In the case of the present invention, one data transfer between the central processing unit and the input/output device is achieved by using two consecutive input/output instructions.

That is, the first input/output command specifies the data transfer mode, the destination input/output device, etc., and the next input/output command enables the strobe signal line 18 or 19.

First, a case will be described in which data is transferred from the central processing unit side to the input/output device side.

With the first output command, the microcomputer 10 sets the mode register 11 to output mode through the transfer mode designation line 15, and latches the destination input/output device address on the address bus 16 into the device register 12.

Usually, a bit is added to this input/output device address to distinguish whether the information to be transferred is data or an instruction.

These mode register 11 and device register 1
The contents of 2 are directly transferred to the manual/output mode line 20 and the device specification line 21. Around this time, the data (or commands) latched to the data register 13 via the data bus 17 are also transferred to the input/output data bus 22. fall into.

When the next output command is issued following this output command, the microcomputer 10 outputs an output strobe signal to the line 19.

On the other hand, on the input/output control device side, the device specification line 21,
The signal on the data bus 22 is taken in.

In this case, the input/output mode line 2 is set in the first output command.
0, device designation line 21, and data bus 22, there is a certain time delay before an output strobe signal is sent to line 19 with the next output command.

Therefore, when the output strobe signal is output to line 19, the signals on input/output mode line 20, device specification line 21, and data bus 22 are already stable, and the input/output control device side This makes it possible to reliably capture the signals of

FIG. 2 shows a schematic configuration of the side that latches data in the input/output control device in the above-mentioned output mode and time charts 1 to 1 of the main signals.

That is, when the input/output device address on the device specification line 21 is decoded by the decoder 27 and the input/output device is specified, the decode output line 25 becomes "1", and
If the information from the central processing unit is data, the signal line 24
Then, the match condition of the AND gate G1 is satisfied at the timing of the output strobe signal sent to the line 19, and the output data falling on the data line 22 is latched into the register 28.

It is assumed that the output strobe signal sent to line 19 has a certain time width and is rounded.

In other words, the frequency band used is lowered.

FIG. 3 shows a circuit and timing chart for creating this output strobe signal.

In FIG. 3, 100 is a control signal created by selecting one of the output instructions in the microcomputer 10, and the rise of this signal 100 triggers the monomulti 102 to create a signal 102 with a desired time width. do.

This signal 102 passes through an integrating circuit 103 to become a signal 104 with a distorted waveform, which is sent to an operational amplifier 105.
An output strobe signal 106 is obtained through.

Next, a case will be described in which data is transferred from the input/output device side to the central processing unit side.

First, by the first input command, the microcomputer 10
sets the mode register 11 to input mode and latches the destination input/output device address in the device register 12.

The contents of this mode register 11 are sent to the input/output device side through the input/output mode line 20 and the contents of the device register 12 are sent through the device specification line 21, respectively, and as a result, the contents specified by the device register 12 are sent to the input/output device side. Data from the partner input/output device is dropped onto the data bus 22.

When the next input command is issued, the microcomputer 10 issues an input strobe signal to the line 18 to drive the input gate 14 and take in the data on the data bus 22 through the input gate 14.

In this input mode, the output side of the data register 13 becomes high impedance due to the output of the mode register 11, so that the data on the data bus 22 is not latched into the data register 13.

FIG. 4 shows a schematic configuration of the input/output control device in the case of the above input mode, in which the input mode signal is output to the input/output mode line 20, and the lines 24 and 25 are activated based on the information on the device designation line 21. Since the signal becomes "1", the match condition of the AND gate G2 is established, and the data is sent to the data bus 22 through the output gate 30.

The data that has fallen onto the data bus 22 is taken into the central processing unit at the timing when the input strobe signal is generated.
The time width of the input strobe signal at this time only needs to be able to follow the internal processing operation of the microcomputer, so the time width as in the case of the output strobe signal is not required.

The dashed line in FIG. 2b indicates this input strobe signal.

In this way, in the present invention, one data transfer between the central processing unit and the input/output device is executed by a combination of two instructions, so if an interrupt occurs during the execution of these two instructions, the input/output Control may become abnormal.

For example, if an interrupt is issued through line 23 while the first input/output instruction is being executed, another routine is executed, other input/output devices are activated, and then the original routine is returned and the next input/output instruction is executed. An input or output strobe signal will be issued, but at this time, the contents of the device specification and mode specification have already changed. It will end up being put away.

To avoid this, you can disable interrupts while executing input/output instructions.

As is clear from the above description, according to the present invention, even if the processing speed of the central processing unit improves, there is no need to pay too much attention to the wiring between the central processing unit and the input/output device, and the processing speed between the two can be increased. It becomes possible to perform stable data transfer.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the system configuration according to the present invention, particularly on the central processing unit side; FIG. 2 is an embodiment and operation timing chart on the input/output control device side in the output mode; The figure shows an example of a circuit for creating an output strobe signal and a timing chart, and FIG. 4 shows an embodiment on the input/output control device side in the input mode. 10...Central processing unit, 11...Mode register, 12...Device register, 13
...Data register, 14...Input gate, 18, 19...Strobe signal line.

Claims (1)

[Claims] 1. In a system that transfers data between a central processing unit and an input/output device through a data path, two instructions are required for one data transfer between the central processing unit and the input/output device. The first command specifies the input/output mode, specifies the input/output device, sends data to the data bus, etc.
An input/output control method characterized in that data on the data path is fetched by a next instruction. 2. The input/output control system according to claim 1, wherein the central processing unit is an LSI microcomputer.