JPS5847380A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To obtain a reproduced image having removed a white-and-black point image defect by providing solid-state image pickup elements, improving driving conditions for the charge transfer of the vertical transfer part, and holding the regularity of charge transfer time. CONSTITUTION:A solid-stage image pickup device is constituted by providing solid-stage image pickup elements having the structure as shown in the figure, and then supplying two-phase driving signals phi11 and phi12 to vertical transfer electrodes PHI1 and PHI2. Thus, the two-phase driving signals phi11 and phi12 are supplied to the vertical transfer electrodes PHI1 and PHI2 to perform an interlaced field read of signal charges, and the charge transfer of the vertical transfer part 2 is carried out only in periods of transfer pulses Q1 and Q2 in each horizontal blanking period, so its transfer time is held invariably constant and a mode of repetition is unchanged to secure the regularity. Therefore, no black-and-white dot defect appears in a reproduced image based upon an obtained image pickup output signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device equipped with a solid-state imaging device configured using a charge transfer element, and more specifically, to a method for devising driving conditions for charge transfer to the solid-state imaging device. The present invention relates to an improved interline transfer type stationary imaging device in which defects on a reproduced image can be quickly removed from the image pickup output signal.

Charge coupled device (charge coupled device)
Solid-state imaging devices constructed using charge transfer devices such as COD (hereinafter referred to as COD) can be roughly divided into frame transfer type and interline transfer type, and each type is used properly to take advantage of their advantages. .

For example, an example of an interline transfer type CCD image sensor is shown in FIG. a light receiving/vertical transfer section 3 including a vertical transfer section formed of a plurality of columns of CCDs arranged along vertical columns; and a horizontal transfer section coupled to the light receiving/vertical transfer section 3. and an output section S, and a signal output terminal ra is led out from the output section S.

A solid-state imaging device equipped with such an image sensor is constructed, but in that case, the vertical transfer section and the horizontal transfer section include the following:
A charge transfer operation is performed by supplying a predetermined vertical transfer drive signal and a horizontal transfer drive signal 2, respectively, and the signal charge obtained in each light receiving element portion l by light reception within a predetermined light reception period is transferred vertically. The data is read out to the horizontal transfer section 1, and is sequentially vertically transferred to the horizontal transfer section in each horizontal blanking period by the charge transfer operation of the vertical transfer section. To this horizontal transfer section, signal charges are sequentially transferred for each signal charge obtained in l horizontal rows of the light receiving element section L, and these are transferred to the output section S during each horizontal video period by the charge transfer operation of the horizontal transfer section S. The signal is transferred horizontally, and a single image output signal is obtained at the signal output terminal 5a.

More specifically, as shown in FIG.
A successive gate section 6 is formed between each vertical column and each vertical transfer section 1, and a channel stopper 7 is further formed around each light receiving element section l. Further, an overflow drain g is disposed adjacent to the channel stopper 7, and the overflow drain and the adjacent vertical transfer section are separated by the channel stopper. Further, on the vertical transfer section 2, vertical transfer electrodes φl and φ2 extending in the horizontal direction are alternately arranged in the vertical direction. Vertical transfer electrodes φ/ and φ2 are storage section electrodes φ/c and φ2c and transfer section electrodes (potential barrier contacts) φ/1 and φ2t, respectively.
The area below the electrodes φ/C and φ2o is the storage region of the vertical transfer section, and the electrodes φ/ and φ2o are
The area below 2t is the transfer region (potential barrier region) of the vertical transfer section, and the transfer region has a shallower (lower) potential than the adjacent storage region to form a potential barrier. is provided or insulated! ¥4
The thickness of 11 is treated as a dog. Second
FIG. B shows a cross section of IIB-11B in FIG. ,
In this example, the vertical transfer electrode also serves as the read gate electrode, and the vertical transfer electrode φ2 (more specifically, the storage electrode φ2c) is also arranged on the read gate portion 6.

An interline CCD that constitutes such a solid-state image sensor
There are two formats for reading out signal charges from the light receiving element section to the vertical transfer section in the light receiving/vertical transfer section of the image sensor: a frame readout mode in which signal charges accumulated in the light receiving element section for one frame period are read out, and a frame readout mode in which signal charges accumulated in the light receiving element section are read out for one frame period. to l field period, i.e.
There is a field read mode in which unsignal charges accumulated for one frame period are read out. In frame read mode,
Due to the configuration of the light receiving/vertical transfer section, the degree of vertical modulation due to the aperture effect is high, which is particularly convenient for imaging relatively slowly moving subjects.However, in the field readout mode, the light receiving element section Since the signal charge accumulation time is short, equivalent afterimages as seen in frame readout mode do not occur, and flicker is suppressed by the aperture effect, so relatively quickly moving subjects and flicker are easily noticeable. It has the advantage of being suitable for photographing a subject.

In this field read mode, the vertical transfer electrodes φl and φ2 of the light receiving/vertical transfer section 3 shown in FIG.
A co-phase drive signal having a read pulse with a field period and a vertical transfer pulse with a period of 1 horizontal period is supplied to the storage electrodes φ/c and φ2o disposed above the read gate portion with a field period. When successive pulses are supplied with
A readout pulse voltage is applied to each of the readout gate sections B in a field period, and the signal charge accumulated in each light receiving element section during the field period is read out to the accumulation region of the vertical transfer section 2 via the readout gate section. . Then, in each horizontal blanking period, vertical transfer pulses with opposite phases are supplied to the vertical transfer electrodes φl and φ2, respectively, thereby vertically transferring the read signal charges to the horizontal transfer section. will be held. In this way, signal charges are read out and transferred for each field, but in order to obtain an interlaced imaging output signal between the first field (odd field) and the second field (even field), it is necessary to In each vertical column of section 1, the signal charges of two adjacent light receiving element sections are added together to form a signal charge for the horizontal video period, and the signal charges of two adjacent light receiving element sections to which this signal charge is added are added. The combinations of the light receiving element portions are made different between the first field and the second field. For example, in the first field, the 1st and 2nd, the 3rd and 9th, and so on in each vertical column are 11.
On the other hand, in the second field, the 2nd and 3rd light receiving elements in each vertical column, the 5th and 5th light receiving elements, etc. are combined, and the light receiving elements are shifted one by one, and two light receiving elements are combined. be combined. As a result, so-called interlaced field readout is performed. Also, as shown in the example shown in FIG. When the provided image sensor is used, the vertical transfer electrodes φl and φ2 are each supplied with a two-phase drive signal having a cycle of 1 water period and having transfer pulses with mutually opposite phases, A read pulse generated at a field period is supplied to the read gate electrode Ω. When this readout pulse is supplied, the signal charges in the light receiving element section l are read out to the vertical transfer section 2 via the readout gate section 6, and the second
In the case of [tll shown in Sono, the operation is similar.

By the way, when a reproduced image is obtained based on the image pickup output signal obtained at the signal output terminal a under the operation of the light receiving/vertical transfer section 3 as described above, black and white points are located above and below in the reproduced image. Image defects that appear adjacent to the image may occur. This defect is commonly called a "black and white spot," and the dot part tends to extend in a linear shape, especially when imaging under low illuminance, and cannot be eliminated by normal defect correction. Such a defect is caused by the presence of a locally deep (high) potential portion in the vertical transfer section λ.

The locally deep potential in this vertical transfer section 2 is a region where the impurity concentration in the vertical transfer section 2 is uneven and locally formed has a high impurity concentration, or a region where the impurity concentration is locally formed. The thickness of the upper insulating layer // is non-uniform, and the locally formed film is present in large parts.
This is a structural defect in the image sensor. FIG. 9 shows a state in which a locally deep potential portion occurs within the vertical transfer section 2. In FIG. The stair-like display shown in the storage region PC and transfer region Pt below the storage region electrodes φ/C and φc, the transfer region electrode φ/, and the φcot which constitute the vertical transfer electrodes φl and φ2, respectively, is as follows. During the transfer operation, the potential of each part becomes deeper (higher) as it goes downward. ), and X indicates the local ((
This is the deep part of the potential formed. .

If such a deep region X of local potential exists, as shown in the figure, the region
A substantially insulated gate field effect transistor (hereinafter referred to as MOS-FET) with drain D is formed, and vertical transfer is performed as a sub-threshold current due to the weak inversion operation of this MOS-FET. Charges flow from the portion X under the electrode φl into the "potential well" in the region under the preceding vertical transfer electrode φ2. The charge deposit flowing from this portion X into the well of the preceding potential is
If the time length and period of charge transfer in the vertical transfer section 2 are constant, they will not change and will be constant, and will not pose a separate problem. However, in actual charge transfer in the vertical transfer section 2, a situation occurs in which the transfer time is long when reading signal charges of each field.゛During this long transfer time, a large amount of the charge accumulated in the portion 2X flows into the leading potential well compared to the normal charge transfer state, supplying an excessive signal charge, and on the other hand, This causes a loss of signal charges and charges in the rear region. This causes an excess or deficiency of signal charges, leading to deterioration of the image pickup output signal, and defects such as black and white dots appear on the reproduced image.

Considering the above-mentioned causes, in order to solve the problem of black and white point image defects, it is necessary to ensure that the regularity of the time after charge transfer in the vertical transfer section is not disturbed even when reading signal charges. I'm smiling.

In view of these points, the present invention includes a solid-state image sensor, improves driving conditions for charge transfer in its vertical transfer section, maintains regularity of charge transfer time, and eliminates black-and-white point image defects. The present invention provides an interline transfer solid-state imaging device that can obtain a reproduced image with removed images. The implementation of the present invention will be described below.

An example of the solid-state imaging device according to the present invention includes a solid-state imaging device having a structure as shown in FIG. 7 and FIG. 11. is configured by being supplied with co-phase drive signals ψ/ and ψλ as shown in FIG. The drive signals ψl and ψλ are ternary Nopel signals, respectively, having a first high level vR and readout pulses R/ and R2 generated for each field, and a first high level vR for each horizontal video period. It takes a second high level VH lower than 7 pels VR, and has transfer pulses Ql and Q2 that take a low level VH and have different phases from each other in each horizontal blanking period HB. Here, regarding the read pulses R and R2, fields in which they coincide in time and fields in which one of the read pulses R2 and R/ precedes the other by l horizontal period H alternately arrive. be made to do. In the illustrated example, in the first field F/, the readout pulses R/ and R2 coincide in time, and in the second field F2, the readout pulses R, 2 precede the readout pulses R/ by t horizontal periods H. Further, although both the transfer pulses Ql and Q2 are generated within the horizontal blanking period HB, the transfer pulse Qt is said to temporally precede the transfer pulse Q2.

By supplying such driving signals ψ/ and ψ, the storage part electrodes φ/C and φ2o and the transfer part electrodes φ/1 and φ, 2t, which constitute the vertical transfer electrodes φl and φ of the vertical transfer part, respectively.
A voltage at the second high level VH is applied to both the lower storage region and the transfer region during each horizontal video period. Also,
To read the signal charge from the light receiving element section/ to the vertical transfer section 2, read pulses R/ and R2 are supplied and read out to the read gate section 6); Furthermore, the charge transfer operation in the vertical transfer section 2 is performed by applying a pressure tJ to the vertical transfer electrode φl in each horizontal blanking period HB. , a voltage of low level vL of the transfer pulse Qt is applied to the region under the vertical transfer electrode φ/, and then,
The transfer pulse Q2 is supplied to the vertical transfer electrode φ2, and the low level VL of the transfer pulse Q2 is applied to the area under the vertical transfer electrode φλ.
This is done by applying a voltage of . In that case, in the first field F/, the read pulses R/ and R2
are supplied at the same time, the signal charges of each light-receiving element section l are simultaneously read out to the region below each electrode φl and φ2 of the vertical transfer section 2, and then the first arriving transfer pulse Q/ causes the signal charge below the electrode φl to be read out simultaneously. The signal charge in the region is transferred to the region under the next stage electrode φ2 and added to the signal charge read out under the electrode φ, and by the next arriving transfer pulse Q2,
The added signal charges in the area under the electrode φ2 are further transferred to the area under the electrode φl in the next stage. Thereafter, the data is sequentially transferred each time the transfer/ζ pulses Qt and Q2 arrive.

Next, in the second field F2, the readout pulse R2 is first supplied, and only the area under the electrode φ of the vertical transfer section 1 is read from the corresponding position of the light receiving element section l. The signal charge is read out and transferred to the region under the next stage electrode φl by a transfer pulse Q2 that arrives immediately thereafter. Next, the read pulse R/, which is supplied with a delay of /horizontal period H from the read pulse R2, causes the electrode φ of the vertical transfer section
A signal charge is read out from the corresponding position of the light-receiving element part l in the area under l, and is added to the signal charge that had been previously transferred from the area under the previous electrode φ2. Ru. Thereafter, the added signal charges are sequentially transferred each time transfer pulses Qt and Q2 arrive. In the end, in the first 74th field, the signal charges of two adjacent light-receiving element portions located at positions corresponding to the electrode φl and the next stage electrode φ2 are added together and vertically transferred.
In the second field, the signal charges of two adjacent light-receiving elements located at positions corresponding to the electrode φ and the next stage'iJl pole φ/ are added and vertically transferred. An interlaced e-field readout of signal charges is performed. Here, the charge transfer in the vertical transfer section 2 is as follows:
This is performed during each transfer cycle Ql and Q2, and the transfer time is always constant. Note that the amplitude VR-VH of the above-mentioned readout signals (Rules R/ and R2 is the transfer necessary for charge transfer in the vertical transfer section) (Rules Ql and Q
, 2(7) The amplitude VW-VL is selected to be smaller than the readout pulse Ett and R2; This is to prevent the formation of a corresponding stepwise potential difference. A vertical output gate section is arranged at the final stage of the vertical transfer section, and this is turned on at the timing of the transfer/curse Ql or Q2 to transfer the signal charge from the vertical transfer section 2 to the horizontal transfer section. In this way, during the horizontal video period, the signal charge 7 during horizontal transfer is transferred from the horizontal transfer section y ih to the vertical transfer section ko.
5: Preferably, there is no risk of leakage.

By supplying the two-phase drive signals ψl and ψ2 as described above to the vertical transfer electrodes φl and φ2, interlaced field readout of signal charges can be performed.・Since the transfer is performed only during the transfer pulses Qt and Q2 within the imaging period, the transfer time is always constant and the repetition pattern is also unchanged, ensuring regularity and accuracy. Therefore, the obtained imaging output signal As a result, black-and-white spot defects do not occur on reproduced images.

The above-mentioned embodiment is a co-phase 1 drive system in which the vertical transfer section of the solid-state image sensor is driven in two phases, but the present invention uses a two-phase drive system in which the vertical transfer section of the solid-state image sensor is driven in a V phase. It can also be applied to drive systems. .

FIG. 6 shows the structure of the light receiving/vertical transfer section of the image sensor in another embodiment of the present invention employing such a V-phase drive method, and shows parts corresponding to each part of the imaging element shown in FIG. 2A. 5 is given the same number as in FIG. , and are arranged in a K-back arrangement. The rough transfer electrodes φl' and φ3' also serve as read gate electrodes.

FIGS. 7A, B, C, and D represent three-phase drive signals 'F/', 92', and 93' supplied to the image sensor shown in FIG.
and ψq′, which are the vertical transfer electrodes φl′, φ,
/, φ, l, and φS', respectively.

In this case, the area below the vertical transfer electrodes φ/', φ3' and φS' becomes the storage region of the vertical transfer section 2, and the vertical transfer electrode φ2
′ reaches the transfer area of the vertical transfer section.

Then, the above-mentioned readout/(readout similar to the pulses R/ and R3) (readout pulses R1' and R3') takes the first high level VR of the drive signals ψl' and 3'. The signal charges in the element section t are read out so as to be in the interlaced field read mode, and a second high level voltage VH is applied to the storage region of the vertical transfer section t during each horizontal video period.

Note that in this example, the drive signal ψλ′ causes the electrode φ
A low level VL voltage is applied only to the lower transfer region of the electrode during the horizontal video period. The driving condition may be such that voltage force is applied.

Charge transfer in the vertical transfer section 2 is performed during the horizontal blanking period HB when the driving signal ψ is at the second high level VH, and the driving signals ψl', 93' and ψV' are in phase. This is done by making the transfer pulse different and taking a low level vL. During the charge transfer operation, a voltage of the second high level VH is simultaneously supplied to the regions under two or three adjacent electrodes, and a potential under these two or three electrodes is applied. The wells are formed sequentially, and the charge transfer efficiency is improved.
H force: smaller than the amplitude V H - V L required for charge transfer in the vertical transfer section 2. Same as above1. In this embodiment as well, the vertical transfer section 2 In charge transfer, the transfer time is always constant, the repetition pattern is also unchanged, and the regularity is maintained accurately, resulting in a 4-station image output that does not cause black and white spot defects on the reproduced image. can get.

As explained above, according to the present invention, even if an interline transfer type image sensor has a defective part where the potential locally becomes deep in its vertical transfer part, the reproduced image due to the defective part 5 It is possible to obtain an imaging output signal in an interlaced field readout mode that does not cause image defects in images, thereby improving the quality of reproduced images. In addition, from the viewpoint of production of image pickup devices, since it becomes possible to handle image pickup devices having such defective parts as good products, the production yield of image pickup devices is substantially improved. Furthermore, since the time ratio in which multiple phase drive signals supplied to each vertical transfer electrode are simultaneously at a high level voltage is large, stable operation of the overflow train, which is shaped by the embedded micro-channel of the image sensor, is increased. will be obtained.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an interline transfer type solid-state image sensor that can be used in an embodiment of the present invention, and FIGS. A and B are diagrams used to partially explain the image sensor shown in FIG. 1.
FIG. S is a waveform diagram showing the light reception/vertical transfer unit drive signal in one embodiment of the present invention [tll, and FIG. The partially enlarged view shown in FIG. 7 is a waveform diagram showing the light receiving/vertical transfer unit drive signal in another embodiment of the invention described above. In the figure, l is the light receiving element part, C is the vertical transfer part, 3 is the light receiving/vertical transfer part, W is the horizontal transfer part, S is the output part, B is the readout gate part, 7 and 9 are the channel stoppers, and g is the Overflow drain, 10h semiconductor substrate, // insulating layer, 6φ and φco, φl', φ2', φ3' and φg'
are vertical transfer electrodes, ψ/ and ψko, ψl', ψ2', 93
' and ψs' are each one drive signal.

Claims (1)

[Scope of Claims] A plurality of light-receiving element sections arranged in the horizontal and vertical directions, a readout gate section formed corresponding to each of the light-receiving element sections, and a plurality of light-receiving element sections arranged in the vertical direction adjacent to the readout gate sections. a plurality of vertical transfer portions extending to the vertical transfer section; and the vertical transfer section. A solid-state imaging device is provided with a horizontal transfer section disposed at the end of the sending section and an output section, and a read pulse voltage that takes a first high level is applied to each of the read gate sections for each field. The signal charge is read out from each of the light receiving element sections to the accumulation region of the vertical transfer section, and the first high V is applied to the accumulation region of the vertical transfer section during the horizontal video period.
A voltage that takes a second high level lower than the signal charge is applied, and a transfer pulse voltage that successively takes a low level with a phase difference within the horizontal blanking period is applied to the vertical transfer section, so that the signal charge is vertically transferred to the horizontal transfer section, and further horizontally transferred to the output section by the horizontal transfer section.