JPS584506B2 - クロック制御システム - Google Patents

クロック制御システム

Info

Publication number
JPS584506B2
JPS584506B2 JP49125604A JP12560474A JPS584506B2 JP S584506 B2 JPS584506 B2 JP S584506B2 JP 49125604 A JP49125604 A JP 49125604A JP 12560474 A JP12560474 A JP 12560474A JP S584506 B2 JPS584506 B2 JP S584506B2
Authority
JP
Japan
Prior art keywords
signal
data
clock
time
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP49125604A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5081004A (enrdf_load_stackoverflow
Inventor
アンドレ・イー・デスブラーシエ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5081004A publication Critical patent/JPS5081004A/ja
Publication of JPS584506B2 publication Critical patent/JPS584506B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/007—Detection of the synchronisation error by features other than the received signal transition detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03133—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals with a non-recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP49125604A 1973-11-06 1974-11-01 クロック制御システム Expired JPS584506B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7340556A FR2250447A5 (enrdf_load_stackoverflow) 1973-11-06 1973-11-06

Publications (2)

Publication Number Publication Date
JPS5081004A JPS5081004A (enrdf_load_stackoverflow) 1975-07-01
JPS584506B2 true JPS584506B2 (ja) 1983-01-26

Family

ID=9127747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49125604A Expired JPS584506B2 (ja) 1973-11-06 1974-11-01 クロック制御システム

Country Status (4)

Country Link
JP (1) JPS584506B2 (enrdf_load_stackoverflow)
DE (1) DE2443870A1 (enrdf_load_stackoverflow)
FR (1) FR2250447A5 (enrdf_load_stackoverflow)
GB (1) GB1478709A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63117806A (ja) * 1986-11-05 1988-05-21 Mitsui Eng & Shipbuild Co Ltd 立体自動倉庫用移載装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4539689A (en) * 1978-04-26 1985-09-03 Racal Data Communications, Inc. Fast learn digital adaptive equalizer
US4263671A (en) * 1978-10-19 1981-04-21 Racal-Milgo, Inc. Sampling clock correction circuit
DE3333714A1 (de) * 1983-09-17 1985-04-04 Standard Elektrik Lorenz Ag, 7000 Stuttgart Schaltungsanordnung zur rahmen- und phasensynchronisation eines empfangsseitigen abtasttaktes
EP0296253B1 (en) * 1987-01-12 1995-06-28 Fujitsu Limited Discrimination timing control circuit
GB2373421B (en) * 2001-03-16 2004-04-14 Cambridge Broadband Ltd Wireless communication system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63117806A (ja) * 1986-11-05 1988-05-21 Mitsui Eng & Shipbuild Co Ltd 立体自動倉庫用移載装置

Also Published As

Publication number Publication date
JPS5081004A (enrdf_load_stackoverflow) 1975-07-01
DE2443870A1 (de) 1975-05-15
FR2250447A5 (enrdf_load_stackoverflow) 1975-05-30
GB1478709A (en) 1977-07-06

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