JPS5839412B2 - 4 tanshikairosouchi - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit with an output independent of the input power supply, and in particular to a circuit arrangement that produces a voltage that is independent only of the difference in the emitter areas of the transistors and that is related to the output voltage.

Various types of circuits require an output that is independent of the input voltage or current source.

It is common practice in the past to use a relatively large number of devices to isolate the circuit output from the input power source.

Such techniques result in relatively large and complex circuits.

Since the cost of an IC circuit depends on the number and complexity of the components included therein, it is desirable to have a minimum number of components to provide a particular function.

Furthermore, the operation of such circuits depends on processing parameters rather than solely on fundamental transistor parameters, and such processing parameters are not easily controlled.

A good example of a circuit whose output must be independent of the input power supply is a regulator circuit.

High quality current or voltage regulation in IC circuits has traditionally required relatively complex circuitry.

For example, in a Zener diode voltage regulator, several stages of current amplification must be performed to reduce the dynamic impedance of the circuit to provide a well-regulated voltage power output.

A relatively large number of elements are required to provide the desired amount of power amplification and reduce the dynamic impedance sufficiently to provide such a regulated power supply.

Another type of circuit whose output must be independent of the input power supply is a buffer amplifier.

Buffer amplifiers, such as voltage followers or current amplifiers, require a relatively high impedance input and a low impedance output so that the input signal voltage is accurately reflected at the output.

If the output of such an amplifier is not independent of its input power supply, then variations in the level of its input power supply will affect the output,
The input signal voltage is not accurately reflected in its output.

Furthermore, if such outputs depend on processing parameters and not just fundamental transistor parameters, the outputs will not be accurate.

Therefore, there is a need for a circuit that provides an output that is relatively uncomplicated and does not use a large number of components and that is independent of voltage or current sources and independent of process parameters.

That is, it can be formed with relatively few components and depends for its operation only on fundamental transistor parameters (which parameters can be controlled within relatively small tolerances).

) circuit is required.

It is an object of the invention to provide a circuit with an output independent of voltage or current sources.

Another object of the invention is to provide a circuit having an output that is independent of the input power supply and requiring relatively few components.

Another object of the invention is to provide a circuit whose operation is independent of process parameters and dependent only on fundamental transistor parameters.

Another object of the present invention is to provide a regulation circuit that requires relatively few parts and has relatively good regulation capability.

Another object of the invention is to provide a voltage or current regulator with an output that is unaffected by changes in supply voltage or current.

Another object of the invention is to provide a voltage or current regulator that can be operated with fewer parts.

Another object of the present invention is to provide a buffer amplifier in which the input signal voltage is accurately reflected at the output.

Another object of the invention is to provide a buffer amplifier with relatively high input impedance and relatively low output impedance.

Another object of the invention is to provide a buffer amplifier in which relatively large current outputs can be provided without current limiting resistors.

These and other objects are achieved by a transistor circuit in which an output voltage equal to the sum of the base-emitter voltages of the transistors is generated.

This output voltage is used to provide a well-regulated voltage or current output or to accurately reflect the input voltage to the circuit output.

A feature of the invention is to maintain the collector currents of transistors connected in series equal to each other and to maintain the base-emitter voltages around the series loop opposite to each other, and to adjust the base-emitter voltages of the transistors as needed. The object is to ensure that the sum is proportional only to the difference in the emitter areas of the transistors, ie to the difference in the geometrical properties of the emitter areas.

If such a voltage difference exists, the output voltage will have a non-zero value proportional to it and will have a deviation.

However, if such a difference does not exist, the output voltage deviation will be zero and the input signal source can be effectively reflected in the circuit output.

Another feature consists in inserting a resistor in any one of the emitter circuits of the transistors so that different output characteristics can be achieved.

Hereinafter, the present invention will be explained in detail based on the drawings.

FIG. 1 shows a four terminal circuit constructed in accordance with the principles of the present invention.

A pair of transistors (hereinafter referred to as T for transistors)
It is abbreviated as r.

) 10 and 12 have respective collector-emitter circuits connected in series with a pair of terminals 14 and 16.

A pair of TrlBs and 20 have respective collector-emitter circuits connected in series between a pair of terminals 22 and 24.

Resistors (hereinafter abbreviated as R') 26, 28° 30 and 32 are connected to the emitter circuits of TrlO, 12, 18 and 20, respectively.

The value of any or all of R26-32 may be zero.

Preferably, only one of R26-32 has a value other than zero.

From Figure 1, the base of Trlo, 12.18 and 20.
It is understood that the emitter junctions are connected in series with each other in one loop.

That is, this loop starts at terminal 16, connects R28, and Tr.
12 base-emitter junctions, R30, and TrlB
Trlo's base-emitter junction, Trlo's base-emitter junction, R26, Tr20's base-emitter junction, and R32.

If terminal 16 is connected to terminal 24 and only one of R26-32 has a non-zero value, then the sum of the base-emitter voltages of the Tr will appear across its resistance.

In the series loop described above, the base of Tr 12
The emitter voltage is the base-emitter voltage of Trlo and T
The direction is opposite to the base-emitter voltage of r20.

Further, the base-emitter voltage of Tr20 is in the opposite direction to the base-emitter voltage of TrlB.

Since Tr 10 and 12 have their respective collector-emitter circuits connected in series, their collector currents are equal.

The collector currents of transistors 18 and 20 are also equal.

Therefore, the sum of the base-emitter voltages of all the Tr's is proportional to the difference in their emitter areas.

That is, the base-emitter voltage difference JVbe, which is the voltage developed across one of R26-32 having a non-zero value.

) is expressed by the following equation. Here, Jc is Tr1
2 and 18, where Jc2 is Tr 1
The combined current density is 0 and 20.

Therefore, if the emitter areas of these Tr's have different values, the ratio of current densities in the above equation will have a value other than zero.

Therefore, the voltage of the input power supply biasing each of TrIO, 1218 and 20 does not affect the sum of the base-emitter voltages ΔVb,e developed across one of the resistors of R26-32 having a non-zero value.

This sum of base-emitter voltages JVbe is the sum of these Tr
is zero if all of the emitter areas of are equal to each other.

Another embodiment of a four terminal network constructed in accordance with the principles of the present invention is shown in FIG.

As shown here, Tr34 and 3ε are connected in series between a pair of terminals 42 and 44, and Tr J
6 and 48 are connected in series between a pair of terminals 50 and 52.

R54, 56°58 and 60 are Tr34, 36 respectively
, 46 and 48 emitter circuits.

The circuit shown in FIG. 2 is similar to the circuit shown in FIG.

Tr 62 has a collector-emitter circuit connected in series between terminal 50 and the collector of Tr 46, and has a base connected to terminal 42.

Tr 62 insulates the collector of Tr 46 from voltage changes occurring at terminal 50 and increases the output impedance of the circuit.

FIG. 3 depicts a current regulator constructed in accordance with the principles of the present invention.

Voltage sources designated V+ and V- are connected to terminals 64 and 66.

The circuit of FIG. 3 operates to provide a constant current to a load connected between terminals 68 and 70 regardless of changes in the supply voltage at terminals 64 and 66.

The collector of Tr72 is connected to terminals 64 and 68 via R74.
The base connected to Tr76 is further connected to the base of Tr76.

The collector of Tr 76 is connected to terminal 70 .

The collector-emitter circuit of Tr72 is connected in series with the collector-emitter circuit of Tr78, and the collector-emitter circuit of Tr76 is connected in series with the collector-emitter circuit of Tr80.

The junction between Tr72 and Tr78 is connected to the base of Tr80, and the junction between Tr76 and Tr80 is connected to the base of Tr78.

The emitter of Tr78 is connected to terminal 66, and Tr80
The emitter of is connected to terminal 66 via R82.

The current regulator shown in FIG. 3 is a practical embodiment of the circuit shown in FIG.

The change to the circuit shown in Figure 3 is that R74 must have a value such that it carries a larger current than the output current of Tr72 (the current flowing through R74 is divided by the β of Tr72). This is the output current of Tr72).

By examining the circuit of FIG. 3, it can be seen that the voltage developed across R82 is equal to the sum of the base-emitter voltages of Trrs 6 and 78, which is less than the sum of the base-emitter voltages of Trs 72 and 80.

Since the sum of the base-emitter voltages of Tr72-18 is proportional to the difference in their emitter areas, the voltage developed across R82 is also proportional to that sum.

For example, if the emitter areas of Trs 72 and 78 are equal, their base-emitter voltages will cancel each other because their collector currents are equal.

In such an example, the voltage developed across R82 is Tr8
It is equal to the base-emitter voltage of Tr76 which is smaller than the base-emitter voltage of Tr76.

This difference in base-emitter voltage is determined by the above equations Jcl and Jc
2 are the current densities of Tr76 and Tr80, respectively.

The load current, which is equal to the current through R82, remains constant because its value depends on the ratio of the current densities of the Tr, and of course such a ratio is such that the collector currents of the Tr with a series collector-emitter circuit are equal to each other. stay constant for.

FIG. 4 shows a voltage regulator circuit that uses the principles of the circuit shown in FIG.

A current source, designated 84, includes a voltage source, designated V+ and V-, connected to terminals 86 and 88, and a resistor 90.

Of course, any current source may be used. The circuit of FIG. 4 provides a regulated voltage between a pair of terminals 92 and 94.

Tr 96, 98, 100 and 102 are connected in the same manner as in FIG.

The collector of Tr96 is connected to one end of current source 84 and also to terminal 92 via R104.

The emitter of Tr98 is connected to terminals 88 and 9 via R106.
Connected to 4.

The voltage developed across R106 is equal to the sum of the base-emitter voltages of Tr's 96 and 102 which is less than the sum of the base-emitter voltages of Tr's 98 and 100.

Because the voltage developed across R106 is independent of its resistance value, a low regulated voltage is developed there.

Furthermore, this voltage is proportional to the difference in the emitter areas of the Tr and is independent of the current source 84 and the voltage sources on terminals 86 and 88.

The circuit shown in FIG. 4 accomplishes this voltage regulation by controlling the current through Trloo and 102 to maintain the voltages on terminals 92 and 94 constant.

The value of the voltage developed at terminals 92 and 94 is determined by the difference in the emitter areas of the Tr.

The voltage Vs between terminals 92 and 94 is determined by the following equation.

In the above equation, JVbe is the difference in base-emitter voltage of Tr with different emitter areas, R2 is the value of R104, R1 is the value of R106, ■be1 is Tr9
6, and ■be2 is Tr10
2 base-emitter voltage.

Since the first term in equation (2) above has a positive temperature coefficient and the two remaining terms have negative temperature coefficients (at a particular output voltage at terminals 92 and 94), the circuit The temperature coefficient of is zero.

That is, a zero temperature coefficient as described above is obtained when the output voltage on terminals 92 and 94 is equal to 2.4 cm, or twice the silicon supplement band gap.

When the power supply current tries to increase, Trloo and 102
The conduction level of R106 increases to shunt the current therethrough to attempt to keep the voltage across R106 constant.

By maintaining the voltage across R106 constant, the voltage across terminals 92 and 94 also remains constant.

The circuit shown in FIG. 5 is a buffer amplifier that uses the principles of the circuit shown in FIG.

Tr108.110, 112 and 114 are R26~3
2 are connected together to form the circuit of FIG. 1 when all 2 have a value of zero.

One end of the voltage source ■+ is connected to the collector of Tr112 and R11
6 to the collector of TrloB.

The emitter of the Tr 114 is connected to one output terminal 118, and the emitter of the Tr 110 is connected to the other voltage source side 1- through an input signal source 120 and to the other output terminal 122.

If the emitter areas of Trs 108-114 are equal, the voltage of input signal source 120 will be accurately reflected at terminals 118 and 122.

Input signal source 120 may be any, including the circuit shown in FIG.

The circuit of FIG. 5 presents a relatively high impedance to the input signal source 120 and provides a relatively low output impedance to terminals 118 and 122.

Additionally, a relatively high current output can be provided between terminals 118 and 122 without including a current limiting resistor in the circuit.

The limitation of the circuit shown in FIG. 5 is that β of Tr108 to 114 is
The base drive of each of these Tr's can be increased to allow relatively high output currents between terminals 118 and 122.

That is, current amplifier 124 provides base drive to each of Tr 108 and Tr 112, current amplifier 126 provides base drive to Trl 14, and current amplifier 126 provides base drive to Tr 14.
28 provides base drive to Tr 110.

Therefore, the base drive for all transistors is a voltage source ■
It is not provided by 10 and V-, but is provided by amplifiers 124, 126 and 128.

Since the voltage gain of each amplifier is unity, the voltage developed between terminals 118 and 122 is not affected thereby.

The circuit shown in FIG. 2 can be used as a current regulator, voltage regulator and buffer amplifier.

Additionally, the circuits shown in Figures 1 and 2 can be used to provide various input/output characteristics by controlling the values of R26-32 and R54-60.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a four-terminal network constructed in accordance with the principles of the present invention; FIG. 2 is a circuit diagram of an alternative embodiment of a four-terminal network of the present invention; and FIG. 3 is a circuit diagram of a four-terminal network constructed in accordance with the principles of the present invention. FIG. 4 is a circuit diagram of a voltage regulator constructed according to the principles of the present invention, and FIG. 5 is a circuit diagram of a buffer amplifier constructed according to the principles of the present invention. In the figure, 10, 12.1B, 20; 34, 36° 46.4
8,62;72,76.78,80;96.98,10
0,102;108,110°112.114 is a transistor, 26,28°30.32;54,56,58,
60; 74° 82; 104, 106; 116 indicate resistance.

Claims (1)

[Claims] 1: A first pair of transistors having a collector-emitter circuit connected in series between a first pair of terminals; 2: A collector-emitter circuit connected in series between a second pair of terminals; a second pair of transistors having a circuit; 4 connecting means for connecting the connecting portion of the transistors of the first pair to the bases of the second transistors of the second pair of transistors; A four-terminal circuit device comprising: connecting means for connecting a connecting portion of a pair of transistors to a base of a second transistor of the first pair of transistors.