JPS5837918A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5837918A JPS5837918A JP56135729A JP13572981A JPS5837918A JP S5837918 A JPS5837918 A JP S5837918A JP 56135729 A JP56135729 A JP 56135729A JP 13572981 A JP13572981 A JP 13572981A JP S5837918 A JPS5837918 A JP S5837918A
- Authority
- JP
- Japan
- Prior art keywords
- island
- film
- insulating film
- polycrystalline
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 9
- 230000001678 irradiating effect Effects 0.000 claims abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 20
- 229910052710 silicon Inorganic materials 0.000 claims description 20
- 239000010703 silicon Substances 0.000 claims description 20
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- 238000001259 photo etching Methods 0.000 claims 1
- 229910052814 silicon oxide Inorganic materials 0.000 claims 1
- 239000013078 crystal Substances 0.000 abstract description 7
- 239000000758 substrate Substances 0.000 abstract description 7
- 238000002844 melting Methods 0.000 abstract description 6
- 230000008018 melting Effects 0.000 abstract description 5
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 239000000377 silicon dioxide Substances 0.000 abstract description 4
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
- 229920005591 polysilicon Polymers 0.000 description 17
- 230000003647 oxidation Effects 0.000 description 7
- 238000007254 oxidation reaction Methods 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 2
- 235000014121 butter Nutrition 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02683—Continuous wave laser beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置の製造方法とくに絶縁膜−１−に形
成された多結晶又は非晶質の島状シリコン膜の粒径を増
大する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of increasing the grain size of a polycrystalline or amorphous silicon island film formed in an insulating film-1-.
従来より、絶縁膜又は軸絶縁基板上に結晶１′１の良い
（粒径の大きい）シリコン層を形成出来れば、この層中
に動作速度の早い素子を形成出来ることが知られており
、絶縁膜上に粒径の大きいシリコン層を形成する方法が
強く望まれている。このためこれを可能にしようとして
いるのが、レーザを用いてＳｉＯ２や５ｉｓＮ４の絶縁
膜」二で良い結晶を形成する方法である。レーザ、電子
ビーム等のエネルギー密度の高いビームは、Ｓｉ表面の
みを溶融することが可能で、例えば、Ｓ ｉ Ｏ２Ｊ−
に堆積したポリシリコ／（多結晶シリコン）のみを溶か
してダレイン成長をおこし粒径を増大するものである。It has been known that if a silicon layer with good crystal 1'1 (large grain size) can be formed on an insulating film or a shaft insulating substrate, an element with high operating speed can be formed in this layer. A method of forming a silicon layer with large grain size on a film is strongly desired. Therefore, an attempt is being made to make this possible by using a laser to form a crystal that can be formed using an insulating film of SiO2 or 5isN4. Beams with high energy density such as lasers and electron beams can melt only the Si surface; for example, SiO2J-
The grain size is increased by melting only the polysilico/(polycrystalline silicon) deposited on the surface to cause dalein growth.
この場合に、基板全体に堆積したポリシリコンにレーザ
の照射を行なうと溶融層の歪み発生により、十分均一な
シリコン層を形成することは難かしい。In this case, if polysilicon deposited over the entire substrate is irradiated with a laser beam, distortion will occur in the molten layer, making it difficult to form a sufficiently uniform silicon layer.
そこで、シリコン層を数＋７１ ｍのオーダーの島状に
形成しておくことによって、これらの歪みをやわらげる
ことが行なわれている。現に４７１ ｍ Ｘ２０ ／１
ｍの島状の多結晶シリコンにレーザ照射を行うと、完全
な単結晶になったという報告がある。Therefore, these distortions are alleviated by forming a silicon layer in the form of an island on the order of several +71 m. Actually 471 m x 20 /1
There is a report that when laser irradiation is applied to island-shaped polycrystalline silicon of m, it becomes a perfect single crystal.
しかし、このように島状のポリシリコンをこのま一４ｖ
−ザで溶融すると、ＡｐｐＬ、Ｐｈｙｓ、Ｌｅｔｔ３８
（３）１９８１ Ｐ２Ｓ５でり、に、Ｂｉｅｇｅｌｓｅ
ｎ等が報告しているように、ポリシリコンが流れ出して
バター７がくずれてしまう。そこで、この流れ出しを防
ぐ為に、ＬＯＧＯ３（ｌｏｃ＆ｌ ｏｘｉｄａｔｉｏｎ
ｏｆＳｉ）法を用いて、島状のポリシリコン以外をす
べて酸化してしまう方法が考えられるがこの方法は酸化
と同時に島状のシリコンを形成するものであり、５ｉｓ
Ｎ４ 形成に伴なう複雑な工程の増加や厚いＳｉＯ２を
形成する必要がある為、高温、長時間の酸化が必要とな
る。この為、この様な複雑化したプロセスは高密度化さ
れたＬＳＩのプロセスに対しては、不純物拡散等の現象
が大きく変動する為、好ましくない。However, if the island-shaped polysilicon is
- AppL, Phys, Lett38 when melted in the
(3) 1981 P2S5, Biegelse
As reported by N et al., the polysilicon flows out and the butter 7 crumbles. Therefore, in order to prevent this outflow, LOGO3 (loc&l oxidation
One possible method is to oxidize all but the island-shaped polysilicon using the 5is of Si method, but this method forms island-shaped silicon at the same time as the oxidation.
Since the number of complicated steps associated with N4 formation increases and it is necessary to form thick SiO2, high temperature and long oxidation are required. Therefore, such a complicated process is not preferable for a high-density LSI process because phenomena such as impurity diffusion vary greatly.
本発明は上記欠点にかんがみなされたもので、簡単な方
法でもって、この島状の多結晶（又は非結晶）シリコン
膜の流れ出しを防止する方法を提供するものである。す
なわち、本発明はあらかじめ島状に形成したポリシリコ
ンのまわりを酸化膜によりとり囲んだ状態で、レーザ又
は電ｒ−ビームによるポリシリコンの溶融をおこなうも
のでちる。The present invention has been made in view of the above-mentioned drawbacks and provides a method for preventing the island-shaped polycrystalline (or amorphous) silicon film from flowing out using a simple method. That is, the present invention involves melting polysilicon with a laser or an electric r-beam while surrounding the polysilicon which has been formed in the form of an island in advance with an oxide film.
次に、実際の工程図にそって本発明の説明を行なう。第
１図〜第３図は、３種類の本発明の一丁二程を示すもの
である。まず第１図（Ａ）においてンリコン半導体基板
１の１−に絶縁膜としての５ｉＯ２２を形成後、多結晶
シリコンを堆積し、数＋７１ ｍ〜数百μｍの島にエツ
チングして多結晶シリコンの島３を形成する。次に第１
図（Ｂ）に示すように、多結晶シリコン３を熱酸化して
その表面に酸化１ｑ（ＳｉＯ２）４を１０００Ａ以上形
成する。条件としては、Ｗｅ ｔｏ ２ 酸化で９００
″０２時間程度で１００ＯＡの酸化膜４の形成が可能で
ある。第１図（Ｃ）において、高いエネルギー密度をも
つレーザ等ノビ−ムロを照射して多結晶シリコ／３を（
Ｒ融するこの酸化膜４ば、レーザのパワーヲホとんど吸
収せずしかも融点が高い為ポリシリコン３が溶融シても
溶けることはなく、ポリシリコン３の流れ出しの壁とな
る。こうして、第１図（Ｄ）に示す様に粒径の大きな単
結晶に近いシリコン結晶の島３′をつくる。ここで用い
るレーザば、５１０２や５ｉｓＮａ にはほとんど吸収
されずＳｉに強く吸収されるＡｒレーザ、 Ｋｒレーザ
、ＹＡＧレーザ等域
の連絡発振型のものが好ましい。そしてこの島３′の部
分に様々な半導体素子を作り込むことにより、半導体集
積回路が作成できる。尚、半導体基板１中にも第１層目
の半導体素子を作り込んであるもこに半導体素子を形成
することにより多層構造の半導体ＩＣを形成することが
可能である。Next, the present invention will be explained along with actual process diagrams. Figures 1 to 3 show three types of the present invention. First, in FIG. 1(A), after forming 5iO22 as an insulating film on 1- of the silicon semiconductor substrate 1, polycrystalline silicon is deposited and etched into islands of several +71 m to several hundred μm to form islands of polycrystalline silicon. form 3. Next, the first
As shown in Figure (B), polycrystalline silicon 3 is thermally oxidized to form oxide 1q(SiO2)4 of 1000 A or more on its surface. The conditions are We to 2 oxidation at 900
It is possible to form an oxide film 4 of 100 OA in about 2 hours. In FIG.
This R-melting oxide film 4 does not absorb much of the laser power and has a high melting point, so it does not melt even if the polysilicon 3 is melted, and becomes a wall against which the polysilicon 3 flows. In this way, as shown in FIG. 1(D), islands 3' of silicon crystals having large grain sizes and close to single crystals are formed. The laser used here is preferably a coupled oscillation type laser such as an Ar laser, a Kr laser, or a YAG laser, which is hardly absorbed by 5102 or 5isNa but strongly absorbed by Si. A semiconductor integrated circuit can be created by building various semiconductor elements into this island 3'. Note that it is possible to form a multilayered semiconductor IC by forming semiconductor elements in the semiconductor substrate 1 where the first layer of semiconductor elements is built.
第２図は、第１図と（Ａ） 、 （Ｂ）の工程は同様で
あるが、同図（Ｃ）工程でポリシリコン３の平担部上の
酸化膜４をフォトエツチング法にてエツチング除去し、
ポリシリコン３の側面にのみ酸化膜６を残しテ、高エネ
ルギービーム６でポリシリコン３を溶融させて粒径の大
きな結晶とするものである。この酸化膜６は、ポリシリ
コン３の溝方向の流れ出しを防ぐために必要な為壁の部
分のみあればこの目的が達せられる。In FIG. 2, the steps in (A) and (B) are the same as those in FIG. remove,
An oxide film 6 is left only on the side surfaces of the polysilicon 3, and the polysilicon 3 is melted with a high-energy beam 6 to form crystals with large grain sizes. This oxide film 6 is necessary to prevent the polysilicon 3 from flowing out in the trench direction, so this purpose can be achieved if only the wall portion is provided.
第３図は、第１図では熱酸化を行なって酸化膜４を形成
するのに対して、ＣＶ Ｄ （ｃｈｅｍｉｃａｌｖａｐ
ｏｕｒ ｄｅｐｏｓｉｔｉｏｎ）法によって酸化膜を形
成するものである。まず、第３図（Ａ）の如く、第１図
。In FIG. 3, the oxide film 4 is formed by thermal oxidation in FIG.
The oxide film is formed using the oxidation method. First, as shown in FIG. 3(A), FIG.
第２図（Ａ）と同様に島状のポリシリコン膜３形成後５
１０２又は５ｉｓＮａ 膜８を全面に形成する。（同図
Ｂ）そして同図（Ｃ”ｌの様に写真食刻法により、９に
示すポリシリコン膜３上の絶縁膜８を工・ノチ／グしで
し捷う。そしてその上から、高エネノ棗、ギー密度ビー
ム６によって照射を行ない、島状ポリシリコン膜３を溶
融させてシリコン粒径の大きい島状のシリコン領域３′
を形成する。5 after forming the island-shaped polysilicon film 3 as in FIG. 2(A).
A 102 or 5isNa film 8 is formed over the entire surface. (B in the same figure) Then, as shown in the same figure (C''l), the insulating film 8 on the polysilicon film 3 shown in 9 is etched/cutted by photolithography. Irradiation is performed with a high-energy, high-density beam 6 to melt the island-like polysilicon film 3 and form an island-like silicon region 3' with a large silicon grain size.
form.
尚、本実施例（第１図〜第３図）の場合、１７１ｍ波長
以下の光やレーザを用いているので８１０２や５ｉ３Ｎ
ａ にはエネルギーが吸収されず、ポリシリコノ膜３
の部分のみで吸収される。特に、第３図の実施例の場合
、エネルギーは厚い＝絶縁膜９があるので減衰し、半導
体基板１の溶融は全く起きない。また、高エネルギービ
ーム金電子ビームを用いる場合には物質により吸収係数
がほとんど変わらない為表面で吸収され、半導体基板１
の影響はより少ない。In the case of this example (Figures 1 to 3), since light or laser with a wavelength of 171 m or less is used, 8102 or 5i3N
No energy is absorbed in a, and the polysilicon film 3
It is absorbed only in the . In particular, in the case of the embodiment shown in FIG. 3, the energy is attenuated due to the presence of the thick insulating film 9, and no melting of the semiconductor substrate 1 occurs. In addition, when using a high-energy gold electron beam, the absorption coefficient hardly changes depending on the material, so it is absorbed at the surface of the semiconductor substrate 1.
is less affected.
実際に、１／１ｍの酸化膜２上に、０．６ＩｌＩＱノホ
島
リンリコンを堆積して約３０／ｌ ｍ Ｘ ４０／ｉ
ｍの昔にのこし、それに１００ＯＡのＷｅ ｔｏ ２
酸化を行なって酸化膜４を形成する。そのまま、ＧＷ−
Ａｒレーザ８〜９Ｗの出力で焦点距離５ｍのレンズで絞
って３６０’Ｃの試料台にのせて、一方向へ３０ｍｍ１
ｓｅｃ、他方向へ１０１１ ｍピンチに送ることにより
、多結晶７リコン３の部分を完全に溶融した。Actually, 0.6IlIQ Noho Island phosphorus was deposited on the 1/1m oxide film 2 to form a film of approximately 30/l m x 40/i.
Leftover from the past of m, and 100OA's We to 2
Oxidation is performed to form an oxide film 4. Just like that, GW-
Ar laser has an output of 8~9W, is focused with a lens with a focal length of 5m, is placed on a 360'C sample stage, and is 30mm1 in one direction.
sec and 1011 m in the other direction, the polycrystalline 7 recon 3 part was completely melted.
その結果、酸化膜４部分は溶融せずに、横方向の流れに
よるバター７くずれは、酸化膜によって全く生じること
なく、ポリシリコン粒が大きく成長し、島がほぼ１グレ
イ／の領域ゴになった。第２図、第３図に示す方法を用
いても、辛く（・・１縁の効果があり、この形成された
島３′に能動半導体素子を作成してンノグルンリコン並
の特性を得ることにおいて、加工上程におけるパターン
くすｉｔか小さい為に微細ＪＪｎ工が可能となり、かつ
高温、長時間の熱処理も不安で積層形高密度ＬＳＩの形
成に大きく寄与するものである。As a result, the oxide film 4 did not melt, the oxide film did not cause any collapse of the butter 7 due to the lateral flow, and the polysilicon grains grew to a large size, resulting in an island with an area of approximately 1 Gy/Gy. Ta. Even if the method shown in FIGS. 2 and 3 is used, there is a single edge effect, and in producing an active semiconductor element on the formed island 3' and obtaining characteristics comparable to that of the non-conducting silicon. Since the pattern size in the processing process is small, fine JJN processing is possible, and high-temperature, long-term heat treatment is also unstable, which greatly contributes to the formation of laminated high-density LSIs.
第１図（Ａ）〜（Ｄ）、第２図（Ａ）〜（Ｃ）、第３図
（Ａ）〜（Ｃ）はそれぞれ本発明の実施例の島状シリコ
ンの製造工程断面図である。
２・・・・・・絶縁膜、３・・・・・・島状ポリシリコ
ンｌｌか、３′・・・・・・島状ンリコノ領域、４，５
．９・・・・・・酸化膜、６・・・・・・高エネルギー
ビーム。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第
２図FIGS. 1(A) to (D), FIGS. 2(A) to (C), and FIGS. 3(A) to (C) are sectional views of the manufacturing process of island-shaped silicon according to the embodiments of the present invention, respectively. . 2... Insulating film, 3... Island-like polysilicon ll, 3'... Island-like silicon region, 4,5
．． 9... Oxide film, 6... High energy beam. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2
Claims (3)
に形成する第１の工程と、前記島状シリコン膜の少なく
とも側面に絶縁膜を形成する第２の工程と、エネルギー
ビームを前記島状シリコン膜に照射して、シリコンの粒
径を大きくする第３の工程とを備えたことを特徴とする
半導体装置の製造方法。(1) A first step of forming an island-like amorphous or polycrystalline silicon film on an insulating film, a second step of forming an insulating film on at least the side surfaces of the island-like silicon film, and an energy beam step. and a third step of increasing the grain size of the silicon by irradiating the island-like silicon film with.
状シリコン膜表面にシリコン酸化膜を形成する工程より
なることを特徴とする特許請求の範囲第１項記載の半導
体装置の製造方法。(2) Manufacturing a semiconductor device according to claim 1, wherein the second step comprises a step of thermally oxidizing the silicon film to form a silicon oxide film on the surface of the island-like silicon film. Method.
ＶＤ絶縁膜を形成し、しかる後フォトエッチによシ前記
島状シリコン膜側面にのみＣＶＤ絶縁膜を残存させる工
程よりなることを特徴とする特許請求の範囲第１項に記
載の半導体装置の製造方法。(3) The second step is to apply C on the surface including the island-like silicon film.
Manufacturing a semiconductor device according to claim 1, comprising the steps of forming a VD insulating film and then photo-etching to leave the CVD insulating film only on the side surfaces of the island-like silicon film. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56135729A JPS5837918A (en) | 1981-08-28 | 1981-08-28 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56135729A JPS5837918A (en) | 1981-08-28 | 1981-08-28 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5837918A true JPS5837918A (en) | 1983-03-05 |
Family
ID=15158507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56135729A Pending JPS5837918A (en) | 1981-08-28 | 1981-08-28 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5837918A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59184517A (en) * | 1983-04-05 | 1984-10-19 | Agency Of Ind Science & Technol | Manufacture of lamination-type semiconductor device |
| US6638800B1 (en) | 1992-11-06 | 2003-10-28 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing apparatus and laser processing process |
-
1981
- 1981-08-28 JP JP56135729A patent/JPS5837918A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59184517A (en) * | 1983-04-05 | 1984-10-19 | Agency Of Ind Science & Technol | Manufacture of lamination-type semiconductor device |
| JPH0136972B2 (en) * | 1983-04-05 | 1989-08-03 | Kogyo Gijutsuin | |
| US6638800B1 (en) | 1992-11-06 | 2003-10-28 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing apparatus and laser processing process |
| US7179726B2 (en) | 1992-11-06 | 2007-02-20 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing apparatus and laser processing process |
| US7799665B2 (en) | 1992-11-06 | 2010-09-21 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing apparatus and laser processing process |
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