JPS5835998A - Method of producing multilayer circuit board - Google Patents

Method of producing multilayer circuit board

Info

Publication number
JPS5835998A
JPS5835998A JP13532581A JP13532581A JPS5835998A JP S5835998 A JPS5835998 A JP S5835998A JP 13532581 A JP13532581 A JP 13532581A JP 13532581 A JP13532581 A JP 13532581A JP S5835998 A JPS5835998 A JP S5835998A
Authority
JP
Japan
Prior art keywords
layer
circuit
wiring board
board
flexible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13532581A
Other languages
Japanese (ja)
Other versions
JPS6246080B2 (en
Inventor
健治 大沢
徳光 始
隆夫 伊藤
池神 雄司
大沢 正行
倉田 警二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP13532581A priority Critical patent/JPS5835998A/en
Publication of JPS5835998A publication Critical patent/JPS5835998A/en
Publication of JPS6246080B2 publication Critical patent/JPS6246080B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、リジット(硬性)回路部分とフレキシブル(
柔性)回路部分を有して成る多層配線基板の製法に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention combines rigid (rigid) circuit parts and flexible (
The present invention relates to a method for manufacturing a multilayer wiring board having a flexible (flexible) circuit portion.

リジット配線基板を他の配線基板に電気的に接続する場
合、その接続端部に、おいてはフレキシブル部分である
ことが望ましい0例えば第1図に示すようにリジット配
線基板(1)上にフレキシブル回路部分(2)を積層し
た構成とすれば、その接続端部が柔軟性を有することに
よって、他の配線基板(4)との相互接続が容易且つ確
実になると共に、両基11 (1)及び(4)の配設場
所も自由度が大きくなる轡の利点がある@なお、(5)
及び(6)は夫々の基板の回路ノ々ターン、(7)は開
口部を通して充填された半田等の導電性物質を示す0 従来のこの種の多層回路基板の製法としては、例えば票
2図A及びBK示すように硬質ベークライト基板(8)
の−主面に第1層回路(9)を形成してなるリジット回
路部分軸と、ポリイミドフィルムαυ上に銅箔による第
2・層回路αδを形成したフレキシブル回路部分a3と
を夫々別体に設け、そのフレキシブル回路部分0の接続
部(開口部)(14をドリルで孔明し、裏面に接着剤a
Sを塗布してリジット回路部分鱒に張シ合せて後、接続
部(14+に半田aeを充填すると共に所要回路の接続
部を通る貫通孔Q?)を穿は所要の電気部品鱈を接続す
るようにしている・又は、@3図ム及びBに示すように
、ポリイミPフィルムr11)にスルホールメッキ0を
用いた両面回路翰及びOaを形成してなるフレキシブル
配線基板(2)を設け、これを接着剤α9を介して硬質
ベークライト基板(8) K !I !D合せ、しかる
後Pリルによシ所要回路の接続部を通る貫通孔a?)を
穿は所要の電気部品alt接続するようにしている・ しかるに、前者の場合には、リジット回路部分α〔とフ
レキシブル回路部分αjの張シ合せ精度が悪いこと(張
〕合せ前にフレキシブル回路部分に孔明が必!り、フレ
キシブル回路部分(I3の回路形成ではリジット性がな
いために取り扱いが離かしいこと、第1層回路(9)と
第2層回路(2)との半田接続が1穴ずつ手で半田充填
して行なわれるために量産性がないこと、孔明けが困難
で回路同志を接続することがむずかしいこと、Pリルに
よる孔明けのために孔径が小さくできず回路0の占有面
積が大きくなり高密度化が阻害されること、連続生産プ
ロセス化が出来ない等の問題点がある。
When electrically connecting a rigid wiring board to another wiring board, it is preferable that the connection end is a flexible part. If the circuit part (2) has a laminated structure, the connection end part has flexibility, so interconnection with other wiring boards (4) becomes easy and reliable, and both bases 11 (1) And (4) also has the advantage of increasing the degree of freedom in the installation location.@In addition, (5)
and (6) show the circuit turns of each board, and (7) shows the conductive material such as solder filled through the opening.As for the conventional manufacturing method of this type of multilayer circuit board, for example, Figure 2 shows Hard Bakelite substrate (8) as shown in A and BK
- A rigid circuit part shaft formed with a first layer circuit (9) formed on the main surface of the flexible circuit part a3 formed with a second layer circuit αδ made of copper foil on a polyimide film αυ are separated, respectively. The connection part (opening part) (14) of the flexible circuit part 0 is drilled, and adhesive a is applied to the back side.
After applying S and tightening it to the rigid circuit part, drill the connection part (14+ filled with solder AE and the through hole Q that passes through the connection part of the required circuit) and connect the required electrical parts. Or, as shown in @3 Figures M and B, a flexible wiring board (2) is provided in which a double-sided circuit board and Oa are formed using through-hole plating 0 on a polyimide P film (r11). Hard Bakelite substrate (8) via adhesive α9 K! I! Align D, and then insert the P rill into the through hole A through which the connection part of the required circuit passes. ) is connected to the required electrical component alt. However, in the former case, the accuracy of the tensioning between the rigid circuit part α and the flexible circuit part αj is poor (the flexible circuit is connected before joining). The flexible circuit part (I3 circuit formation has no rigidity and is difficult to handle, and the solder connection between the 1st layer circuit (9) and the 2nd layer circuit (2) is 1. It is not suitable for mass production because each hole is filled with solder by hand, it is difficult to drill the holes and it is difficult to connect circuits together, and the hole diameter cannot be made small because the hole is drilled using a P drill, which occupies circuit 0. There are problems such as the area becomes large, hindering high density, and it is not possible to implement a continuous production process.

又、後者の場合には、フレキシブル配線基板@の製造プ
ロセスが複雑な上、排水処理設備が必要であるため好壕
しくないこと、回路形成がリジット性がないため取扱い
が困難であること、フレキシブル配線基板にPリルで孔
明けを行うため孔径に限度がToシ、高密度の回路形成
が出来にくいこと1連続生産プロセス化が出来ないこと
、郷の問題点があった。
In addition, in the latter case, the manufacturing process of the flexible wiring board is complicated and requires wastewater treatment equipment, which makes it difficult to handle. Since the holes are drilled in the wiring board using a P drill, there are limits to the hole diameter, which makes it difficult to form high-density circuits.1) It is not possible to implement a continuous production process, which is a problem.

本発明は、上述の問題点を解決し、量産性に適し且つ高
密度の回路形成を可能にした多層配線基板の製法を提供
するものである。
The present invention solves the above-mentioned problems and provides a method for manufacturing a multilayer wiring board that is suitable for mass production and enables high-density circuit formation.

以下、第4図A−1を用いて本発明による多層配線基板
の製法を説明する。
Hereinafter, a method for manufacturing a multilayer wiring board according to the present invention will be explained using FIG. 4A-1.

本発明は、先づ第4図Aに示すように、例えば紙フェノ
ール、紙エポキシ又はガラスエイキシ等のリジット絶縁
基板0υ上に銅箔■を張シ合せてなる所謂鋼張多積層板
(至)を用意し、この銅箔(至)を選択エツチングして
第1層の配線・ぐターン(2)を形成すると共に、この
配Sノターン(財)を有した第1の部分−と爾後これか
ら分離される第2の部分(至)との関に機械的力により
分離され得る分離手段(9)を設ける。この分離手段(
ロ)としては図示の例では等間隔で所定の孔を明けた所
謂ミシン目(至)をもって構成しているが、その他裏面
に分離線に沿ってV波溝を設けるようにしても可能であ
る0次に、第4図Bに示すように基板0υの蕗20部分
(至)上に離型印刷又はテーピングによって離型層(至
)を形成する。離型印刷としては例えばシリコン樹脂液
を10%以上含んだエポキシ樹脂、フェノール樹脂塗料
によるシリコン系インキ、或はテフロン粉末(粒径5〜
50μ)を含んだエポキシ、フェノール樹脂によるイン
キ等を用い得る。又、テーピングとしては、アクリルエ
マルジョン系の接着剤をコーティングしたシリコンフィ
ルム(シリコン樹脂液)あるいはテフνンフイルム(テ
フロンテープ)等を用い得る・ 次に、第4図Cに示すように基1liCA1)上のほぼ
全面、即ち第1層配線パターン(財)の爾後形成する第
1層配線パターンとの接続部分(イ)、電気部品接続部
分(図示せず)、さらには他の配線基板との接続部に対
応した部分(4υを除く全面に、印刷によって可撓性を
有する絶縁樹脂層(43を印刷によって形成する・この
絶縁樹脂層(aとしては、例えばエポキシポリアミP%
善ポキシアクリレート、ウレタンアクリレート、又はブ
レンド樹脂等を用い得る0次に、絶縁樹脂層(6)上の
全面に導電箔層例えば鋼箔を張り合せて後、第4図DK
示すように銅箔を選択エツチングして第2層の配線パタ
ーン卿及び第1層配線パターン(ロ)の接続部(ト)に
到る開口部■を形成する・なお、第2層配線パターン(
ハ)の開口部(財)においては、銅箔を張シ合せた際の
接着剤ωが残っているので、さらにその部分の接着剤を
有機溶剤で除去し、第1層配線パターン(ロ)の接続部
−を臨ましめる・この第2層配線/ぞターンαjの形成
時に同時に爾後他の配線基板との接続部分に対応する位
置に開口部6@を形成するを可とする。
First, as shown in FIG. 4A, the present invention uses a so-called steel-clad multi-laminated board made of a rigid insulating substrate 0υ made of paper phenol, paper epoxy, or glass epoxy, covered with copper foil (2). This copper foil is selectively etched to form the first layer of interconnection turns (2), and the first layer having the interconnection turns is then separated from the first layer. Separation means (9) are provided which can be separated by mechanical force in relation to the second part (to). This separation means (
In the case of b), the illustrated example has so-called perforations (to) with predetermined holes made at equal intervals, but it is also possible to provide V-wave grooves along the separation line on the back side. Next, as shown in FIG. 4B, a release layer is formed on the flap 20 portion of the substrate 0υ by release printing or taping. For release printing, for example, epoxy resin containing 10% or more of silicone resin liquid, silicone ink based on phenol resin paint, or Teflon powder (particle size 5~
Ink containing epoxy or phenol resin containing 50μ) can be used. In addition, as the taping, a silicone film (silicon resin liquid) or a Teflon film (Teflon tape) coated with an acrylic emulsion adhesive can be used.Next, as shown in Figure 4C, on the base 1liCA1) Almost the entire surface of the first layer wiring pattern, that is, the connection part (a) with the first layer wiring pattern to be formed later, the electrical component connection part (not shown), and the connection part with other wiring boards. A flexible insulating resin layer (43 is formed by printing on the entire surface except for the part corresponding to 4υ)・This insulating resin layer (a is, for example, epoxy polyamide P%
After laminating a conductive foil layer, such as steel foil, on the entire surface of the insulating resin layer (6), which can be made of poxy acrylate, urethane acrylate, or a blended resin, as shown in FIG.
As shown, the copper foil is selectively etched to form an opening (2) that reaches the connection part (G) of the second layer wiring pattern (B) and the first layer wiring pattern (B).
In the opening (c), the adhesive ω from when the copper foil was pasted remains, so the adhesive in that area was further removed with an organic solvent, and the first layer wiring pattern (b) was removed. At the same time as this second layer wiring/turn αj is formed, an opening 6@ can be formed at a position corresponding to a connection portion with another wiring board.

次に1第4図Eに示すように第2層配線2ターン−の開
口部(財)内に導電性物質(ハ)を充填して上下の配線
ノ9ターン卿及び(財)を接続する。しかる後、機械的
手段によって基板eηのミシン目(至)よシ分離して第
2の部分(至)を除去する0この第2の部分(至)は離
型層(至)によって絶縁樹脂層(6)からも離型する・ 導電性物質(ハ)としては、ガリウム合金、半田ディツ
プ、銀ペース)、cu、Zn、Sn等の低融点金属によ
る金属溶射等による導電材を用い得る・特に、ガリウム
合金の場合は、常温所謂30℃以下で液状を呈するガリ
ウム自と、このガリウムと共晶する金属と、ガリウムと
合金化し融点を上昇させ得る金属粉(単体の金属粉、も
しくは合金粉)との混合物により構成する0このガリウ
ム合金の導電性物質は、当初作業温度においてペースト
状をなし、その後、経時的に合金化し凝固する性質を有
している・このガリウム合金を用いるときは、銀ペイン
トに於けるような銀のマイクレージ百ンの問題が回避さ
れ、又導電性もCuメッキと同郷になるなど品質のよい
回路形成が可能となる。
Next, as shown in Fig. 4 E, fill the opening of the second layer wiring (2nd turn) with a conductive material (c) and connect the upper and lower wiring turns (9th turn). . After that, the substrate eη is separated along the perforation (to) by mechanical means and the second part (to) is removed. This second part (to) is separated from the insulating resin layer by the mold release layer (to). (6) Also released from the mold. As the conductive material (c), a conductive material made by metal spraying with a low melting point metal such as gallium alloy, solder dip, silver paste), cu, Zn, Sn, etc. can be used. Especially. In the case of a gallium alloy, gallium itself is liquid at room temperature of 30°C or below, a metal that is eutectic with gallium, and a metal powder (single metal powder or alloy powder) that can be alloyed with gallium and raise its melting point. The conductive material of this gallium alloy has the property of initially forming a paste form at the working temperature, and then alloying and solidifying over time. When using this gallium alloy, it is necessary to It avoids the problem of silver migrating that occurs with paint, and it also has the same electrical conductivity as Cu plating, making it possible to form high-quality circuits.

基板r31)の第2の部分(至)を分離する方法として
は、例えば第5図人及びBに示すように、導電性物質(
ハ)を充填した後の積層体υをローラ(至)及び(ロ)
間に挿通し、第2の部分(至)を下方よシ押圧子(ハ)
にて押し上ければミシン目(至)よシ容易に分離される
As a method for separating the second portion (to) of the substrate r31), for example, as shown in FIG.
C) After filling the laminate υ with rollers (to) and (b)
Insert the presser (c) between the two and push the second part (to) downward.
If you push it up at the perforation, it will be easily separated.

斯くすることにより、第4図Eに示すように第1層配線
パターン(財)を有したリジット回路部分□□□上に、
その端縁よシ他の配線基板との接続端部67)が突出す
るように、第2層配線・ぞターン(ハ)を有し九フレキ
シブル回路部分(至)が積層されて成る目的の多層配線
基板(至)を得る・この多層配線基板69を他の配線基
板に接続するときは、前述の第1図と同様そのフレキシ
ブル回路部分(至)の接続端部67)を他の配線基板(
4)(第1図参照)の接続端部上に第2層配線パターン
(至)や開口部6Dを他の配線基板(4)。
By doing this, as shown in FIG. 4E, on the rigid circuit part □□□ having the first layer wiring pattern,
A multi-layered layer consisting of nine flexible circuit parts (6) and a second layer wiring (3) with a second layer wiring so that the connection end (67) with another wiring board protrudes from its edge. Obtaining the wiring board (to) - When connecting this multilayer wiring board 69 to another wiring board, connect the connecting end 67 of the flexible circuit part (to) to the other wiring board (as shown in FIG. 1 above).
4) Connect the second layer wiring pattern (to) and the opening 6D on the connection end of the other wiring board (4) (see FIG. 1).

の所要O回路ノ々ターンに合せるように重ね合せ、その
開口部fJa内に導電性物質(ハ)を充填するようにな
す。
are stacked so as to match the required number of turns of the O circuit, and the opening fJa is filled with a conductive material (c).

上述せる本発明製法によれば、リジット絶縁基板c11
)上に第1層配線パターン(ロ)を形成し、さらKこの
上に可撓性を有する絶縁樹脂層(4りを介して第2層配
線パターン禰を形成して彼、絶縁基板61)の他配線基
板との接続部分に対応する第2の部分(至)を分離除去
するようにしたことにより、高密度な回路形成と同時に
、生産性よくこの種の多層配線基板が製造できる。特に
、両配線パターン(ロ)及び(43間の接続に供する開
口部(財)の形成は、従来のPリル工程を用いずに化学
的エツチングで形成するので、孔径が微細とな夛、従っ
て接続部を含む配線/々ターン04)(至)の占有面積
が小さくて済み、高密度化が可能となる。しかも、リジ
ット基板の状態で開口部(財)の形成ができるので製造
工程時の取シ扱いが容易となる。
According to the manufacturing method of the present invention described above, the rigid insulating substrate c11
), a first layer wiring pattern (b) is formed on the insulating substrate 61, and a flexible insulating resin layer is formed on the second layer wiring pattern (b). By separating and removing the second portion corresponding to the connection portion with another wiring board, this type of multilayer wiring board can be manufactured with high productivity while forming high-density circuits. In particular, the openings (materials) for connection between the two wiring patterns (b) and (43) are formed by chemical etching without using the conventional P rilling process, so the pores are fine in diameter. The area occupied by the wiring/turns 04) (to) including the connection portion can be small, and high density can be achieved. Furthermore, since the openings can be formed in the rigid substrate state, handling during the manufacturing process is facilitated.

又、絶縁樹脂層(6)により両配線パターン(ロ)及び
(至)間の間隔が小さいために導電性物質(ハ)例えば
ガリウム合金の充填に際しては、印刷手段により容易に
充填できるので連続学童が可能となり大貴生童に好適で
ある・ また、他の配線基板との接続も、予め接続端部に予め開
口部61)を設けることが出来るので、この開口部6℃
を使用して容易に接続することが出来る・
In addition, since the distance between both wiring patterns (b) and (to) is small due to the insulating resin layer (6), when filling a conductive material (c) such as a gallium alloy, it can be easily filled by printing means, so that continuous school children can use it. This makes it possible to connect to other wiring boards, since an opening 61) can be provided in advance at the connection end.
You can easily connect using

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の説明に供する互に異なる配線基板の接
続状態を示す斜視図、第2図人及びBと第3図人及びB
は夫々従来の多層配線基板の製法例を示す工程図、第4
図A−Bは本発明製法を示す工程図、第5図人及びBは
本発明の分離工程の一例を示す断面図である0 0Jはリジット絶縁基板、(ロ)は第1層配線パターン
、(至)は第1の部分、(至)は第2の部分、(至)は
ミシン目、(至)は離型層、(ハ)は第1層配線パター
ン、(財)は開口部である・ 第2図
FIG. 1 is a perspective view showing the connection state of different wiring boards for explaining the present invention; FIG.
4 is a process diagram showing an example of a conventional multilayer wiring board manufacturing method, respectively.
Figures A-B are process diagrams showing the manufacturing method of the present invention, Figures 5 and B are cross-sectional views showing an example of the separation process of the present invention, 00J is a rigid insulating substrate, (B) is the first layer wiring pattern, (to) is the first part, (to) is the second part, (to) is the perforation, (to) is the release layer, (c) is the first layer wiring pattern, (goods) is the opening. Yes, Figure 2

Claims (1)

【特許請求の範囲】[Claims] 所要の配線ノ臂ターンを施した館1の部分と、誼第1の
部分と連結されてはいるが機械的力によシ分離される如
く形成された第2の部分からなる基板の前記第2の部分
に離型層を形成する工程と、前記第1の部分及び前記第
2の部分の少なくとも上下の接続部及び電気部品接続部
を除いて絶縁樹脂層を印刷形成する工程と、前記絶縁樹
脂層上に導電箔層を被着する工程と、前記導電箔層に少
なくとも前記第1の部分に施された配!1ツタ−/に到
る開口部を形成して接続する工程と、前I’12の部分
を前記第1の部分より機械的に分離する工程から成る多
層配線基板の製法。
The first part of the board is made up of a part of the board 1 with the required wiring turn, and a second part connected to the first part but separated by mechanical force. a step of forming a release layer on the first portion and the second portion, a step of printing an insulating resin layer except for at least the upper and lower connecting portions of the first portion and the second portion and the electrical component connecting portion; A step of depositing a conductive foil layer on the resin layer; and a step of applying a conductive foil layer to at least the first portion of the conductive foil layer. A method for manufacturing a multilayer wiring board, comprising a step of forming and connecting an opening up to 1/2 inch, and a step of mechanically separating the front I'12 part from the first part.
JP13532581A 1981-08-28 1981-08-28 Method of producing multilayer circuit board Granted JPS5835998A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13532581A JPS5835998A (en) 1981-08-28 1981-08-28 Method of producing multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13532581A JPS5835998A (en) 1981-08-28 1981-08-28 Method of producing multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS5835998A true JPS5835998A (en) 1983-03-02
JPS6246080B2 JPS6246080B2 (en) 1987-09-30

Family

ID=15149115

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13532581A Granted JPS5835998A (en) 1981-08-28 1981-08-28 Method of producing multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS5835998A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158294A (en) * 1984-08-29 1986-03-25 シャープ株式会社 Method of producing printed circuit board
JP2005091237A (en) * 2003-09-18 2005-04-07 Yamatake Corp Sensor, and method of taking out electrode of sensor
JP2006100511A (en) * 2004-09-29 2006-04-13 Hitachi Cable Ltd Mounting structure for electronic component and optical transceiver employing it

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158294A (en) * 1984-08-29 1986-03-25 シャープ株式会社 Method of producing printed circuit board
JP2005091237A (en) * 2003-09-18 2005-04-07 Yamatake Corp Sensor, and method of taking out electrode of sensor
JP4503963B2 (en) * 2003-09-18 2010-07-14 株式会社山武 Sensor electrode extraction method
JP2006100511A (en) * 2004-09-29 2006-04-13 Hitachi Cable Ltd Mounting structure for electronic component and optical transceiver employing it
JP4492280B2 (en) * 2004-09-29 2010-06-30 日立電線株式会社 Electronic component mounting structure and optical transceiver using the same

Also Published As

Publication number Publication date
JPS6246080B2 (en) 1987-09-30

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