JPS5834855B2 - Computer monitoring method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a computer monitoring method for the purpose of detecting an abnormality in a computer that performs real-time control, for example.

A conventional device of this kind is shown in FIG. 1 and will be explained.

In FIG. 1, numeral 1 is a general computer, which is the object to be monitored.

Reference numeral 2 denotes an oscillator which generates pulses of a constant period, and its oscillation signal is applied to the calculator 1 and the computer monitoring device 6.

Reference numeral 6 denotes a monitoring device, which is composed of a counter 3 and a relay 4.

Next, the operation of the device shown in FIG. 1 will be explained.

When the computer 1 is normal, the counter 3 is periodically counted up by the pulse signal 23 as an oscillation signal from the oscillator 1.

At the same time, a pulse signal 21 as an oscillation signal from the oscillator 1 causes an interrupt to the computer 1, and the program activated thereby confirms that the computer 1 is in a normal operating state, and a reset signal 13 from the computer 1 causes the counter to start. 3 reset is performed.

Therefore, when the computer 1 is in a normal operating state, the counter 3 does not overflow.

When an abnormality occurs in the computer 1, the program processing of the computer 1 cannot be performed in response to the interruption of the pulse signal 21, the reset signal 13 from the computer 1 is not output, and the counter 3 cannot be reset.

In this case, the counter 3 will be incremented by the pulse signal 23 from the oscillator 1 to a preset count number or more, and as a result, an overflow signal 34 of the counter 3 will be generated, which will operate the relay 4 and send the external device 5 to the computer 1. This is to notify and monitor any abnormalities.

In this way, since the conventional system is configured as described above, it is good for hardware abnormalities of computer 1, but it does not work for software abnormalities regardless of the importance of each piece of software. Even when unimportant software I/ware goes out of control and interrupt processing from the oscillator 2 is not possible, it is assumed that the entire computer 1 is abnormal and the abnormal IJI/4 is activated.
The target being 1QltFl imagines the same process as the hardware abnormality of the computer 1, and once the abnormality of the computer 1 is notified to the target control device, it takes many steps to resume normal computer operation. Checks must be made;
1-1- It had some drawbacks, such as lowering the operating rate as a computer system.

This invention was made in order to eliminate these drawbacks, and for example, it is capable of responding to the importance of rough hardware and detecting abnormalities in computers. The present invention provides a computer monitoring device that increases the operating rate of a computer system.

Hereinafter, an embodiment of the second invention will be described with reference to FIG.

In FIG. 2, reference numeral 11 denotes a computer, which has the function of receiving a constant periodic pulse signal 21 from the oscillator 2 as an interrupt and executing a programmer l, which receives the pulse signal 21 of a constant period from the oscillator 2 as an interrupt. It operates in response to a signal 31, and has the function of resetting the counter 3b as the second counter when the computer 11 is operable.

Furthermore, like the computer 1 shown in FIG. 1, the computer 11 has a function of resetting the counters 3at3bK.

3a and 3b are counters, and reset signals 13a and 1
Until 3b arrives, the power is increased by the pulse signal 22 from the oscillator 2 and the cell 1- is activated in advance.
It has a function of generating over 31, 34 when the number of calls exceeds 1.

4 is a relay which is sent to the cell 1 upon generation of an overflow signal 34 from the input terminal 3b to notify the external device 5 that the computer is down.

Reference numeral 7 denotes a computer monitoring device, which is composed of counters 3a, 3b and a relay 4.

Here, the counters 3a and 3b are changed in advance by one overflow time so that the overflow signal 31 of the counter 3a is generated first and the overflow signal 34 of the counter 3b is generated after a time that is sufficient for software I/ware to be executed. and set it.

The operation of the device shown in FIG. 2 will be explained.

A pulse signal 2L23 is generated from the oscillator 2 to the computer 11 and the amplifiers 3a and 3b at regular intervals.

As a result, the counters 3a and 3b are counted up.

The computer 11 receives the pulse signal 21 from the oscillator 2 as an interrupt and executes the program.
3b to reset I signal 13a.

13b.

Therefore, while this operation can be performed, that is, while the computer is operating normally, the overflow signal 3L34 of the counter 3a y 3b is not generated.

Due to the runaway of a less important program on computer 11,
If the interrupt of the pulse signal 21 cannot be taken into calculation S11, the reset signal @13a is sent from the computer 11.
, 13b are not output, and the counters 3a and 3b are counted up, but are not reset to 1, and finally an overflow signal 31 is generated from the counter 3a.

This overflow newsletter 31 can be assigned as an interrupt that cannot be disabled within the computer 11.

Since this interrupt cannot be disabled by program, computer 1
1, the pulse signal 21 from the oscillator 2
The program checks why the interrupt could not be processed.

If the cause is a bug that is important to the operation of the hardware or system, do not perform the procedure.

For this reason, the reset signal 13at13b is not output and the counter 3b is not reset, so the over-puff [
J・- Signal 34 is generated and an abnormality in computer 11 is detected by external device E.
-5 will be informed.

If an abnormality is caused by a part of the computer 11 that is partially operable@a less important program, the execution of that program will be forcibly stopped, the abnormal part of the computer 11 will be removed, and the problem will be solved. The counter 3at3b is reset.

In this case, the abnormality signal is not output to the external device 5.

Therefore, functions other than those performed by the program that caused the abnormality continue to operate normally, and the system operates in a degraded manner with some functions stopped.

The second processing power method can be summarized as follows according to the flowchart shown in FIG.

50, when the counter 3a generates the overflow signal 31, the counter 3a determines what is the cause of the computer 11 at 51, and if it is an abnormality such as a program that is not important for the operation of the computer 11 as shown at 52, the counter 3a returns 53. As shown in , the programs that have become abnormal are discarded, and counter 3 is reset at 54.
Reset a, 3b and end.

Further, if the failure is an abnormality in hardware or a program of high importance for the operation of the computer 11, as indicated by 55, the computer 11 does nothing and outputs the result that it is abnormal.

With this configuration, it is possible to detect the occurrence of an abnormality in a program, etc. of the computer 11, and at the same time to determine for each system whether or not to output a computer system abnormality depending on the importance of the program that caused the abnormality. It is possible to improve the performance, fine-grained abnormality judgment, and the operating rate of the computer system thereby.

In the detailed explanation of this invention, a computer that performs real-time control was explained as an example, but it can also be used in a device that can receive an interrupt signal from an oscillator and output a rear signal to a counter. It is.

As explained above, according to the present invention, when a computer abnormality is detected, whether or not to output a computer system abnormality can be determined for each system depending on the importance of the abnormality. This also makes it possible to improve the operating rate of the computer system.

[Brief explanation of the drawing]

FIG. 1 is a block diagram for explaining a conventional computer monitoring method, FIG. 2 is a block diagram for explaining a computer monitoring method according to an embodiment of the present invention, and FIG. 3 is a block diagram for explaining a computer monitoring method according to an embodiment of the present invention. It is a flowchart figure for explaining. In the figure, 2 is an oscillator, 3 a and 3 b are counters as first and second counters, 4 is a relay, 5 is an external device, 7 is a computer monitoring device, and 11 is a computer. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1 The first count is counted up by the oscillation signal from the oscillator.
a second counter which is also counted up by the oscillation signal and has a longer overflow time than the first counter; and a computer that receives an overflow signal from the first counter as an interrupt when there is an abnormal operation state, and when the computer receives the overflow signal from the first counter, the abnormality is determined to be of high importance. If the problem is caused by a low-level program, take that program seriously and reset the first and second counters above; if the problem is caused by a high-level program, do not reset, and as a result, A computer monitoring method that indicates that the computer is abnormal in response to an overflow signal of the second counter that occurs.