JPS5834837B2 - CRT display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Rusk scan type CRT display device,
In particular, it relates to a video synchronization signal output circuit.

Conventionally, in order to generate a composite signal of a positive polarity video signal and a negative polarity synchronization signal, a power supply with both positive and negative ends and a transistor switching circuit were used, which required the use of a negative power supply and complicated the circuit. There was a problem.

The purpose of the present invention is to generate a composite signal of a positive polarity video signal and a negative polarity synchronization signal using a simple circuit without requiring a negative power supply.

In the present invention, the time constant of the CRT circuit, which is based on a large-capacity capacitor and a circuit current limiting resistor, is made sufficiently longer than the time required for the synchronization signal, and during times other than the synchronization signal, a voltage of several volts is applied across the capacitor. This is an improved video synchronization circuit that generates a potential difference and sets the higher potential to OV during the synchronization signal period, thereby extracting the potential difference as a negative synchronization signal.

FIG. 1 is a schematic block diagram of a general thin scan type CRT display device, in which display data input from the CPUI or keyboard 2 is stored in the memory and peripheral circuit 3, and is also processed by a timing signal from a clock circuit 4. The signals are sent to the video signal generation circuit 5 in the order of screen display and converted into serial video signals.

Further, the timing signal from the clock circuit 4 is used to generate horizontal and vertical synchronization signals necessary for display by a synchronization signal generation circuit 6.

The video signal from the video signal generation circuit 5 and the synchronization signal from the synchronization signal generation circuit 6 are combined into a composite signal by the composite signal generation circuit 7, and sent to the CRT display device 8 for concrete display.

FIG. 2 shows a conventional circuit of the composite signal generating circuit 7. As shown in FIG.

FIG. 4 also shows the time and potential relationships among the video signal, synchronization signal, and composite signal.

As can be seen from this figure, the video signal display period T and the synchronization signal period T2 never overlap, and their repetition time T3 is one raster display time in the horizontal direction, and is the screen display time in the vertical direction. .

Therefore, the transistor Q1 in FIG. 2 is ON only during the video signal display period T1, especially during the positive video signal period.
I, , A current flows from the positive power supply to the CRT display device through the current limiting resistor R1.

Also, transistor Q2. Q3 serves to draw current to ONL and the negative power supply only during the synchronization signal period T2.

FIG. 3 is a diagram showing a specific embodiment of the present invention, in which the circuit within the broken line in FIG. 2, that is, the transistor Q2. Instead of Q3 and 5 related resistors, capacitor C inside the broken line in Figure 3
This means that the resistors R3 and R4 perform the same function.

FIG. 5 shows a schematic waveform of the circuit shown in FIG. 3, and FIG. 6 shows a synchronizing signal.

In FIG. 5, the switch S1 normally falls to the a side, and only turns to the b side during the synchronization signal period T2.

Switch S2 falls to the b side only when a video signal comes,
During other periods, it always falls to side a.

The state of FIG. 6 therefore represents a synchronization signal period.

Typically, switch S1. When S2 is both on the a side, capacitor C is charged by the positive power supply (+5V), so the + side has a potential of +5V, and the opposite side is grounded through R2 and R3, so it is 0 ■. .

From this state, when the switch S2 is suddenly turned to the b side, the + side of the capacitor C becomes Ov, and the X point on the opposite side becomes -5V, gradually approaching 0■.

The degree of this is determined by the time constant τ−C・(R
2+R3), and furthermore, the potential at point Y indicating the input terminal of the CRT display device 80 is expressed as: potential at point Y - potential at point X x R
2, and has an R2+R3 waveform proportional to the potential at point X in the figure.

From the above invention, the time constant τ is 10 to 20 times the vertical synchronization signal T2 and the vertical repetition period T3.
By selecting the same level as , it is possible to obtain a composite signal of a positive polarity video signal and a negative polarity synchronizing signal without using a negative power supply for the synchronizing signal as in the conventional case.

The main effect of the present invention is that the negative power supply for the synchronization signal, which was conventionally required, can be omitted.

As a result, the power supplies for the CRT display system control system can be unified to +5.times.1 power supply, which simplifies the system configuration and maintenance and inspection, and can also be expected to have economical effects that will lead to lower system costs.

[Brief explanation of drawings]

Figure 1 is a block diagram of a Rusk scan type CRT display device, Figure 2 is a conventional composite signal generation circuit diagram, Figure 3 is a composite signal generation circuit diagram of the present invention, and Figure 4 is the input/output of the composite signal generation circuit. FIG. 5 is a diagram illustrating the principle of generating a negative polarity synchronizing signal, and FIG. 6 is a waveform diagram of the negative polarity synchronizing signal. 1...CPU, 2...Keyboard, 3
...Memory and peripheral circuit, 4...Clock circuit, 5...Video signal generation circuit, 6...
. . . Synchronous signal generation circuit, 7 . . . Composite signal generation circuit, 8 . . . CRT display device.

Claims (1)

[Claims] 1 A memory and peripheral circuits that store display data, a video signal generation circuit that reads the stored display data and converts it into a video signal, a synchronization signal generation circuit that generates horizontal and vertical synchronization signals, and a video signal and the synchronization A CR that has a composite signal generation circuit that synthesizes signals into a composite signal, and a cathode ray tube (CRT) that displays data using the output of the circuit.
In the T display device, the composite signal generation circuit includes means for outputting a positive signal from a positive power supply to the CRT side in accordance with the output of a video signal, and means for outputting a negative current to the CRT only during a vertical synchronization signal period.
Further, the means for outputting the negative current to the CRT side is composed of a series circuit of a capacitor and a resistor selected to have a time constant comparable to the vertical repetition period. The vertical synchronizing signal and the positive power supply are connected to the capacitor, and one end of the resistor connected in series with the capacitor is connected to the output end of the means for outputting the positive signal to the CRT side. CRT display device.