JPS5834618A - Symmetrical control function generator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a function generator, and more particularly to a circuit for generating a triangular wave whose waveform symmetry can be controlled.

A function generator is a circuit that generates a triangular wave with a controllable frequency and then converts this triangular wave to output various waveforms such as a rectangular wave and a sine wave, and is widely used in many technical fields. . FIG. 1 is a block diagram of a conventional function generator that generates a triangular wave. Current source (current source) 10
Output current IU and current sink (current sink) 12
■Inflow current to. The capacitor 16 is alternately charged and discharged via the current path changeover switch 14 controlled by the switch control circuit 2o. The voltage across the capacitor 16 is applied to a buffer amplifier 18 , and the output of this buffer amplifier 18 is taken out from an output terminal 22 and sent to a switch control circuit 20 .
It can also be added to

The operation of the circuit shown in FIG. 1 is as follows. First, if the switching position of the switch 14 is on the current source lo side, then the capacitor 16
■The current. If we assume that the battery is charged in a straight line, a positive slope part of the triangular wave will occur.

When the voltage across the capacitor 16 reaches the upper limit threshold vu,
Switch control circuit 20 connects switch 14 to current sink 12
As the current Io from the capacitor 16 flows into the current sink 12, a negative linear slope portion of the triangular wave is created. When the triangular wave (ie, the voltage across the capacitor 160) falls to the lower threshold value vL, the switch 14 is switched to the current source 10 again and the above-described operation is repeated. Therefore, a triangular wave whose amplitude varies between vU and vL is obtained from the output terminal 22.

Figure 2 is a circuit diagram 24.2 of a specific example of a conventional function generator.
6, an operational amplifier 28, resistors 34, 36, a potentiometer 32, etc. The TR pairs 24 and 26 are connected to the output ends of the Pace operational amplifiers 28, the emitters of which are connected to the fixed ends of potentiometers 32 through resistors 34 and 36, respectively, and the slider of potentiometers 32 connected to a positive voltage source. are doing. Operational amplifier 28 compares the voltage at the emitter of TR 26 connected to its inverting input with a controllable reference voltage applied from potentiometer 30 to its non-inverting input. The collector current of TR24 is the charging current shown in Figure 1. So, the collector current of TR26 is
Electric discharge current I. It is used to drive a current mirror circuit 12' that causes a current to flow. Current mirror circuit 1
2' is 3 TR38°40.42.2 resistors 44
．． The collector-emitter junction of TR42 and the resistor 46 are connected in series between the collector of TR26 and the negative voltage source.The collector current of TR38 is a discharge current ID, and the current path changeover switch 14 is a diode bridge circuit consisting of four diodes 11-%-d. The current mirror circuit 12' is a so-called Wilson current mirror circuit disclosed in Japanese Patent Publication No. 49-9819 filed by the present applicant.

Next, the operation of the circuit shown in FIG. 2 will be explained.

If the position of the slider of the potentiometer 32 is adjusted to be at the midpoint, the currents flowing through each of the TRs 24 and 26 will be equal. Furthermore, if the resistances of resistors 44 and 46 are made equal, the collector current of TR38 will be equal to the collector current of TR26. That is, when the position of the slider of potentiometer 32 is in the center, the current IUdI. be equivalent to.

When the input voltage applied to input terminal 23 is at a relatively high level, diodes a and d are turned on, and diode b is turned on.
and C are turned off. Therefore, the charging current Iu flows into the capacitor 16, resulting in a current ■. flows from the input terminal 23 to the TR 38 via the diode d. As explained with reference to FIG. 1, until the triangular wave voltage reaches the upper threshold voltage vU (time t2 (FIG. 3)), a positive slope portion of the triangular wave occurs (period t in FIG. 3). 12) At time t, the voltage applied to the input terminal 23 changes to a low level and the switch 14 switches. That is, diodes b and C are turned on and diodes a and d are turned off, so that A negative slope portion of the triangular wave occurs (period t, ~14 in Figure 3).
T2) can be respectively expressed by the following equations, assuming that the capacitance of the capacitor 16 is C.

From equations (1) and (2), the period T of the triangular wave is.

From equation (3), the period T of the triangular wave is C, V, IU and Io
is a function of the capacitance C, and the currents IU and I
. It turns out that it is inversely proportional to . The reference voltage applied to the non-inverting input of the operational amplifier 28 is lowered to reduce the currents IU and I.

If you increase , the frequency of the triangular wave will become higher, and conversely, by increasing the reference voltage, the currents IU and l will increase. The frequency of the triangular wave will be lowered by decreasing the current l and ■. The size of the button υ can be controlled by the position of the slider of the meter 30.

The symmetry of the triangular wave is controlled by a potentiometer 32. That is, when the slider of the potentiometer 32 is moved to the right in the drawing, ■. increases and Io decreases.On the other hand, when the slider is moved to the left, IU decreases and ■. increases.

However, the conventional function generator shown in FIG. 2 has a problem in that when the symmetry of the output waveform is changed, the output frequency changes. That is, in the conventional function generator, there is unavoidable mutual interference between the waveform symmetry control and the output signal frequency, and therefore the function generator outputs a signal having a predetermined frequency and a predetermined symmetry (or impact coefficient). This has become an important issue in applications that require

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a symmetry control type function generator that can maintain the frequency of the output signal of the signal generator constant and control the symmetry of the output signal waveform.

Another object of the present invention is to provide a function generator capable of outputting a signal having a desired frequency and desired waveform symmetry.

Yet another object of the invention is to provide a digitally controlled function generator.

The present invention will now be described with reference to the accompanying FIGS. 4 and 5A to 5C. FIG. 4 is a simplified block diagram of a function generator according to the present invention. Current source 10' and current sink 1
1 has digital-to-analog converters (DACs) 52 and 54, respectively, to control waveform symmetry. Conventional circuits may be used for the DACs 52 and 54, but a 10-bit or more DAC is desirable for highly accurate control. DAC52
and 54 each receive a digital input signal from the microprocessor (μP) 50 and output an analog voltage corresponding to the input signal. For example, when the operator inputs data corresponding to the desired waveform symmetry (i.e., the ratio of the positive slope period and the negative slope period of the triangular wave) via the keyboard 51, the μP 50 performs a predetermined calculation and converts the digital signal into a DA.
Input to C52 and 54. Note that the signal is applied to the DACs 52 and 54 and calculated to be a constant value.

A frequency control signal is supplied to the DACs 52 and 5 via terminal 27.
It is applied to the reference voltage (vref) terminal of No. 4.

This frequency control signal is initially a digital signal and is converted into an analog signal when applied to the terminal 27. As can be seen from the following explanation of Figure 5, the reference voltage ■
ref controls the quantum voltage output from DACs 52 and 54.

5A and 5B are circuit diagrams illustrating preferred embodiments of current source 10 and current sink 12', respectively, of FIG. 4, and FIG. 5C is a circuit diagram of DACs 52 and 54.

The current source 101 shown in FIG. 5A includes a DAC 52, a shift register 56, operational amplifiers 58 and 62, and a PNP@TR.
64 and related passive elements. DAC
52, for example, a 10-bit summing DAC (model AD7533) commercially available from Analog Devices.
) can be used. As shown in FIG. 5C, the DAC 52
is the resistor R8 connected in series between the ground and the Vref terminal.
1゜R8□,...,R5n1 Shunt resistor RPt+Rp2t...e connected to the connection point of these resistors R8, etc.
Electronic switches S1°S2 . connected in series with the Rpns shunt resistor Rp. ..., Sn, etc. Note that the above-mentioned controllable reference voltage Vref is applied to the Vref terminal via the frequency control terminal 27 shown in FIG. 5th C
The electronic switch S shown in the figure is, for example, an OMO8 (complementary metal oxide semiconductor) type switch, and is controlled by digital data from a shift register 56 having a latch function. Note that this digital fist data is data added to the shift register 56 from the μP 50 via the data bus. . ut1 is connected to the inverting input terminal of the operational amplifier 58, and the other output terminal Iout
2 is grounded. The non-inverting input terminal of the operational amplifier 58 is connected to a reference voltage source, and the output of the operational amplifier 58 is connected to the DAC 52.
It is fed back to the feedback terminal RFB of. Feedback terminal RF8
is connected to the output terminal Iout 1 via a feedback resistor R4. The output terminal of the operational amplifier 58 is connected to another operational amplifier 6.
The non-inverting input of operational amplifier 62 receives a positive reference voltage from a resistive voltage divider including resistors 61, 63, 65. The output of operational amplifier 62 is applied to current amplifier TR64. Connect to the positive voltage source that is the emitter of TR64, and output current ■ from the collector of TR64. is taken out.

Next, the operation of the circuits shown in FIGS. 5A and 5C will be explained. DAC52 output terminal■. The output current from utl (denoted as Iout 1 ) corresponds to the digital data output from shift register 56 . That is, for example, if all the digital data from the shift register 56 is
1, the positions of all switching terminals of the switches S□ to Sn are on the output terminal Ioutl side, and the current weighted according to the input digital data is output to the output terminal I.

It flows to ut1. Note that the switching terminal of the switch that receives rOJ in the digital data from the shift register 56 is the output terminal I. Switch to the ut2 side and output the corresponding current to the terminal ■. Flow to ground via ut2. Output current I. u
t1 flows through feedback resistor R4, and operational amplifier 58 outputs current I. Outputs a negative voltage corresponding to utl. This output voltage is amplified by operational amplifier 62 to generate a voltage at the emitter of TR 64.

Note that the collector current of TR64 is the output current I. It is.

The circuit configuration of the current sink 1i shown in FIG. 5B is similar to the circuit configuration of the current source 1i of FIG. 5A.

The main difference between Fig. 5B and Fig. 5A is that PNP-TR64
(Fig. 5A) is replaced with NPN@TR78, and the operational amplifier 76 (5th block) corresponding to the operational amplifier 62 (Fig. 5A)
Figure B) is to perform a non-inverting operation. The operation of current sink 12# in FIG. 5B is substantially similar to the operation of current source 101 in FIG. 5A. Therefore, the electrical characteristics of the passive elements used in current sink 1i are similar to those of the corresponding passive elements of current source 10' (indicated by adding a dash to the numbers used in FIG. 5A). Therefore, DAC52 and 5
When digital data equal to 4 is applied, the same amount of current flows into terminal 80 of current sink 12' as flows out of terminal 70 of current source 10#. If an 8-bit microprocessor is used as the microprocessor, a three-stage cascaded eight-stage shift/storage register such as M014094B available from Motorola may be used. In this case, the first shift register receives digital data serially, and the receiver sequentially transfers the received data to the second and third shift registers. In other words, three eights
When bit data is applied to the data input of the first shift register, all required data has been input. All digital data in the third shift register and the last two data in the second shift register are used as 10-bit digital data to the DAC 54. Furthermore, the second
The remaining 6 digital data of the shift register and the last 4 digital data of the first shift register are sent to the DAC 52.
It is used as 10-bit digital data.

The remaining four digital data in the first shift register are used to control switches that select multiple timing capacitors 16 (having different capacitances).

As is clear from FIG. 3 and equation (3), the current X, regardless of the symmetry of the waveform. and I. The following relationship needs to hold between 0 and 0. When desired frequency and waveform symmetry data are input to the μP 50 via the keyboard 51, an appropriate reference voltage V
ref is calculated and applied to terminal 27. Furthermore, μP
50 is the current IU and I based on equation (4). Calculate the value of . When these data are input to the DACs 52 and 54, a triangular wave with the desired frequency and desired waveform symmetry is generated. A locked loop (pLL) technique may also be used. That is, the voltage level at time t4 in FIG. 3 is sampled every period T and compared with the lower limit threshold vL. If the sample voltage is higher than the threshold vL, the current ■. and I. 0. Conversely, if the sample voltage is lower than the threshold vL (
That is, the triangular wave voltage becomes vL at a time before time t4.
), the currents IU and I. Decrease one or both of the following. In this way, by making the sample voltage equal to the threshold value V, the frequency of the output signal can be maintained constant. The currents I and I are used to charge and discharge the timing capacitor.

is under control. This reference voltage is used to determine the frequency of the output signal, along with appropriate timing capacitor selection, if a wide range of frequencies is desired. The control means provide appropriate digital signals to the two DACs.
Data can be entered to obtain the desired waveform symmetry. That is, both the frequency and the waveform symmetry of the triangular wave to be output can be controlled independently without the control of one affecting the control of the other.

Although only the preferred embodiments of the present invention have been described above, those skilled in the art can easily make modifications to the present invention without departing from the gist of the present invention.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional function generator, FIG. 2 is a circuit diagram showing a specific example of a conventional function generator, and FIG. 3 is an output triangular waveform diagram for explaining the operation of the function generator. FIG. 4 is a simplified block diagram of a function generator according to the present invention, and FIGS. 5A to 5A.
FIG. 5C is a circuit diagram of important parts of the function generator according to the present invention. 010... Current source, 12... Current sink, 16... Capacitor, 50... Control means (μ
P), 52.54...Digital-to-analog converter (D
AC) Patent applicant Tektronix, Inc. Patent attorney Toshiaki Morisaki

Claims (1)

[Claims] In a function generator having a current source, a current sink, and a code/den which is alternately charged and discharged by the current source and the current sink, the current source and the current sink each have:
a digital-to-analog converter; and a control means for controlling a digital signal input to the digital-to-analog converter while maintaining a sum of the reciprocal of the current-lightning current and the reciprocal of the output current of the current sink at a constant value. A symmetry control type function generator characterized by comprising: