JPS5826184B2 - ゼツエンゲ−トデンカイコウカトランジスタノ セイゾウホウホウ - Google Patents

ゼツエンゲ−トデンカイコウカトランジスタノ セイゾウホウホウ

Info

Publication number
JPS5826184B2
JPS5826184B2 JP50041918A JP4191875A JPS5826184B2 JP S5826184 B2 JPS5826184 B2 JP S5826184B2 JP 50041918 A JP50041918 A JP 50041918A JP 4191875 A JP4191875 A JP 4191875A JP S5826184 B2 JPS5826184 B2 JP S5826184B2
Authority
JP
Japan
Prior art keywords
layer
gate
silicon
source
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50041918A
Other languages
English (en)
Japanese (ja)
Other versions
JPS50159682A (US06174465-20010116-C00003.png
Inventor
アンテイポブ イーゴー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS50159682A publication Critical patent/JPS50159682A/ja
Publication of JPS5826184B2 publication Critical patent/JPS5826184B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/117Oxidation, selective
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/122Polycrystalline

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP50041918A 1974-05-20 1975-04-08 ゼツエンゲ−トデンカイコウカトランジスタノ セイゾウホウホウ Expired JPS5826184B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US471401A US3899373A (en) 1974-05-20 1974-05-20 Method for forming a field effect device

Publications (2)

Publication Number Publication Date
JPS50159682A JPS50159682A (US06174465-20010116-C00003.png) 1975-12-24
JPS5826184B2 true JPS5826184B2 (ja) 1983-06-01

Family

ID=23871485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50041918A Expired JPS5826184B2 (ja) 1974-05-20 1975-04-08 ゼツエンゲ−トデンカイコウカトランジスタノ セイゾウホウホウ

Country Status (4)

Country Link
US (1) US3899373A (US06174465-20010116-C00003.png)
JP (1) JPS5826184B2 (US06174465-20010116-C00003.png)
FR (1) FR2272485B1 (US06174465-20010116-C00003.png)
GB (1) GB1453270A (US06174465-20010116-C00003.png)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1089298B (it) * 1977-01-17 1985-06-18 Mostek Corp Procedimento per fabbricare un dispositivo semiconduttore
JPS53124084A (en) * 1977-04-06 1978-10-30 Hitachi Ltd Semiconductor memory device containing floating type poly silicon layer and its manufacture
US4128439A (en) * 1977-08-01 1978-12-05 International Business Machines Corporation Method for forming self-aligned field effect device by ion implantation and outdiffusion
US4277881A (en) * 1978-05-26 1981-07-14 Rockwell International Corporation Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
JPS5552265A (en) * 1978-10-11 1980-04-16 Seiko Epson Corp Manufacturing of metal oxide semiconductor integrated circuit
US4170500A (en) * 1979-01-15 1979-10-09 Fairchild Camera And Instrument Corporation Process for forming field dielectric regions in semiconductor structures without encroaching on device regions
DE2902665A1 (de) * 1979-01-24 1980-08-07 Siemens Ag Verfahren zum herstellen von integrierten mos-schaltungen in silizium-gate- technologie
US4299024A (en) * 1980-02-25 1981-11-10 Harris Corporation Fabrication of complementary bipolar transistors and CMOS devices with poly gates
US4628589A (en) * 1984-09-28 1986-12-16 Texas Instruments Incorporated Method for fabricating stacked CMOS structures
KR920004366B1 (ko) * 1989-09-08 1992-06-04 현대전자산업 주식회사 반도체 장치의 자기 정렬 콘택 제조방법
JPH03286536A (ja) * 1990-04-03 1991-12-17 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5612260A (en) * 1992-06-05 1997-03-18 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
US6255200B1 (en) 1999-05-17 2001-07-03 International Business Machines Corporation Polysilicon structure and process for improving CMOS device performance
US7179691B1 (en) * 2002-07-29 2007-02-20 Taiwan Semiconductor Manufacturing Co., Ltd. Method for four direction low capacitance ESD protection

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4870486A (US06174465-20010116-C00003.png) * 1971-12-23 1973-09-25

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3479237A (en) * 1966-04-08 1969-11-18 Bell Telephone Labor Inc Etch masks on semiconductor surfaces
US3544399A (en) * 1966-10-26 1970-12-01 Hughes Aircraft Co Insulated gate field-effect transistor (igfet) with semiconductor gate electrode
US3660735A (en) * 1969-09-10 1972-05-02 Sprague Electric Co Complementary metal insulator silicon transistor pairs
US3699646A (en) * 1970-12-28 1972-10-24 Intel Corp Integrated circuit structure and method for making integrated circuit structure
US3771218A (en) * 1972-07-13 1973-11-13 Ibm Process for fabricating passivated transistors

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4870486A (US06174465-20010116-C00003.png) * 1971-12-23 1973-09-25

Also Published As

Publication number Publication date
JPS50159682A (US06174465-20010116-C00003.png) 1975-12-24
FR2272485A1 (US06174465-20010116-C00003.png) 1975-12-19
FR2272485B1 (US06174465-20010116-C00003.png) 1977-04-15
GB1453270A (en) 1976-10-20
US3899373A (en) 1975-08-12

Similar Documents

Publication Publication Date Title
US4149307A (en) Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
JPS58176975A (ja) 集積mos電界効果トランジスタ回路の製造方法
JPS5826184B2 (ja) ゼツエンゲ−トデンカイコウカトランジスタノ セイゾウホウホウ
US5518960A (en) Method of manufacturing a wiring layer including amorphous silicon and refractory metal silicide
GB2077993A (en) Low sheet resistivity composite conductor gate MOS device
US5003375A (en) MIS type semiconductor integrated circuit device having a refractory metal gate electrode and refractory metal silicide film covering the gate electrode
JPH04233230A (ja) 半導体基板上の隔置されたシリコン領域の相互接続方法
JPH04229616A (ja) 半導体層構造に開口を製造する方法
KR0158441B1 (ko) 반도체 소자 제조 방법
KR20000021503A (ko) 플래쉬 메모리 소자의 제조방법
US4219925A (en) Method of manufacturing a device in a silicon wafer
JP4730993B2 (ja) 半導体素子の電導性ライン形成方法
JPS6312152A (ja) 半導体装置およびその製造方法
JPS60193333A (ja) 半導体装置の製造方法
JP2000353796A (ja) 半導体装置およびその製造方法
JPH0232545A (ja) 半導体装置の製造方法
JPH10242077A (ja) 半導体装置及びその製造方法
JP2654175B2 (ja) 半導体装置の製造方法
JPS62293772A (ja) 半導体装置
KR950013791B1 (ko) 매립 형태의 콘택 위에 게이트전극 형성방법
KR100438768B1 (ko) 선택적 실리사이드 형성방법
KR100403355B1 (ko) 반도체소자의제조방법
KR20000041426A (ko) 반도체 소자의 게이트 전극 형성 방법
JPH021171A (ja) Mis型半導体集積回路装置
JPH05267332A (ja) 半導体装置の製造方法