JPS58220289A - Data processor - Google Patents

Abstract

PURPOSE:To process a program at a high speed, by providing a page information storage circuit which preserves the executing address and the page information of the program so far executed and then resets the original program when an interruption process is over during execution of an interruption process. CONSTITUTION:If an interruption arises before execution of an address A of page 0 during execution of a program, a page information storage circuit 41 preserves the executing address and the page information of a program under execution and resets the mode to an original state existed before interruption after execution of interruption. Then a program is executed at and in succeding the address A. This eliminates the storage control of a return page number through a monitor program. Thus the program processing is performed at a high speed and with high efficiency.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data processing device having a page-type memory device (t-main memory) having a capacity i greater than the number of address signal lines for the memory device.

[Technical background of the invention and its problems]

In a data processing device having a storage device ft- for storing fr-Dram, when the number of address signal lines for the storage device of the control device is fixed, a method called paging has been conventionally known as a method for expanding the storage capacity. ing. This method divides the entire storage device into units called pages, and selects any page based on the contents of a register called a page selector.

In a general rc, one subprogram is stored in one page, and these programs are controlled by a control program called a monitor.A specific page is selected according to instructions from the monitor, and the subprogram is executed. It looks like this.

In the data processing apparatus that uses the paging method, when an interrupt occurs during the execution of a subprogram, the currently executing subprogram may be temporarily stopped and the contents of another corresponding subprogram may be executed. In such a case, the value of the program counter pointing to the address of the currently executing program is stored, and the monitor program also stores the value of the stored program counter, the current page number.

Save necessary information.

Next, the page in which the subprogram corresponding to the interrupt factor is stored is selected, and the subprogram is multiplied by i for execution. In this way, the subprogram for the interrupt factor is executed.

FIG. 1 shows the address concept of a storage device. In the figure,
(a) is a non-pager system, where the number of address lines of the storage device indicated by the number of address lines of the control device is t'ic. (b) is a paging system in which the number of address lines of the storage device is greater than the number of address lines of the control device. In the example in (b), the storage device has two address lines (4, 0, 1, 2, 3).
Consists of pages.

An example of conventional operation will be explained using the block diagram shown in FIG. A page number is set in the page selector 2J from a control device (not shown) via a data bus. The page selector 21fi is configured as shown in FIG.
Either ug is energized. This page select signal PSo'=P81 is the storage control signal generator 2011
C is supplied, thereby generating a control signal CNTo=CNT· corresponding to each of the nine pages. For example, if the value ""00" is set to the page selector 21, the page select signal Pro is activated. As a result, the control signal C is applied only to the storage section [26!IC] of the θ page.
As long as NTo, CNT4 t CNTs are valid, subsequent control is performed.

The execution operation of the program will be explained using FIG. 1(,). When the program currently executed from address A on page 0 attempts to execute from address A1, an interrupt occurs. Here, the control device stores the program location, counter value and necessary information, jumps to a predetermined address BVC after 7 ICs, and executes interrupt control. Thereafter, the control device sets the page number (page 1) containing the subprogram corresponding to page selector 2111C, and jumps to the starting address of the subprogram. When the execution of the subprogram is completed, a jump is made from address C' to address D.

Here, we restore the necessary information, set the saved 4-page number (page 0) before the interrupt in the page selector 21, and set the program location and counter values to the values before the interrupt. Return to value. Execution continues from address A1 in the above manner.

Conventionally, it was necessary for the monitor program to store and restore page numbers in this way.

The above Sieglerm location, counter values, and various information are stored in the storage unit by hardware, not by the monitor program, and are read by the hardware at the end of interrupt processing, and are read out by the hardware before the interrupt. Data processing devices that are controlled to return to the state of
You must restore it after interrupt processing is completed. Therefore, the contents of the monitor program are complicated and the processing speed is reduced.

One of the drawbacks is that it is not possible to directly move from one page to executing a program on another page.

[Purpose of the invention]

The present invention has been made in view of the above drawbacks.When a program corresponding to an interrupt is executed, the execution address and base information of the program that has been executed so far is saved, and the interrupt processing is completed. An object of the present invention is to provide a paging type data processing device having a page information storage function that restores the contents and continues execution of the original program when the program is deleted.

Another object of the present invention is to provide a data processing device that directly realizes program switching between pages, thereby increasing the efficiency and speed of program processing.

[Summary of the invention]

The present invention stores Peso information or page information given from the control device in a data processing device Vc having a so-called page storage device in which the number of address signal lines of the storage device is greater than the number of address signal lines of the control device. a selector that selects either one of information given from a memory (including a control circuit that sequentially stores the contents of the page select register and outputs the last stored contents first);
It has a page information storage circuit including a page select register that stores this selector output and generates information for page selection according to its contents. Save the execution address and page information of the program you were running,
To realize a page information storage function that continues execution of the original program by reverting the contents when interrupt processing is completed.

This eliminates the need for the monitor program to store and control the return page number, reducing the burden on the monitor program and speeding up processing.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using FIG. 4 and subsequent figures.

FIG. 4 shows an example in which only the storage control section of a data processing apparatus in which the present invention is implemented is extracted.

The difference from the conventional example shown in FIG. 2 is that a page information storage circuit 41 is added.

The page information storage circuit 41 controls the storage of page information, and since the details thereof will be described later with reference to FIG. 5, they will be omitted here.

In the figure, 42 to 45 are a data bus driver/receiver and an address bus receiver, which are connected to the data bus driver/receiver Uf-tapass 51 and the address bus receiver to the address bus 52. Further, 46 to 49 are page storage devices, and 50 is a storage control signal generation device.

The internal configuration of the page information storage circuit 41 is shown in FIG.

In the figure, a selector 411 selects and outputs either data given from the control unit via the data bus 51 or data read from the page storage devices 46 to 49;
12fi This is a page select register that holds the output of selector 4JJ. Further, 413 is a memory for storing page information, 4 J 4fi is an address counter that indicates an address for storing the contents of the page select register 412, and 4 J sFi is a memory for storing page information set in the page select register 412. This is an address counter in which the address for the address is set.

The address counter 414 is updated by a PUSH multiplication signal issued by a control circuit (not shown), and the address counter 415 is updated by a POP signal issued many times by a control circuit (not shown).

The above address counter 4J4.4J5 output is selector 4
16. The selector 416 selects one of the two counters 414 and 415 according to the MODE signal generated many times by the control circuit ↓ and supplies it to the memory 413. 417 is a page selector.

The blocks shown in FIGS. 4 and 5 are merely one embodiment of the present invention, and the gist of the present invention may be limited by the location of the page information storage circuit 41, the memory 413, or the circuit system. It's not something you can do.

The operation of the embodiment of the present invention will be described in detail below.

Page number information coming from a control device (not shown) is set in a page select register 412 via a data line 5 and a selector 411. This value is page selector 417! /cj10- is output as page select signals PSo to PSs. The subsequent operations are the same as those of the conventional example, and will therefore be omitted.

Here, the operation of the page information storage circuit 41 will be explained with reference to an example of the program execution operation shown in FIG. 1(c). First, when an interrupt occurs before executing address A' of page 0, the Grodarum location counter and necessary information are saved, and at the same time, the contents of the page select register 412 are stored in memory corresponding to the address given by the address counter 414. It is stored at address 413. History 1c The contents of the address counter are updated by the PUSH signal. In addition, the address counter 41
The initial value of 4.415 is set to be equal to the initial value of 4.415.

The program is executed from address B, and after executing interrupt control, the necessary information is saved, the page number (page 1) containing the corresponding subprogram is set in the page select recorder 412''', and the subprogram is executed. Jump to the start address of the program. When execution of the subprogram is completed, jump from address C' to address D.

Here, the necessary information is restored and the value of the program location counter is returned to the value before the interrupt. At this time, the contents of the memory 413 corresponding to the address given by the address counter 415 are read out and set in the page select register 412 via the selector 411. Furthermore,
The address counter 4150 is updated (+1) by the POP signal.

These series of operations are performed by signals 5ELECT, LOAD, PUSH, P given from a control device (not shown).
This is done by OP and MODE. By controlling in this way, page 7 register 41Xtl
Since the original value of Ctd (page 0) is set, the program can be executed from address A' without any trouble.

Above, the embodiments of the present invention related to interrupts have been explained using an example in which a page switches to another page via a common area. S-J! It is understood that a control that returns directly to the original page can also be implemented in a similar manner.

〔Effect of the invention〕

As described above, according to the present invention, it is not necessary for the monitor program to store and control the page number of the return page, so the burden on the monitor program is reduced and processing speed can be increased. Further, it is possible to directly jump from a program allocated on a certain page to a program allocated on another page, and further directly return to the program on the original page. As a result, the storage capacity of an LSI microcomputer having a fixed number of address lines can be increased by more than the number of address lines.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the address concept of a storage device.
) is non-paging method, 伽) is paging method, (C)
shows an example of the program execution operation when searching for a paging method. FIG. 2 is a block diagram showing the internal configuration of a conventional storage control device, FIG. 13-3 is a block diagram showing the internal configuration of the page selector in FIG. 2, and FIG. 4 is a data processing device in which the present invention is implemented. FIG. 5 is an example showing the internal structure of the page information storage circuit shown in FIG. 4. FIG. 4 No. Page information storage circuit, 42 to 45 Data bus driver/receiver, address bus receiver, 4
6-49...Page storage device, 50...Storage control signal generation device, 433, 416...Selector, 412.
...Page select register, 413...Memory, 4
14.415...Address counter, 417...Page selector. Applicant's agent Patent attorney Takehiko Suzue 14-

Claims (2)

[Claims] (1) A data processing device that has a page-type storage device as its main memory, which has a capacity equal to or more than the number of address signal lines for the storage device, and which stores page information given from a control unit or a memory that stores page information. A circuit including a selector that selects one of the given information, a page select register that stores the output obtained by all the selectors, and generates information for page selection according to the contents, and this pager. A data processing device comprising the above memory including a control circuit that sequentially stores the contents of the select register and outputs the last stored contents first. (2) It has means for detecting execution of a specific instruction, and when execution of a specific instruction is detected, the contents of the page select register are stored in the memory, and when execution of another specific instruction is detected, the memory 2. The data processing device according to claim 1, wherein information stored last in the page is read out and stored in the page select register.