JPS5821887A - Semiconductor light emitting element - Google Patents

Semiconductor light emitting element

Info

Publication number
JPS5821887A
JPS5821887A JP12071581A JP12071581A JPS5821887A JP S5821887 A JPS5821887 A JP S5821887A JP 12071581 A JP12071581 A JP 12071581A JP 12071581 A JP12071581 A JP 12071581A JP S5821887 A JPS5821887 A JP S5821887A
Authority
JP
Japan
Prior art keywords
semiconductor
laser
semiconductor layer
layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12071581A
Other languages
Japanese (ja)
Other versions
JPS6237906B2 (en
Inventor
Tadashi Fukuzawa
董 福沢
Hideaki Matsueda
秀明 松枝
Michiharu Nakamura
中村 道治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP12071581A priority Critical patent/JPS5821887A/en
Publication of JPS5821887A publication Critical patent/JPS5821887A/en
Publication of JPS6237906B2 publication Critical patent/JPS6237906B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/062Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes
    • H01S5/06203Transistor-type lasers

Abstract

PURPOSE:To perform a light intensity and high speed modulation by providing a semiconductor laser which has high specific resistance at both terminal on a substrate and an insular impurity region as a current path, forming an FET in parallel with the laser and driving a control electrode with reverse bias. CONSTITUTION:Semiconductor layers 2-6 forming a laser element are laminated on a semiconductor substrate 1, and an FET which has a channel region 8 and insular impurity regions 9, 9', 10 is provided on the layer 6 in parallel with each other. Since the control electrode 12 is used with reverse bias, almost no current is consumed. Thus, the light intensity can be modulated with a voltage pulse. The modulation velocity depends upon the responding velocity of the FET and the modulation velocity of the laser, thereby providing high speed modulation. Further, the layers 2, 6 are in high specific resistance, and a current path is formed in the region 10. In this manner, a laser oscillator flow a current only at the section which performs only the laser oscillation, thereby reducing the threshold current of the laser oscillation.

Description

【発明の詳細な説明】 本発明は半導体レーザ素子の変調を高いインピーダンス
の入力端子を介して直接性ない得る新規な構造を持った
半導体発光素子に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor light emitting device having a novel structure in which modulation of a semiconductor laser device can be performed directly through a high impedance input terminal.

一般に半導体レーザ装置の変調は10〜100mAの電
流パルスを直接レーザ装置に印加して行なっている。本
発明は半導体レーザ素子の一方の電極に電界効果型トラ
ンジスタ部(以下、FET部と略称する。)を接続し、
且これがモノリシックに形成芒れてなる半導体発光素子
である。
Generally, modulation of a semiconductor laser device is performed by applying a current pulse of 10 to 100 mA directly to the laser device. The present invention connects a field effect transistor section (hereinafter abbreviated as FET section) to one electrode of a semiconductor laser element,
This is a semiconductor light emitting device formed monolithically.

第1図に代表的な本発明の半導体発光集子の断面図を示
す。レーザ光の進行方向に垂直な断面を示す。
FIG. 1 shows a cross-sectional view of a typical semiconductor light emitting collector of the present invention. A cross section perpendicular to the traveling direction of the laser beam is shown.

成長用半導体基板1の上部に、半導体レーザ氷部を構成
し、更に第5の半(体層上に設けられた第6の半導体層
内に、前記半導体レーザ部に並置してPETが構成され
る。
A semiconductor laser ice part is formed on the upper part of the semiconductor substrate 1 for growth, and PET is further formed in a fifth half (sixth semiconductor layer provided on the body layer, in parallel with the semiconductor laser part). Ru.

41の半導体層2は高比抵抗層である。第2の半導体層
3は半導体レーザ電子の@1のクラッドJの、第3の半
導体層4は活性層、第4の半導体層5は第2のクラッド
層となる。当然、第2および第4の半導体層は第3の半
導体層に比較し相対的に屈折藁が小さい。そして互いに
反対導電型を有する。更に第2および第4の半導体j−
は禁制帯幅が第3の半導体層と比較し相対的に大なる半
導体層となっている。
The semiconductor layer 2 41 is a high resistivity layer. The second semiconductor layer 3 becomes the cladding J of @1 of the semiconductor laser electron, the third semiconductor layer 4 becomes the active layer, and the fourth semiconductor layer 5 becomes the second cladding layer. Naturally, the second and fourth semiconductor layers have relatively smaller refractive indexes than the third semiconductor layer. And they have mutually opposite conductivity types. Furthermore, second and fourth semiconductors j-
is a semiconductor layer with a relatively large forbidden band width compared to the third semiconductor layer.

第5の半41体層6は高比抵抗層である。The fifth half-body layer 6 is a high resistivity layer.

8は不純物領域でチャネル領域を構成する。9゜9′お
よび10は島状不純物領域で、各々はソース、ドレイン
および半導体レーザへの電流通路を構成している。
8 is an impurity region forming a channel region. 9°9' and 10 are island-shaped impurity regions, each of which constitutes a source, a drain, and a current path to the semiconductor laser.

14および17は各々、半導体レーザ素子のp側を極お
よびn側電極である。13,12、および11は各々F
ETのドレイン電極、ゲート電極、およびソース電極で
ある。この場合、14,13゜11および17はオーム
性電偵、12はショットキ(社)極である。
14 and 17 are a p-side electrode and an n-side electrode, respectively, of the semiconductor laser element. 13, 12, and 11 are each F
These are the drain electrode, gate electrode, and source electrode of the ET. In this case, 14, 13 degrees 11 and 17 are ohmic poles, and 12 is a Schottky pole.

金属電極14は半導体レーザ素子の電極である”ltE
、FETのドレイン電極13に短絡されている。
The metal electrode 14 is an electrode of a semiconductor laser element.
, are short-circuited to the drain electrode 13 of the FET.

; レーザ光の進行方向に直角な断面は、たとえば) 1、r開によって反射面が形成され、光共振器が構成さ
れている。
For example, the cross section perpendicular to the traveling direction of the laser beam is as follows: 1. A reflective surface is formed by an r-opening, and an optical resonator is configured.

以上の様な構成の半導体発光素子を電極11と17との
間に電圧を印加することによシレーザ発振を行なわせる
ことが出来る。この構成の等価回路の例は第2図の通り
である。第2図中の番号は第1図の番号の部位に対応す
る。8.D、Gは各各FETのソース、ドレイン、ゲー
トに対応する。
By applying a voltage between the electrodes 11 and 17 of the semiconductor light emitting device having the above structure, it is possible to cause laser oscillation. An example of an equivalent circuit of this configuration is shown in FIG. The numbers in FIG. 2 correspond to the numbered parts in FIG. 8. D and G correspond to the source, drain, and gate of each FET.

従って、ゲート71112に1B1」個用の電圧を印加
することKよって半導体レーザの発振を制御することが
出来る。又、半導体層の2x電型を逆のものを用いて半
導体発光装置を構成しても勿論良い。当然等向回路も逆
極性となる。
Therefore, by applying voltages for 1B1'' to the gate 71112, the oscillation of the semiconductor laser can be controlled. Of course, a semiconductor light emitting device may also be constructed using a semiconductor layer having the opposite 2x electric type. Naturally, the isometric circuit also has opposite polarity.

この様に制御用醒極で半導体レーザ素子の発振を制御出
来る構造は次の如き利点を生み出す。
The structure in which the oscillation of the semiconductor laser element can be controlled using the control polarity as described above produces the following advantages.

(1)電圧パルスによって光強度を変調することが出来
る。
(1) Light intensity can be modulated by voltage pulses.

1Iill m用電極は逆バイアスで用いるため電流は
ほとんど消費されない。このため、通常のシリコンIC
,ycとえばTTL回路(transistortra
nsistor logic C1rcujt )の出
力信号で、半導体レーザ素子を0N−OFFすることが
可能である。
Since the electrode for 1Illm is used with reverse bias, almost no current is consumed. For this reason, ordinary silicon IC
, yc For example, TTL circuit (transistortra
It is possible to turn the semiconductor laser element ON-OFF using the output signal of the nsistor logic C1rcujt.

(2)冒速度変調が可能である。(2) Speed modulation is possible.

変調速度はFET部の応答速度と、レーザの変調速度で
決まり%IGb/8以上の変調速度が達成出来る。
The modulation speed is determined by the response speed of the FET section and the modulation speed of the laser, and a modulation speed of %IGb/8 or more can be achieved.

更に本発明はレーザ発振部の電流を活性層に対してn側
とp側の両方で制限を付している。即ちひとつは第1の
半導体層2を高比抵抗となし、開孔15を設けることで
ある。他方は第5の半導体し得る。こうした手段がない
場合に比して約1/10程度となし得る。又温度特性も
向上がはかれる。
Further, in the present invention, the current of the laser oscillation section is limited on both the n side and the p side with respect to the active layer. That is, one method is to make the first semiconductor layer 2 high in resistivity and provide the openings 15. The other may be the fifth semiconductor. It can be reduced to about 1/10 compared to the case without such means. Furthermore, the temperature characteristics can also be improved.

結晶、第1の半導体層はGa、AlfAS(Qくx<0
.7)、第2の半導体層はG ar −yAtyAs 
(0,2<)’<0.7)、第3の半導体層はGat−
IAムAs(oくz<、o、a >、sg4の半導体層
はG aI−sA4 Ass(0,2<S<0.71 
、第5の半導体層はGa1−tAttAst (O<1
<0.3 ) 、(但しz :) y 。
crystal, the first semiconductor layer is Ga, AlfAS (Qx<0
.. 7), the second semiconductor layer is Gar-yAtyAs
(0,2<)'<0.7), the third semiconductor layer is Gat-
The semiconductor layer of sg4 is GaI-sA4 As(0,2<S<0.71
, the fifth semiconductor layer has Ga1-tAttAst (O<1
<0.3), (where z:) y.

z)s、t)s)である。z)s, t)s).

第3図から第6図は本発明の半導体発光素子の製造工程
の各ステップを示す素子断面図である。
3 to 6 are device cross-sectional views showing each step of the manufacturing process of the semiconductor light emitting device of the present invention.

また前述の第1図はその完成図である。Moreover, the above-mentioned FIG. 1 is a completed diagram.

(100)而を上面に持つn型G a A S基板(電
子濃gn:1018/の3)1面上に次の各層を周知の
液相エピタキシャル法に依って形成する。
The following layers are formed on one surface of an n-type GaAs substrate (electron concentration gn: 1018/3) having a (100) crystal on the upper surface by a well-known liquid phase epitaxial method.

Ga−Al−ASのメルト(7jとえばGa:At=0
.7:0.3)を水素雰囲気、830〜870Cで3時
間程度ベークした後、液相エピタキシャル]法によって
前記GaA3基板上にG aAtA8層2をi形成する
。この層の比抵抗は500Ω・α以上とシ なす。実用上はIOKΩ・crn程度の比抵抗を越える
必要はない。冒比抵抗層の厚さは500Å以上必要であ
る。1μm以上の厚さを持たせることはない。余シこの
層が厚いと次の工程での加工が・やシにくくなる。
Ga-Al-AS melt (7j For example, Ga:At=0
.. 7:0.3) in a hydrogen atmosphere at 830 to 870 C for about 3 hours, a GaAtA 8 layer 2 is formed on the GaA 3 substrate by a liquid phase epitaxial method. The specific resistance of this layer should be 500Ω·α or more. In practice, it is not necessary to exceed a specific resistance of about IOKΩ·crn. The thickness of the resistive layer needs to be 500 Å or more. It should not have a thickness of 1 μm or more. If this layer is thick, it will be difficult to process in the next process.

次いでこの半導体基体にレーザ光の進行方向と平行にス
トライプ状の溝15を形成する。この溝の加工に際して
のエツチング液はリン酸、過酸化水素水およびエチレン
グリコール(容積化1:1:3)の混合液を用いる。通
常のフォトリングラフィ技術を用いて十分である。この
溝ばGaAl−A3層2が冒比抵抗であるので電流を開
孔部に集中させる役割をはたしている。又、レーザ光の
基板へのしみ出しを利用し、横モードの制御を行なうた
めのものである。
Next, striped grooves 15 are formed in this semiconductor substrate in parallel to the traveling direction of the laser beam. The etching solution for forming this groove is a mixed solution of phosphoric acid, hydrogen peroxide and ethylene glycol (volume: 1:1:3). Using conventional photolithography techniques is sufficient. Since this grooved GaAl-A3 layer 2 has a high resistivity, it plays the role of concentrating the current in the opening. It is also used to control the transverse mode by utilizing the seepage of laser light into the substrate.

・ 第2の半導体層3はp型Gap、? Ato、s 
A3層を厚さ318mに、第3の半導体層4はGaAS
層を厚さ0.05μmに、第4の半導体層5はn型Ga
1)、? AlosA 8層を厚さ1μmに、第5のf
4体層6は扁比抵抗GaAS層を厚さ1μmを連続的に
液相エピタキシャル成長する。比抵抗としては前述の半
導体層2と同程度で良い。半導体層6のレーザ発振部に
対応する領域20を、硫酸、過酸化水パ水、水4:1:
1(芥績比)でエツチングし厚さ0.3μmとなす。こ
の時、エツチング用マスクとして、厚す0.5μmのs
Io、膜を用いる。
- The second semiconductor layer 3 is p-type Gap, ? Ato,s
The thickness of the A3 layer is 318 m, and the third semiconductor layer 4 is made of GaAS.
The fourth semiconductor layer 5 is made of n-type Ga.
1),? AlosA 8 layers with a thickness of 1 μm, the fifth f
The four-body layer 6 is formed by continuously growing a resistivity GaAS layer to a thickness of 1 μm by liquid phase epitaxial growth. The specific resistance may be about the same as that of the semiconductor layer 2 described above. The region 20 corresponding to the laser oscillation part of the semiconductor layer 6 was treated with a mixture of sulfuric acid, peroxide/water solution, and water in a ratio of 4:1.
Etched at 1 (wood grain ratio) to a thickness of 0.3 μm. At this time, as an etching mask, a 0.5 μm thick s
Io, using a membrane.

次いで、ネガ型フォトレジストを0,5μmの厚さに塗
布し、10および9(9’)の各電極部に対応する部分
以外に光を照射する。現像処理後、S40.をエツチン
グすることで10およヒ9(9’)に対応する部分の、
?i品が露出する。フォトレジストの露光は結晶面の平
坦な部分でなされるため、精度良く行なわれる。次いで
 S 1イオンを電圧150kVで、ドーズ址2 X 
1015cmづとなるように打込む周知のイオン打込法
で、10および9(9’)のn+領領域形成する。イオ
ン打込法そのものは通常の手段を用いれば良い。領域1
0は半導体層5と市気的に接続する如くに形成される。
Next, a negative type photoresist is applied to a thickness of 0.5 μm, and light is irradiated to areas other than those corresponding to the electrode portions 10 and 9 (9'). After development processing, S40. By etching the parts corresponding to 10 and 9 (9'),
? i-product is exposed. Since the photoresist is exposed to light on a flat part of the crystal plane, it is performed with high precision. Then, the S1 ions were dosed 2X at a voltage of 150kV.
N+ regions of 10 and 9 (9') are formed by a well-known ion implantation method in which ions are implanted at 1015 cm intervals. As for the ion implantation method itself, a normal method may be used. Area 1
0 is formed so as to be commercially connected to the semiconductor layer 5.

更に全く同様の方法を用いてnnn不純物成域8イオン
打込法で形成する。Siイオンは、120kVでドーズ
量I X 10”tyn−2となるように打込む。
Furthermore, using exactly the same method, eight nnn impurity regions are formed by ion implantation. Si ions are implanted at 120 kV and at a dose of I x 10''tyn-2.

半1体基板上全面に絶縁層7としてS + 01膜を形
成する。通常のフォ) IJソゲラフ技術を用いて絶縁
層7に少なくとも電極部11,12.13お1゛−″渋
び14に対応する部分に開孔する。11.13はAU 
 Ge N1合金を用いたオーミック電極。
An S + 01 film is formed as an insulating layer 7 over the entire surface of the semi-solid substrate. Holes are formed in the insulating layer 7 at least in the portions corresponding to the electrode portions 11, 12.13 and 1''-'' aperture 14 using the IJ sogelaf technique.11.13 is an AU
Ohmic electrode using Ge N1 alloy.

算2はCr、’l”iおよびAuを各/r300人。Calculation 2 is Cr, 'l"i and Au each / r300 people.

ヤOO人および4000人の厚さに積層して形成したシ
ョットキ電極である。FETのドレイン電極13とレー
ザの電極部分をAu 0e−Niによる配線14で短絡
される。
This is a Schottky electrode formed by laminating layers to a thickness of 4,000 and 4,000. The drain electrode 13 of the FET and the electrode part of the laser are short-circuited by a wiring 14 made of Au0e-Ni.

半導体基板1の裏面を研磨し、朝1くエツチングした後
、Cr、TiおよびAuを各々300 A。
After polishing the back surface of the semiconductor substrate 1 and etching it in the morning, Cr, Ti and Au were each etched at 300 A.

300人および018μmの厚さに蒸庸しp側電極17
となす。
The p-side electrode 17 was evaporated to a thickness of 300 μm and 0.18 μm.
Nasu.

最後にレーザ光の進行方向と垂直な面で結晶面を襞間し
光共振器を構成する。レーザ長は300μmとした。
Finally, the crystal plane is folded in a plane perpendicular to the traveling direction of the laser beam to form an optical resonator. The laser length was 300 μm.

この様にして半導体発光素子が完成する。In this way, a semiconductor light emitting device is completed.

この発光素子はソース電極11とレーザ索子のn 11
111 ”f[極17の間に4〜5vの′電圧を印加す
ることにより、レーザ発振を行なわしめることが出来る
。発温波長83oo人、しきい電流は約5 Ill A
This light emitting element has a source electrode 11 and a laser probe n 11
Laser oscillation can be performed by applying a voltage of 4 to 5 V between the poles 17.The heating wavelength is 83 mm, and the threshold current is approximately 5 Ill A.
.

変調は2.50 HZまでなし得た。又、F’ETのト
ランスコンダクタンス(gm )id、 10m5 (
ミリシーメンス)であった。
Modulation could be achieved up to 2.50 HZ. Also, the transconductance (gm) id of F'ET, 10m5 (
Millisiemens).

本発明の実施例に示す半導体材料に限られるものでない
ことは勿論である。父、半導体レーザのモード安定化の
ため種々の手段があるが、本発明の発光半纏体素子の千
志体レーザ部に適用して良いことは勿論であり、本発明
の範囲のものである。
Of course, the present invention is not limited to the semiconductor materials shown in the examples. Although there are various means for mode stabilization of a semiconductor laser, it goes without saying that these methods may be applied to the solid state laser section of the light-emitting semi-enveloped device of the present invention, and are within the scope of the present invention.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体発光ッ、′−子のレーザ光の進
行方向に垂直な而と平行な面での断面図、第2図は半導
体発光素子の等価回路、第3図〜第6図で本発明の半導
体発光素子の製造工程を説明する) ための素子断面図である。 ;1− p(’T a A S基板、2・・・高比抵抗
GaAS層、3.5・・・Ga AtA S層、4・・
・活性層、6・・・高比抵抗GaAs層、11・・・ソ
ース電極、13・・・ドレイン電極、12・・・ゲート
醒極、14・・・レーザ発撮部p側′醒惨、17・・・
n側電極。 特許出願人 工業技術院長 石板誠− (11) ¥、Il   図 罰  Z  閃
FIG. 1 is a cross-sectional view of the semiconductor light emitting device of the present invention, taken in a plane perpendicular to and parallel to the traveling direction of the laser beam, FIG. 2 is an equivalent circuit of the semiconductor light emitting device, and FIGS. FIG. 2 is a cross-sectional view of a semiconductor light emitting device according to the present invention for explaining the manufacturing process of the semiconductor light emitting device according to the present invention. ;1-p('T a S substrate, 2... high resistivity GaAS layer, 3.5... Ga AtA S layer, 4...
・Active layer, 6... High resistivity GaAs layer, 11... Source electrode, 13... Drain electrode, 12... Gate electrode, 14... Laser emitting part p side's electrode, 17...
n-side electrode. Patent applicant Makoto Ishiita, Director of the Agency of Industrial Science and Technology (11) ¥, Il Figure Punishment Z Sen

Claims (1)

【特許請求の範囲】 1、所定の半導体基板上に第1.第2.第3.第4およ
び第5の半導体層が順次積層され、その内部にp −n
接合を有する半導体層の積層領域と、ゲート電極とこれ
を挾む第1の盲、極と第2の電極とを有する電界効果ト
ランジスタ部とを少なくともMし、前6ピ第2および第
4の半導体層は前記第3の半導体層に比軟し相対的に屈
折率が小さく、禁jli!」帯幅が相対的に大であシ且
互いに反対導電型を有する半導体層であり、前記第1の
半導体層は高比抵抗層であり且レーザ光の進行方向に平
行で、少なくとも前記半導体基板に達するストライプ状
の溝部を4WL、前記第5の半導体層は高比抵抗層であ
り、この内部に前記ストライプ状の溝に略々対応した位
置にこの溝部の方向と同じ方向にストライプ状の不純物
領域が設けられ、前記ストライプ状の不純物領域に醒気
的に接続して電流を流通せしめる第前記成界効果トラン
ジスタの8g1の電極が短絡され、前記ストライプ状の
溝および不純物領域の長手方向に輻射光を放出せしめる
ための光共振器となす手段を少なくとも有することを特
徴とする半導体発光素子。 2、前記電界効果トランジスタ部は前記第5の半導体層
に設けられた不純物領域に形成されたことを特徴とする
特許請求の■α囲第1項記載の半導体発光素子。
[Claims] 1. A first . Second. Third. Fourth and fifth semiconductor layers are sequentially stacked, and p-n
A stacked region of semiconductor layers having a junction, a field effect transistor portion having a gate electrode and a first blind electrode sandwiching the gate electrode, a pole and a second electrode are formed at least M, and The semiconductor layer has a softer refractive index than the third semiconductor layer, and has a relatively small refractive index. '' are semiconductor layers having a relatively large band width and mutually opposite conductivity types, and the first semiconductor layer is a high resistivity layer and is parallel to the traveling direction of the laser beam, and at least the semiconductor layer 4WL, the fifth semiconductor layer is a high resistivity layer, and a stripe-shaped impurity is formed inside the striped groove at a position approximately corresponding to the striped groove in the same direction as the groove. The 8g1 electrode of the field effect transistor, which is connected to the striped impurity region in an air-like manner and allows current to flow therein, is short-circuited to cause radiation to flow in the longitudinal direction of the striped groove and the impurity region. 1. A semiconductor light emitting device characterized by having at least a means serving as an optical resonator for emitting light. 2. The semiconductor light emitting device according to claim 1, wherein the field effect transistor portion is formed in an impurity region provided in the fifth semiconductor layer.
JP12071581A 1981-08-03 1981-08-03 Semiconductor light emitting element Granted JPS5821887A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12071581A JPS5821887A (en) 1981-08-03 1981-08-03 Semiconductor light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12071581A JPS5821887A (en) 1981-08-03 1981-08-03 Semiconductor light emitting element

Publications (2)

Publication Number Publication Date
JPS5821887A true JPS5821887A (en) 1983-02-08
JPS6237906B2 JPS6237906B2 (en) 1987-08-14

Family

ID=14793202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12071581A Granted JPS5821887A (en) 1981-08-03 1981-08-03 Semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JPS5821887A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6077485A (en) * 1983-10-03 1985-05-02 Mitsubishi Electric Corp Semiconductor laser device
JPS61215234A (en) * 1985-03-22 1986-09-25 Nippon Kogaku Kk <Nikon> Glass composition for glass ionomer cement
US4766472A (en) * 1986-01-06 1988-08-23 Francois Brillouet Monolithic semiconductor structure of a laser and a field effect transistor
US5202896A (en) * 1991-07-16 1993-04-13 The United States Of America As Represented By The Secretary Of The Air Force Bipolar inversion channel field effect transistor laser
US6620861B1 (en) 1999-11-17 2003-09-16 Kabushiki Kaisha Shofu Dental fillers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55117295A (en) * 1979-03-02 1980-09-09 Hitachi Ltd Semiconductor light emitting element and fabricating the same
JPS5670681A (en) * 1979-11-14 1981-06-12 Hitachi Ltd Semiconductor luminous element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55117295A (en) * 1979-03-02 1980-09-09 Hitachi Ltd Semiconductor light emitting element and fabricating the same
JPS5670681A (en) * 1979-11-14 1981-06-12 Hitachi Ltd Semiconductor luminous element

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6077485A (en) * 1983-10-03 1985-05-02 Mitsubishi Electric Corp Semiconductor laser device
JPS61215234A (en) * 1985-03-22 1986-09-25 Nippon Kogaku Kk <Nikon> Glass composition for glass ionomer cement
US4766472A (en) * 1986-01-06 1988-08-23 Francois Brillouet Monolithic semiconductor structure of a laser and a field effect transistor
US5202896A (en) * 1991-07-16 1993-04-13 The United States Of America As Represented By The Secretary Of The Air Force Bipolar inversion channel field effect transistor laser
US6620861B1 (en) 1999-11-17 2003-09-16 Kabushiki Kaisha Shofu Dental fillers

Also Published As

Publication number Publication date
JPS6237906B2 (en) 1987-08-14

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