JPS58215795A - Non-volatile memory device - Google Patents

Abstract

PURPOSE:To attain high reliability, by using a part of location of a memory as an exclusive location storing the number of times of write to the said memory device for confirming the number of times of program. CONSTITUTION:An exclusive location 2 in all block number 1 of a storage area is allocated to store the number of times of program of said memory and the number of bits of the location 2 corresponds to the limit value of the number of times of program of said memory. Further, every time the program write to said memory takes place, the location 2 is read out, the stored value is counted up, and the counted-up value is stored in the location again. Then, the program is written in the storage area other than the location 2.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to non-volatile memory devices, and more particularly to electrically programmable semiconductor non-volatile memory devices.

[Technical background of the invention and its problems]

Semiconductor nonvolatile memory uses MO8 type FETs to store binary information depending on the amount of accumulated charge, and has the characteristic that stored contents can be retained without applying a power supply voltage.

There are various types of such non-volatile memory, but so far the so-called UV-EPROM (Ul t
raViolet-Erasabls & Progr
amable ROM) are widely used. This U
V-EPROM erases its stored contents by irradiating it with ultraviolet rays, but it has the disadvantage that it must be removed from the circuit for writing and erasing.

Therefore, Elli:PRO has recently been in the spotlight.
M(Electrally FJrasable
& Programmable ROM). This E
F, FROM has the advantage that it can be freely erased and written to using a separate writing and erasing device while it is mounted, so it is suitable for systems where the memory contents are frequently changed, such as cash register machines. It is ideal for such things.

On the other hand, lPROM is also used as a nonvolatile RAM configured in combination with a normal static RAM. Static RAM and EEPRO of the same capacity for this non-volatile RA
It operates as a normal RAM while the power is turned on, and just before the power is turned off, the contents stored in the static RAM are transferred to the -HEI1mFROM and retained there, and after the power is turned on again, the contents stored in the static RAM are transferred to the EEPROM side. This is to ensure non-volatility by returning the data to static RAM.

A problem with such an EEPROM is that it is necessary to apply a high voltage during writing, which limits the number of times the stored content can be changed, that is, programmed. Currently, the limit for the number of programs is generally 1000 to 10
It is said to be about 000 times. This limit must be strictly observed when using the product. This is because the reliability of the stored contents cannot be guaranteed if the limit is exceeded.

Here, the operating principle of the EEPROM and the reason why the number of programs can be limited will be explained. FIG. 1 is a cross-sectional view of one cell of a typical EEPROM, and (a
) shows the state when writing the program, and (b) shows the state when erasing. In Figure 1, P type 81
On the substrate IO are a first electrode 11 made of first layer polysilicon, a 70-ring gate 12 made of second layer polysilicon, and a second electrode (for writing and erasing) made of third layer polysilicon.
It is provided together with the insulating layer 14. The floating game H2 is placed between the first electrode 11 and the second electrode 13 in a floating state.

When programming (see FIG. 1(a)), the first electrode 1
1 is fixed at 0 [V] or the ground potential, and a positive high potential voltage (2) is applied to the second electrode 13. At this time, the potential of the floating gate 12 also rises to the positive high potential V due to the electrostatic coupling with the second electrode 13. Then, a high electric field is generated between the floating gate 12 and the first electrode 11, and electrons move from the first electrode 11 toward the floating gate 12 due to the tunnel effect, and the electrons are captured by the be done.

When the electrons are sufficiently captured, the potential of the second electrode 13 is reduced to 0.
Return to [v] and end the program operation. In this state, the potential of the floating gate 12 is negative. This is because electrons are captured.

Next, the case of erasing (see FIG. 1(b)) will be described. First, it is assumed that this cell has already been programmed and the floating gate 12 has captured electrons. The first electrode 11 is fixed at 0 [V], the floating gate 12 is set at 0 [V], and a voltage of +V is applied to the second electrode 13. Then, the floating gate 12 and the second
A high electric field is generated between the electrode 13 and the floating game H2, and the electrons captured by the floating game H2 are expelled through the S1 insulating layer 14 to the second electrode 13 due to the tunnel effect. The erasing operation ends when there are no captured electrons, and the voltage of the second electrode 13 is returned to 0 [V].

As can be seen from the above, the state in which the floating gate 12 captures electrons and has a negative potential is the programmed state, and the opposite is the erased state. These two states correspond to the signal logic "'1" and "0" outside the memory.However, it is not univocally determined whether the program state is the logic "1" or the erase state is the logic "eIO". do not have. This is because it is determined by the relationship with peripheral devices.

In the EEPROM described above, the reason why the number of programs is limited is that a high voltage is applied to the second electrode 13 during programming, and electrons are moved from the first electrode 11 to the floating gate 12 due to the tunnel effect. In other words, the electrons pass through the 810□ insulating layer between the first electrode 11 and the floating gate 12 and move, causing stress and deteriorating the insulating layer. Note that even if a write operation is performed on a cell that is already in an erased state, no stress is applied to the cell, so the rate of occurrence of deterioration is extremely low.

As mentioned above, if such an EEPROM is used in a system where programs are frequently changed, there is a risk that the memory contents will be lost. Conventionally, measures have been taken to replace the EEPROM at an appropriate time based on an appropriate judgment based on the period of use of the system.

However, this kind of usage leaves concerns about reliability and is not appropriate.

[Object of the Invention] Therefore, an object of the present invention is to provide a nonvolatile memory device that can confirm the number of times the memory is programmed in a FEPROM, thereby ensuring high reliability.

[Summary of the invention]

In order to achieve the above object, a nonvolatile memory device according to the present invention is provided with a location composed of memory cells that sequentially stores the number of writes to the memory device, and by knowing the stored value of this location, the nonvolatile memory device according to the present invention The feature is that the usage limit can be known.

〔Effect of the invention〕

According to the present invention having such a configuration, it is possible to accurately and reliably know the usage limit of the memory device, thereby preventing the loss of stored contents in a system where programs are frequently changed. can improve reliability. Furthermore, unlike conventional judgments based on predictions, the number of writes can be known with certainty, so it is possible to suppress the uneconomical situation of replacing items that still have room.

[Embodiments of the invention]

Hereinafter, the present invention will be described in detail based on illustrated embodiments. FIG. 2 shows a memory device according to the present invention, in which an EEFROM
FIG. 2 is a block diagram showing an example in the case of a single device.

In Fig. 2, 1 indicates the total number of blocks in the memory area, and a specific location (hereinafter referred to as a dedicated location) 2 is allocated to store the number of programs in the memory. ing.

The number of bits in the dedicated location 2 corresponds to the programming frequency limit of the memory, and the dedicated location 2 is configured by allocating the corresponding memory cells.

Next, the operation of counting the number of programs will be explained. First, set the dedicated location 2 to an initial value (for example, '0') in advance. From then on, every time a program is written to the memory, the dedicated location 2 is read and the stored value is counted up (for example, +1) and stores the counted up value again in dedicated location 2. Next, write the program to a storage area other than dedicated location 2. Note that whether to count up first or
It is a design problem to write the program first.

FIG. 3 is a block diagram showing an example in which the present invention is applied to a nonvolatile RAM that is a combination of a normal RAM and an EEPROM.

In Fig. 2, 3 indicates RAM, and EEPRO
Regarding M, the reference numerals in FIG. 2 are quoted. First, the dedicated location 2 is set in advance to an initial value (for example, "0"). RAM3 is used to write and read various information during normal system operation.For example, when the system power is turned off, the contents of RAM3 are written to and read from the EEPR.
Store and retain on the OM side.

Now, if you want to store the stored contents from RAM3 to EEPROM, immediately before storing
Read the dedicated location 4 provided in . This dedicated location 4 corresponds to dedicated location 2 of the EEPROM. After counting up the read contents of the dedicated location 4, the contents are written to the dedicated location 4 again. After this dedicated location 4 is updated, R
Store the contents of AM3 in storage area 1. At this time, the contents of dedicated location 4 are also stored in dedicated location 2.

Next, when using RAM3 again, EEPROM
The contents of storage area 1 and dedicated location 2 are exactly the same! Write to tRAM3 and dedicated location 4 (this is called recall).

In this way, the number of times the EEPROM is programmed is always stored and held in a non-volatile state, so the usage limit can be known accurately and reliably. the result,
It is possible to prevent loss of important information.

[Modified example of the invention]

In the embodiment described above, the contents of the dedicated location 2 or 4 are updated by incrementing the contents by 1 each time a program is written.
The maximum number of programs guaranteed in the iEPROM may be preset, and the content may be decremented by 1 each time the program is changed. If you do so,
The EEPROM can know how many times the program can be changed remaining. Additionally, when the specified number of programs has been reached, some type of display (for example, CRT display, lamp display, etc.) may be displayed to notify the user, or changes to the program may be prohibited in order to proactively prevent the loss of information. You may also do so.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of one cell of a general EEPROM, in which (a) shows a program write state, (b) shows an erase state, and FIG. 2 shows an embodiment of a memory device according to the present invention. Block Diagram FIG. 3 is a block diagram showing another embodiment. 1...Storage area, 2...Dedicated location, 3.
...RAM, 4... Dedicated location. Applicant's agent Kiyoshi Inomata

Claims (1)

[Claims] A non-volatile memory device using electrically programmable non-volatile memory, characterized in that some locations in the memory are used as dedicated locations for storing the number of times writing to the memory device has occurred.