JPS58213470A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To form the titled semiconductor device microscopically as well as to reduce the contact resistance between the buried region and the epitaxial surface thereof by a method wherein an impurity-added region comes in contact with a part of the side face of the material containing a buried insulating substance, and a high density region is provided in the vicinity of the contact surface. CONSTITUTION:A buried region 202 is formed by diffusing the second conductive type impurities on the selective region located on one main surface of the first conductive type semiconductor substrate 201. Then the second conductive type epitaxial layer 203 is formed on the surface of the substrate 201 which is provided on the region 202. Then, at least a part of the film thickness of the layer 203 is selectively removed, and a convex island region 203 is formed. Subsequently, the second conductive type impurities are added at least to the side face of the region 203, and an impurity-added region 211 is formed. As a result, the resistance value between the external electrode and the region 202 can be lowered.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to an epitaxial type semiconductor device suitable for integrated circuits that can be made smaller and higher in performance, and a method for manufacturing the same.

Conventional bipolar integrated circuits typically use epitaxial transistors. FIGS. 1(a) to (ω) are manufacturing process cross-sectional views for explaining a conventional semiconductor device and its manufacturing method. As a result, FIGS.
A semiconductor device is obtained. First, the manufacturing process will be explained.

First, a buried region 102 of NFLL of a second conductivity type different from that of the substrate is selectively formed on a p-type silicon substrate 101 of a first conductivity type, and an n-type epitaxial layer 103 is uniformly formed on the substrate. A p-type diffusion region 104 of the same conductivity type as the substrate which divides the epitaxial layer is provided. In this case, an epitaxial layer 103 having a buried region at the bottom surrounded by the p-type region is formed. Next, an oxide film 105 is selectively formed on the surface of the core epitaxial layer, and a nitride film 1 is formed on it.
06 is formed (FIG. 1(a)).

Subsequently, using the pattern of the nitride film 106, a portion 107 of the epitaxial layer is removed to form a convex island region (FIG. 1(b)).

Next, using the nitride film 106 as a mask, at least the epitaxial layer not covered with the nitride film is selectively oxidized by thermal oxidation to form an oxide film 108. At this time, the epitaxial layer region covered with the nitride film 106 is not oxidized. As a result, the semiconductor has a flat surface having an epitaxial region 103 surrounded by the selective oxide film 108. In addition, a part of the lower surface of the selective oxide film 108 is connected to the remaining p-type diffusion region 104 (FIG. 1(C)).
).

Next, the nitride film 106 and oxide film 105 remaining on the surface
After removing the oxide film 109 and forming the oxide film 109 again on the surface of the epitaxial layer 1103, an opening 110 is selectively provided in the oxide film 109 to reach the surface of the epitaxial layer 103 (FIG. 1(d)). Subsequently, n-type impurities are diffused into the epitaxial layer 103 through the opening, and heat treatment is applied to form an impurity-doped region 111 that reaches the buried region 102.

Note that the surface oxide film 108 may be formed before or after the heat treatment, or at the same time as the heat treatment (see Fig. 1(e)
)).

the epitaxial layer 103 by known techniques.
A base region 112. An emitter break 113 is formed. It is also possible to form the ttcam region 114 on the surface of the impurity doped region 1110 formed in the above step (FIG. 1(e)) at the same time as the emitter region 113 is formed. (Figure 1(f)). After that, openings are provided in the oxide film on the surface of the epitaxial layer, and electrode patterns 115, 116, 117 made of aluminum are formed to cover the openings. Then, the electrode connected to the impurity doped region 111 is connected to the collector electrode 115*the space region 112 and the emitter region 113.
The transistor is completed by connecting the electrodes as the pace electrode 116 and the emitter electrode 117, respectively.
Figure 1(g)).

As described above, in the conventional manufacturing method, when forming the n-type impurity doped region 111 that connects the n-type buried region 102 and the surface of the epitaxial layer 1030 with low resistance, the opening 110 is formed in the oxide film 109 on the surface of the epitaxial layer 103. The n-type impurity is added from the surface through the opening. Thereafter, it is diffused by heat treatment and connected to the buried region.

FIG. 2 is an explanatory diagram showing the state of a connection layer between an epitaxial surface and a buried region of an epitaxial bipolar transistor formed by a conventional manufacturing method. In the figure, the connection layer 111 is diffused from the surface to a depth of a, and the buried layer 111 is
2, and on the other hand, due to thermal diffusion, it is diffused laterally by a distance b from the end of the diffusion hole. Since b is large, the distance 0 to the adjacent diffusion region is very small.

Generally, the impurity concentration in a region formed by thermal diffusion of impurities from the surface decreases from the surface toward the depth, and the resistance value increases accordingly.

On the other hand, the n-type impurity doped region is provided to reduce the resistance value between the external electrode made of aluminum or the like formed on the epitaxial surface and the n-type buried region. There was a problem in that the resistance increased and a desirable low resistance value could not be obtained as a whole.

In addition, in FIG. 2, the n-type impurity doped region 111 is formed by adding impurities from the surface of the epitaxial layer 103.
The diffusion should be approximately as thick as the grooved epitaxial layer 103. On the other hand, it is known that as a property of semiconductor materials, when diffusion occurs to a certain depth in the depth direction, the diffusion progresses in the lateral direction approximately 0.7 times as much as in the depth direction. Therefore, in this example, the distance traveled in the lateral direction is b=0.7Xa. That is, in order to form an n-type impurity doped region, in the conventional technique, at least the lengths of Q and 7 X a need to be taken into consideration. Therefore, in today's world where there is a growing demand for miniaturization, there is a problem in that both area and margin length are extremely disadvantageous.

SUMMARY OF THE INVENTION Therefore, the present invention has been made to address the above problems, and an object of the present invention is to provide a semiconductor device that can be miniaturized and that can reduce the connection resistance between a buried region and an epitaxial surface, and a method for manufacturing the same. .

In other words, the gist of the invention of Suihiro 1 is to have an epitaxial layer made of a second conductivity different from that of the substrate on one main surface of a semiconductor substrate of a first conductivity type, and to provide an epitaxial layer at the interface between the epitaxial layer and the semiconductor substrate. The epitaxial region has a buried region of a second conductivity type and higher concentration than the epitaxial layer nearby, and has an epitaxial region surrounded by a material containing an insulating material buried in at least a part of the thickness of the epitaxial layer. , in a semiconductor device having a second conductivity type impurity doped region connecting the buried region and a surface of an epitaxial layer, the impurity doped region contacts a part of a side surface of the buried material containing an insulating substance; and a high concentration region near the contact surface.

Further, the gist of the invention of Mizuo 2 is to form a buried region by diffusing an impurity of a second conductivity type different from that of the substrate into a selected region on one principal surface of a semiconductor substrate of a first conductivity type. , forming an epitaxial layer of a second conductivity type on the surface of the semiconductor substrate on which the buried region is formed; and selectively removing at least a part of the thickness of the epitaxial layer to form a convex island region. A method of manufacturing a semiconductor device comprising the steps of: forming a semiconductor device; and adding an impurity of a second conductivity type to at least a side surface of the convex island region.

Hereinafter, details of this shield will be explained with reference to the drawings.

FIGS. 3(1) to 3(e) are process cross-sectional views for explaining a semiconductor device and its manufacturing method according to an embodiment of the first and second inventions. First, the semiconductor device according to the invention of Mizuhiro 1 can be manufactured by the following steps.

A buried region 202 of a conductivity type different from that of the substrate, that is, an n-type, is selectively formed on a p-type silicon substrate 201, and an epitaxial layer 203 is grown uniformly on the substrate to form a substrate that penetrates the core epitaxial layer. A p-type diffusion region 204 of the same conductivity type is provided. In this case, an epitaxial layer 203 surrounded by a p-type region and having a buried layer at the bottom is formed. Next, an oxide film 205 and a nitride film 206 are selectively formed on the epitaxial surface. Next, the nitride film 206
(7) Using the pattern as a mask, a portion 207 of the epitaxial layer is removed to form a convex island region 203 (
Figure 3(a)).

Next, a photoresist film 219 is selectively formed. At this time, it is necessary that at least a part of the side surface of the convex island region formed up to the previous step is exposed from a part of the photoresist film 219.

Using the photoresist film 219 as a mask, an ion implantation method is selectively applied to the region not covered with the photoresist film, that is, at least the side surface of the convex island region.
A type impurity, for example, phosphorus is added to form an n-type impurity doped region 2.
11 (FIG. 3(b)).

Subsequently, after removing the photoresist film 219, at least the epitaxial layer not covered by the nitride film is selectively oxidized by thermal oxidation using the nitride film 206 as a mask. At this time, the epitaxial layer region covered with the nitride film 206 is not oxidized.

As a result, the semiconductor substrate has a flat surface having an epitaxial region 203 surrounded by the selective oxide 208. Also, a portion of the lower surface of the selective oxide 208 is connected to a portion of the previously formed p-type diffusion region 204.

Then, the n-type impurity doped region 211 introduced in the previous step is diffused in the selective oxidation treatment step, and reliable conduction with the n-type buried region and the surface of the epitaxial layer 203 is completed. That is, the inner region is connected with low resistance (FIG. 3(C)).

After that, the surface nitride film 206. After removing the oxide film 205, an oxide film 209 is formed on the surface again. After that, the base region 212° and the emitter region 2 are formed using conventional techniques.
13 etc. are formed one after another (Fig. 3(d)).

Next, using a conventional technique, an opening is formed in the oxide film 209 covering the surface of the epitaxial layer, and a collector electrode 215 made of aluminum is formed. A base electrode 216 and an emitter electrode 217 are formed to complete the transistor (FIG. 3(e)).

As described above, in an epitaxial type semiconductor device having a buried region, the impurity-doped region connecting the surface of the epitaxial layer and the buried layer is in contact with a part of the side surface of the material containing the buried insulating material, and in the vicinity of the contact surface. A semiconductor device characterized in that it has a region with high concentration can be obtained.

FIGS. 4(a) to 4(d) are process cross-sectional views for explaining semiconductor devices and methods of manufacturing the same according to other embodiments of the first and second inventions. In the method shown in Figures 3(a) to (e), the n-type impurity doped region was formed by ion implantation, but in Figures 4(a) to (d), it was formed by thermal diffusion. carried out. That is, the following steps were performed.

First, an n-type buried region 30 is formed on the surface of a p-type semiconductor substrate 301.
2 is formed, and an epitaxial layer 303 is formed on the surface thereof. A p-type diffusion region 304 having the same conductivity type as the substrate is provided passing through the epitaxial layer. Next, an oxide film 305 is selectively formed on the surface of the epitaxial layer, and a nitride film 306 is formed thereon.
form.

Subsequently, a portion 307 of the epitaxial layer is removed using the nitride film 306 as a mask to form a convex island region 303. The steps up to this point are the same as those shown in FIG. 3(a). Next, the entire surface is oxidized, and a thin oxide film 318 is formed on the surface not covered with the nitride film 306 (see FIG. 4(a).
)).

Next, the oxide film 31 is formed on at least the side surface of the convex island region.
Selectively remove 8. exposed epitaxial layer 30
3, an n-type impurity is selectively thermally diffused to form an n-type impurity doped region 311 (FIG. 4(b)).

Next, selective oxidation is performed to form a selective oxide 308, and the n-type impurity doped region 311 is removed from the n-type buried region 302.
and the surface of the epitaxial layer 303 (FIG. 4(C)).

Then, in the same way as in the case of FIG. 3(d), the pace area 31 is
2. Form emitter region 313, etc. (Fig. 4(d))
.

Next, the semiconductor device according to the first invention is completed by forming an opening in the oxide film 309 covering the surface of the epitaxial layer using a conventional technique and providing an electrode made of aluminum.
Figure (e)).

In the two embodiments described above, both have an epitaxial type of a second conductivity type different from that of the first conductivity type semiconductor substrate on the entire surface thereof, and near the interface between the epitaxial layer and the semiconductor substrate. has a buried region of a second conductivity type and a higher concentration than the epitaxial layer, and has an epitaxial region surrounded by a material containing an insulating material buried in at least a part of the thickness of the epitaxial layer; In a semiconductor device having a second conductivity type impurity doped region connecting a buried region and an epitaxial surface, the impurity doped region contacts a part of a side surface of the buried material containing an insulating material, and A semiconductor device characterized by having a highly concentrated region near the contact surface can be obtained.

Also, Fig. 3 (a) to (e), Fig. 4 (a) to (d)
The manufacturing method of the second invention shown in the embodiments includes the step of diffusing and embedding an impurity of a second conductivity type different from that of the substrate into a selected region on the whole surface of a semiconductor substrate of a first conductivity type. forming a second conductivity type epitaxial layer on the surface of the semiconductor substrate on which the buried region is formed; and selectively removing at least a part of the thickness of the epitaxial layer. A method of manufacturing a semiconductor device comprising the steps of forming a convex island region and adding a second conductivity type impurity to at least a side surface of the convex island region.

FIG. 5 is an explanatory cross-sectional view of a semiconductor device obtained by the above embodiments of the first and second inventions. The reference numerals of each part in FIG. 5 refer to the same parts as in FIGS. 3(a) to (e). First, considering the resistance value of the impurity doped region, which is the connection region between the buried region and the surface of the epitaxial layer, in the conventional technology, impurities are added from the surface of the epitaxial layer, so the impurity concentration decreases as it gets deeper from the surface. It has been difficult to lower the resistance value in this region because the resistance value increases accordingly. - In the structure of the invention, impurities are added from the side, so the surface corresponding to the conventional surface with a high impurity concentration becomes the interface between the selective oxide 308 and the epitaxial layer 303, so it has the highest impurity concentration. The region with high n
It continues to the mold embedding area 302. Therefore, the external electrode and n
The resistance value between the mold embedding region 302 and the mold embedding region 302 can be made much lower than that of the conventional method.

Next, considering the width of the n-type impurity doped region 311,
In the manufacturing method of the second invention, since the n-type impurity doped region 311 is doped from the side, it can be formed freely regardless of the thickness of the epitaxial layer 303, and the width of the n-type impurity doped region 311 is can be made extremely smaller than conventional ones. For example, if we consider the case where the formation of the n-type region 314 for the collector contact is performed at the same time as the formation of the emitter region 313, if the epitaxial film thickness is 3.0 μm and the emitter depth is 0.3 μm, the stacking using the conventional technology is Amount of warping b=3. OX0.7=2.1μ
m Accumulation of the present invention itb'=0.3X0.7=0.2
1 μm, that is, according to the present invention, the amount of accumulation can be reduced to about one-tenth of that of the conventional method. This is because the width of the n-type impurity doped region in the present invention is at most about 1.07 Jm from the side surface of the selective oxide, and the accumulation on the surface is caused by the formation of the collector contact n-type region 314 at the opening end 32.
It hardly spreads beyond 0. Therefore, it does not diffuse beyond the n-type region for contact, such as a x 9.7 in the conventional stack, and can be ignored in terms of size. Therefore, the distance C between adjacent diffusion regions is larger than in the case of FIG. That is, the need for extra area is reduced, allowing the area of transistors to be made that much smaller, leading to the miniaturization of integrated circuits.

High integration becomes possible.

In addition, Fig. 3 (a) to (e) and Fig. 4 (a) to (d)
In this embodiment, a portion of the epitaxial layer is removed when forming the island region, but the object of the present invention can be achieved even if the entire film is removed.

In addition, in the example, the material containing the insulating material buried in a part of the epitaxial layer is a nitride film as a mask and the rest as an oxide film. The object of the invention can also be achieved by forming a layer of insulating material and then filling the recesses with, for example, polysilicon to smooth the surface.

Further, in the drawings of the embodiment, the island region is finally surrounded by an insulating material, but there is a PN junction between the insulating material and the insulating material.

The object of the present invention can be achieved in the same way even if the object is surrounded by lines.

As explained above, according to the present invention, a semiconductor device can be obtained in which the resistance of the impurity-doped region connecting the buried region and the surface of the epitaxial layer is significantly reduced. Further, this semiconductor device is advantageous in terms of miniaturization and high density of the device.

[Brief explanation of the drawing]

FIG. 1 is a process cross-sectional view for explaining a conventional semiconductor device and its manufacturing method, FIG. 2 is a cross-sectional view for explaining a conventional semiconductor device, and FIGS. FIGS. 4(a) to 4(d) are process cross-sectional views for explaining a semiconductor device according to an embodiment of the second invention and a method for manufacturing the same; FIGS. 101.201.301... Semiconductor substrate, 1
02゜202.302...°...Embedded area, 1"63
,203°303...Epitaxial region, 1
04,204°304...p-type diffusion region, 10
5.205,305...°Oxide film, 106.20
6.306...Nitride film, 107.207.30
7°°°...°Epitaxial removal part, 108, 208
, 30.8°°°・°・Thick oxide film, 109°209.
309°°°...°Oxide film, 110,210,310.
... Diffusion opening, 111.211.311° old°. Impurity doped region, 112, 212, 312...
Base region, 113,213.313...Emitter region, 114,214t314...High concentration region, 115.215...Collector electrode, 11
6,216...Pace electrode, 117,217.
...Emitter electrode, 318°°゛°゛thin oxide film, 219...Photoresist film, 220...
... End of the opening, a... Thickness of the impurity doped region, b... Amount of lateral spread from the opening, C...
... Distance between adjacent areas. Kaya /TgJ bud l Figure half 2 Figure 3 (1) Hayabusa 3 times

Claims (2)

[Claims] (1) An epitaxial layer of a second conductivity type different from that of the substrate is provided on the entire surface of a semiconductor substrate of a first conductivity type, and an epitaxial layer of a second conductivity type is provided near the interface between the epitaxial layer and the semiconductor substrate. a buried region having a higher concentration than the epitaxial layer, and an epitaxial region surrounded by a material containing an insulating material buried in at least a part of the thickness of the epitaxial layer, and the buried region and the epitaxial layer In a semiconductor device having an impurity doped region of a second conductivity type that connects surfaces, the impurity doped region is in contact with a part of the side surface of the buried material containing the insulating material, and the impurity doped region is in contact with a part of the side surface of the material containing the buried insulating material, and a concentration is 1. A semiconductor device characterized by having a region with high . (2) forming a buried region by diffusing an impurity of a second conductivity type different from that of the substrate into a selected region on the entire surface of a semiconductor substrate of a first conductivity type; a step of forming an epitaxial layer of a second conductivity type on a surface of a semiconductor substrate; a step of selectively removing at least a part of the film thickness of the epitaxial layer to form a convex island region; and adding a second conductivity type impurity to at least a side surface of the island region. A method for manufacturing a semiconductor device characterized by: