JPS58212128A - Manufacture of amorphous semiconductor film - Google Patents

Manufacture of amorphous semiconductor film

Info

Publication number
JPS58212128A
JPS58212128A JP57095542A JP9554282A JPS58212128A JP S58212128 A JPS58212128 A JP S58212128A JP 57095542 A JP57095542 A JP 57095542A JP 9554282 A JP9554282 A JP 9554282A JP S58212128 A JPS58212128 A JP S58212128A
Authority
JP
Japan
Prior art keywords
metal mesh
substrate
space
electrode
glow discharge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57095542A
Other languages
Japanese (ja)
Inventor
Shigeru Minomura
箕村 茂
Kazuhiko Tsuji
和彦 辻
Takashi Hiraga
隆 平賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Anelva Corp
Original Assignee
Canon Anelva Corp
Anelva Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Anelva Corp, Anelva Corp filed Critical Canon Anelva Corp
Priority to JP57095542A priority Critical patent/JPS58212128A/en
Publication of JPS58212128A publication Critical patent/JPS58212128A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C23C16/509Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
    • C23C16/5096Flat-bed apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Plasma & Fusion (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain the amorphous semiconductor film separating spaces between the glow discharge plasma space and a space for depositing films on a substrate by a method wherein a metal mesh is provided in space between a high-frequency applying electrode and a substrate setting electrode to shield electrons and ions in the neighborhood of the substrates. CONSTITUTION:Pure silane gas is introduced from a reaction gas supply system 3 exhausting a vacuum tank 1 by a vacuum exhaust system, and gas pressure is regulated to 120mTorr, and moreover, the flow rate is regulated to 3SCCM. Then high-frequency electric power of 13.56MHz is applied to the high-frequency applying electrode 4 by 7W to generate glow discharge in space between the high-frequency applying electrode 4 and the metal mesh 8, and the amorphous silicon hydride films are stacked from neutral radicals, atoms and molecules at the stacking speed of about 12Angstrom /min on the polycrystalline silicon substrates or the glass substrates heated at about 300 deg.C on the substrate setting electrode. Even when the DC voltage of the degree of -50-+50V is applied to the metal mesh 8 by a DC electric power source 9, almost no influence is applied to the stacking speed. The amorphous silicon hydride film manufactured by this way has structural defect density smaller than the usual film using no metal mesh, and it has been observed that the photoelectric characteristic is enhanced.

Description

【発明の詳細な説明】 本発明は反応ガスのグロー放電分解に依るアモルファス
半導体膜の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an amorphous semiconductor film by glow discharge decomposition of a reactive gas.

第1図に従来アモルファス半導体膜の製造に使用されて
いる容量結合型グロー放電分解装置の模式図を示す。図
において、1は真壁僧、2は真壁排気系、3に反応ガス
供給系、4は高周波印加電極、5は高周波電源、6は基
板設置電極、7は基板を示している。通常高周波印加電
極4には反応ガスを真を槽1内に均等に導入するため、
多数の細孔が穿けられており、対向する基板設置電極6
は基板加熱機構が具備され接地電位となっている。
FIG. 1 shows a schematic diagram of a capacitively coupled glow discharge decomposition apparatus conventionally used for manufacturing amorphous semiconductor films. In the figure, 1 is a Makabe monk, 2 is a Makabe exhaust system, 3 is a reaction gas supply system, 4 is a high frequency application electrode, 5 is a high frequency power source, 6 is a substrate installation electrode, and 7 is a substrate. Normally, the high frequency application electrode 4 is used to introduce the reactive gas evenly into the tank 1.
A large number of pores are formed and the electrodes 6 installed on the opposing substrate
is equipped with a substrate heating mechanism and is at ground potential.

反応ガスのグロー放電グラズマは高周波印加電極4と基
板設置電極6との間に発生され、基板7の表面は直接プ
ラズマに曝されていた。その結果。
A glow discharge glazma of the reactive gas was generated between the high frequency application electrode 4 and the substrate installation electrode 6, and the surface of the substrate 7 was directly exposed to the plasma. the result.

基板上に堆積場れる膜はその成膜過程において。During the film formation process, a film is deposited on a substrate.

プラズマ中の電子及びイオンの衝撃により損傷され、ダ
ングリングボンド。ボイド*  5tl−1@合等アモ
ルファス半導体に好ましくない構造欠陥密度を多く生せ
しめ、光電特性等の半導体緒特性を低下させていた。
Dangling bonds are damaged by the bombardment of electrons and ions in the plasma. Void* 5tl-1@containing amorphous semiconductors have a large density of unfavorable structural defects, which deteriorates semiconductor properties such as photoelectric properties.

本発明は以上の事情にmみてなされたもので本発明によ
れば、グロー放電分解法によるアモルファス半導体膜の
製造において、金属メッシ:Le使用し、基板近傍の電
子およびイオン′ft3M蔽することにより、グロー放
電プラズマを間と基板が位置する膜堆積を間とを分離す
る事を特徴とする特許ルファス半導体膜の製造方法が得
られる。
The present invention has been made in view of the above circumstances.According to the present invention, in the production of an amorphous semiconductor film by glow discharge decomposition method, a metal mesh (Le) is used to shield electrons and ions near the substrate. , a patented method for manufacturing a rufous semiconductor film is obtained, which is characterized in that a glow discharge plasma is separated from a film deposition region in which a substrate is located.

以下に実施例を図面により詳細に説明する。Examples will be described in detail below with reference to the drawings.

第2図は本発明の二声施例である。本発明の特徴は金属
メーツシ:=−8を高周波印加電極4と基板設置電極6
との間に設け、基板7近傍の電子及びイオンを遮蔽する
ことにより、グロー放電プラズマ空間と基板への膜堆積
空間とを分離する事にある。
FIG. 2 is a two-voice embodiment of the invention. The feature of the present invention is that the metal mesh:=-8 is connected to the high frequency application electrode 4 and the substrate installation electrode 6.
The purpose is to separate the glow discharge plasma space from the film deposition space on the substrate by shielding electrons and ions near the substrate 7.

第2図において、先ず真壁檜1を臭突排気系2#/cよ
り排気し1反応ガス供給系3から反応ガスを導入し、所
足のガス圧力及び流量に脚整する。次に高周波印加電極
4に高周波%源5から′電力全供給し1反応ガスのグロ
ー放電プラズマを発生せしめ。
In FIG. 2, first, the Makabe cypress 1 is evacuated from the odor exhaust system 2#/c, and a reaction gas is introduced from the 1 reaction gas supply system 3, and the gas pressure and flow rate are adjusted to the required level. Next, full power is supplied to the high frequency application electrode 4 from the high frequency source 5 to generate a glow discharge plasma of one reaction gas.

プラズマ中の電子及びイオンを金属メツシュ8で遮蔽し
、主として中性のラジカル、原子及び分子に依シ、基板
7上に膜を堆積せしめる0金輌メツシユ8を使用しない
従来のグロー放電分解装置においてに、第1図により説
明したように、基板に堆積される膜はプラズマに接触し
、電子及びイオンにより衝撃を受ける。一方、金属メツ
シュ8を使用したグロー放電分解装置においてにプラズ
マは高周波印加電極4と金属メツシュ8間に閉じ込めら
れ、金属メツシュ8によV電子及びイオンが遮蔽され、
グロー放電プラズマ発光と基板への膜堆積9間は分離さ
れ、基板7上には主として中性ラジカル原子及び分子に
より膜が形成される。
In a conventional glow discharge decomposition apparatus that does not use a metal mesh 8, which shields electrons and ions in the plasma with a metal mesh 8, and deposits a film on the substrate 7, which relies mainly on neutral radicals, atoms and molecules. First, as explained with reference to FIG. 1, the film deposited on the substrate comes into contact with the plasma and is bombarded by electrons and ions. On the other hand, in a glow discharge decomposition device using a metal mesh 8, plasma is confined between the high frequency application electrode 4 and the metal mesh 8, and the metal mesh 8 blocks V electrons and ions.
Glow discharge plasma emission and film deposition 9 on the substrate are separated, and a film is formed on the substrate 7 mainly of neutral radical atoms and molecules.

第2図の実施例に於てに、基板設置電極6に電気的にフ
ローテインク状態となっているが、金属メツシュ8によ
る電子及びイオンの遮蔽効果は次の事実から、実証され
る0すなわち、基板設置電極6と、接地′電位量には、
高周波電流シグナルは観測されず、プラズマにより生成
されたイオン及び電子は金属メツシュ8と基板設置電極
6の空間にはプラズマ発光は観測されず、プラズマ空間
と膜堆積を間が分離されている事も確認される。以上に
述べた効果は金属メツシュに直流電源9によシー50〜
+50V程度の直流電圧r印加した場合にも11された
。 :1:・ 以下、シランガスのグロー放電分解に依り水素化アモル
ファスシリコン半導体、1lat−s造する具体例につ
いて述べる。第2図に於て、真壁僧ITh真空排気系で
排気しながら1反応ガス供給系3から純シランガスを導
入し、ガス圧力を12Qm’l’orrに。
In the embodiment shown in FIG. 2, the electrode 6 installed on the substrate is in an electrically floating state, but the shielding effect of electrons and ions by the metal mesh 8 is verified from the following fact. The substrate installed electrode 6 and the ground potential are as follows:
No high-frequency current signal was observed, and ions and electrons generated by the plasma were not observed in the space between the metal mesh 8 and the substrate-installed electrode 6, indicating that the plasma space and the film deposition were separated. It is confirmed. The above-mentioned effects can be obtained by applying the DC power supply 9 to the metal mesh.
It was also 11 when a DC voltage r of about +50V was applied. :1:・ Hereinafter, a specific example of manufacturing a hydrogenated amorphous silicon semiconductor, 1lat-s, by glow discharge decomposition of silane gas will be described. In FIG. 2, pure silane gas was introduced from the reaction gas supply system 3 while being evacuated using the Makabe ITh vacuum evacuation system, and the gas pressure was set to 12Q m'l'orr.

又、流量238CCMVc調整する。次に高周波印加電
極4に13.56M出の高周波電力を7W印加し。
Also, adjust the flow rate to 238CCMVc. Next, 7 W of high frequency power of 13.56 M was applied to the high frequency application electrode 4.

高周波印加電極4と金属メツシュ8とのを間にグロー放
11を発生せしめ、基板設置電極上で約300℃に加熱
された多結晶シリコン基板、或いはガラス基板に堆積速
度約1zV□inで中性ラジカル原子及び分子から水素
化アモルファスシリコン膜を堆積させた。金属メツシュ
8に一50〜+50V程度の直流電圧を直流電源9によ
り印加し次場合でも堆積速度は殆んど影響を受けなかっ
た。この様にして製造された水素化アモルファスシリコ
ン膜は金属メッシ!−ヲ使用しない従来の方法で製造さ
れた膜よりも構造欠陥密度が少く、光電特性が向上して
いる革が観劇された。又、アモルファスシリコン膜の赤
外吸収スペクトルの測定から、金属メツシュを使用した
製造方法で製造された水素化アモルファスシリコン#は
、使用しない場合と比較して8iH2振動モードに対応
する2100m−’の吸収強度が著しく減少し、大部分
がSiH振動モードに対応する2000鑞 となり、膜
質が改善された事が明らかとなった。
A glow emission 11 is generated between the high-frequency application electrode 4 and the metal mesh 8, and a neutral layer is deposited on a polycrystalline silicon substrate or a glass substrate heated to about 300°C on the substrate-installed electrode at a deposition rate of about 1zV□in. Hydrogenated amorphous silicon films were deposited from radical atoms and molecules. Even when a DC voltage of approximately -50 to +50 V was applied to the metal mesh 8 by a DC power source 9, the deposition rate was hardly affected. The hydrogenated amorphous silicon film produced in this way is a metal mesh! Leather was shown to have a lower density of structural defects and improved photoelectric properties than films produced by conventional methods that do not use -. Furthermore, from the measurement of the infrared absorption spectrum of the amorphous silicon film, hydrogenated amorphous silicon # manufactured using a manufacturing method using a metal mesh has a higher absorption of 2100 m-' corresponding to the 8iH2 vibrational mode than when no metal mesh is used. The strength was significantly reduced, and most of the strength was 2000 tungsten, which corresponds to the SiH vibration mode, and it was clear that the film quality had been improved.

以上の説明により明らかな様に1本発明に依れば0反応
ガスのグロー放電分解法によりアモルファス半導体膜を
製造する際に金属メツシュを使用して基板近傍の電子及
びイオンを遮蔽し、グロー放電グラズマを間と基板への
膜堆積空間とを分離する事により、主として中性ラジカ
ル、原子及び分子を基板に堆積する事が可能となった。
As is clear from the above explanation, according to the present invention, when manufacturing an amorphous semiconductor film by the glow discharge decomposition method using a zero-reactant gas, a metal mesh is used to shield electrons and ions near the substrate, and the glow discharge By separating the space between the glasma and the film deposition space on the substrate, it has become possible to deposit mainly neutral radicals, atoms, and molecules on the substrate.

その結果、構造欠陥密度が小さく光t%性の攪れたアモ
ルファス半導体膜を製造する事ができた0
As a result, we were able to produce an amorphous semiconductor film with low structural defect density and optical t% property.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はアモルファス半導体の従来の製造法を実施する
為の製造装置の概念図、111g2図##第才答は本発
明による製造法を実施する為の製造装置の概念図である
。− 図中、1は真壁槽、2は真を排気系、3は反応ガス供給
系、4は高周波印加電極、5は高周波電源、6は基板設
置、電極、7は基板、8は金属メッシ瓢、9は直流電源
。 代理人、′、、、−=、4内原 晋
FIG. 1 is a conceptual diagram of a manufacturing apparatus for carrying out a conventional manufacturing method for amorphous semiconductors, and FIG. 111g2 is a conceptual diagram of a manufacturing apparatus for carrying out a manufacturing method according to the present invention. - In the figure, 1 is a true wall tank, 2 is a true exhaust system, 3 is a reaction gas supply system, 4 is a high frequency application electrode, 5 is a high frequency power source, 6 is a substrate installation, electrode, 7 is a substrate, 8 is a metal mesh gourd , 9 is a DC power supply. Agent, ′, , -=, 4 Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims] グロー放電分解法によるアモルファス半導体膜の製造に
おいて、金属メツシー1使用し、基板近傍の電子および
イオンを遮蔽することにょ九グロー放電プラズマ空間と
該基板が位置する膜堆積空間とを分離する事を特徴とす
るアモルファス半導体膜の製造方法□
In manufacturing an amorphous semiconductor film by glow discharge decomposition method, a metal mesh 1 is used to shield electrons and ions near the substrate, thereby separating the glow discharge plasma space and the film deposition space where the substrate is located. Method for manufacturing an amorphous semiconductor film □
JP57095542A 1982-06-03 1982-06-03 Manufacture of amorphous semiconductor film Pending JPS58212128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57095542A JPS58212128A (en) 1982-06-03 1982-06-03 Manufacture of amorphous semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57095542A JPS58212128A (en) 1982-06-03 1982-06-03 Manufacture of amorphous semiconductor film

Publications (1)

Publication Number Publication Date
JPS58212128A true JPS58212128A (en) 1983-12-09

Family

ID=14140448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57095542A Pending JPS58212128A (en) 1982-06-03 1982-06-03 Manufacture of amorphous semiconductor film

Country Status (1)

Country Link
JP (1) JPS58212128A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2608634A1 (en) * 1986-12-23 1988-06-24 Sgs Microelettronica Spa Process and device for chemical deposition in plasma-activated vapour phase
US8435596B2 (en) 2007-02-09 2013-05-07 Canon Anelva Corporation Oxidizing method and oxidizing apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5698820A (en) * 1980-01-09 1981-08-08 Nec Corp Preparation of amorphous semiconductor film

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5698820A (en) * 1980-01-09 1981-08-08 Nec Corp Preparation of amorphous semiconductor film

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2608634A1 (en) * 1986-12-23 1988-06-24 Sgs Microelettronica Spa Process and device for chemical deposition in plasma-activated vapour phase
US8435596B2 (en) 2007-02-09 2013-05-07 Canon Anelva Corporation Oxidizing method and oxidizing apparatus

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