JPS58197861A - Ceramic substrate and manufacture thereof - Google Patents

Abstract

PURPOSE:To contrive to reduce the maximum conduction resistance by a method wherein metallic wiring layers are provided (=side surface metallize) on the wall surface of a recess called a cavity and further connected to the second metallic wiring layer. CONSTITUTION:The electrode of a semiconductor element 1 and the first metallic wiring layers 2 are connected by Al wires, after the semiconductor element 1 is fixed on the metal surface (=island) 8 plated by Au at the bottom of the cavity 7 with the eutectic alloy of Au/Si. It is power source pins and earth pins that are restricted in the value of conduction resitance. The power source and the earth are surface-metallized on a semi-circular cutout 12 and connected to the second metallic wiring layers 5, resulting in the reduction of conduction resistance. The second metallic wiring layers are used only for the power source and the earth, and accordingly each can be formed wider than the wiring width of the first layers. Therefore, the wiring resistance of the power source and the earth can be reduced at least to less than 1/2, normally 1/4-1/5. After finishing in connection of all the wires, a sealing ring 9 is covered with a metallic cap and sealed by a seam welding method or Au/Sn alloying method.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to ceramic substrates and methods of manufacturing the same, and particularly relates to ceramic substrates used in semiconductor devices and methods of manufacturing the same.

Semiconductor devices in recent years, especially total)! The devices used in the machine are required to have high calculation speed, and along with this, the semiconductor #cf
11 has become highly integrated. but,
Higher integration of semiconductor devices means an increase in the number of input/output bins, and accordingly, the dimensions of ceramic substrates on which semiconductor elements are mounted have also become larger. The enlargement of the ceramic substrate also causes an increase in the conduction resistance between the semiconductor element and the external lead pins, and the potential shift caused by this has become a cause of malfunction in calculations.

In order to solve this problem, conventionally, as shown in Figure 1, two metal wiring layers were created using a null hole in the ceramic substrate.
Connected with holes and external lead pins, two-layer metal wiring
By connecting I in parallel, the conduction resistance is reduced.

That is, the electrode of the semiconductor element l provided in the cavity 7 and the
The metal wiring layer 2 of 1Il is made of aluminum (Al) or aluminum (
In addition to setting the current path to the external lead pin 4 by connecting with the wire 3 mainly composed of Au) t-, a metal wiring layer 5 is also provided in the second layer, and the first and second metal wiring layers are connected. We have attempted to reduce the conduction resistance by connecting the through holes 6 and parallelizing the current paths.

However, in this conventional method, the area where the wires of the lX1 metal wiring layer are connected (= bonding pad) is crowded and there is no space to open a through hole, so usually the bonding pad is Since the openings are made at the outer positions, the length of the two metal wiring layers in parallel is shortened, which has the disadvantage that the conduction resistance cannot be sufficiently reduced.

The invention was made in order to eliminate the above-mentioned drawbacks of the conventional technology, and by providing the entire wire wiring t@ on the wall surface of the recessed part called the cavity (=side surface metallization), the second metal wiring 4! i11w
By connecting it to I, the conduction resistance can be reduced to the maximum extent possible. In addition, the present invention provides a through hole in the ceramic Φ sheet before firing, and after filling the through hole with a liquid containing Kanasu particles dispersed, a portion of the through hole is cut. The aim is to achieve side metallization, and to obtain a ceramic substrate with side metallization by superposing this sheet with another ceramic sheet and firing it.

Non-invention will be explained in detail below. FIG. 2 shows a typical embodiment of the present invention in a perspective view. The assembly method is similar to the conventional one, in which the semiconductor element 1 is placed in the gold (Au) layer at the bottom of the cavity 7.
A u/S on the plated gold surface (= island) 8
The electrodes (not shown) of the semiconductor element 1 and the first cover layer 2 are bonded by the eutectic alloy of aluminum A.
Connect by l wire. In a semiconductor device, the value of conduction resistance is severely restricted in the power supply bin and the ground bin.

Therefore, in this example, the input/output wiring for No. 15 is formed only with m- as before, or the source and ground are formed by metalizing the sides in the half-circular notch MS12 as shown in the figure, and the second All wires are connected to #layer 5 and the conduction resistance is raised and lowered.

Since the second gold wiring layer is only for power supply and grounding, each layer can be made wider than one ring of wiring in the first layer.

Therefore, the wiring resistance for power supply and grounding must be reduced to at least 1/2 or less, typically N1/4 to 115, or it will become worn out.

After all the wires have been connected, the seal ring 9 is covered with a metal cap and sealed by Au/8n alloy method or the like in the seam weld method.

Next, a method of metallizing the side surface of the notch will be explained with reference to FIG.

Ceramic substrates with eleven or more metal wiring inside are
Normally, alumina At1Os is kneaded into an elastic sheet (=clean sheet) using a microparticle sonic binder, holes are punched and metal is arranged, and several green sheets are layered and fired. It is made by The metallization on the side surface of the notch of the present invention is first formed as follows: As shown in FIG. is formed using a screen printing method. The ink used for printing is usually a liquid in which fine particles of tungsten W are dispersed. Next, Ni
As shown in Figure 3(b), a through hole 11.1 with a diameter of approximately 200 μm
Open 1'. The above printing process and hole punching can be done even if the order is reversed. Furthermore, as shown in FIG. 3(c), through holes 11.
Ink is dropped onto the layer 11' and applied to the wall inside the track through hole by suction from the layer side. Next, as shown in FIG. 3(d), the hole that will later become a cavity is inserted into the through hole 11.11.
' When punched out including -S, the through holes 11, 11
' becomes a notch 12, and a metalized tongue is obtained there.Furthermore, other green seas) 101.
, IUb are overlapped as shown in Fig. 3 (e+), cut into a continuous layered shape, printed with ink on the 1111th surface of the outer periphery, and fired, resulting in an opening 12 as shown in Fig. 3 (f). Ceramic substrate with metallized side surfaces can be created. After this, nickel (Ni) plating is performed as usual, the external lead bottle and seal ring are soldered, and then nickel (Ni) and gold (Au) are applied.
Complete with plating.

Although we have explained the above using typical examples, the examples do not cover all wiring connections, the shape of ceramic substrates, the materials used, the assembly methods of semiconductor devices, etc.

For example, if some of the metal wiring is always connected at the same potential, such as for power supply or grounding, connect it through the notch 12'' through the ring-shaped second layer 5' as shown in the Ni4 diagram. - Potential differences due to differences in length and thickness of each wire arrangement are corrected, and a good semiconductor device can be obtained.

Further, although the shape of the notch is described as a half-hundred shape in the above example, it goes without saying that it can be made in a rectangular shape, a V shape, an inside shape, or any other arbitrary shape.

Furthermore, the form of ceramic substrates is not only dual in-line (DIP) but also plug-in (plug-in).
) type (also known as area array type), flat type, QIP (
Of course, the invention can be applied regardless of the shape, such as the Quadle-4nline Package type or the single inline type.

In addition, the ceramic materials used include not only alumina 11203 but also beryllia BeO and silicon carbide 8i.
It is also possible to use a material mainly composed of C or the like, and various external lead pins, seal rings, camps, and metal wiring materials can be used.

Furthermore, the assembly method is not the wire-punch-ink method as described above (the same effect can be obtained using the TAB method, but also the conduction resistance of the leads connected to the semiconductor element is small, so the overall The conduction resistance can be further reduced.

As described in detail above, according to the present invention, not only can the conduction resistance of the metal wiring of a ceramic substrate be significantly reduced, but also the ceramic substrate can be manufactured easily and with a high yield.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a conventional ceramic substrate, FIG. 2 is a perspective view showing an embodiment of the present invention, FIG. 3 is a sectional view showing a manufacturing method of the present invention, and FIG. It is a perspective view showing an example. In the figure, 1...semiconductor element, 2...metal wiring layer, 3...wire, 5...all wire wiring layers of drop 2,
8...Island, 10...Green...
Sea), 11.11'... Through hole, 12...
This is the notch part. 3rd item Figure 4

Claims (2)

[Claims] (1) In a ceramic substrate having a recess and a metal wiring layer provided around the recess, a part of the metal wiring layer extends on the surface of the recess 011, and the metal wiring is on a surface different from the metal wiring surface. A ceramic substrate characterized in that it is connected to layers. (2) After making a through hole in the ceramic sheet before firing and pouring a liquid in which metal particles are dispersed into the through hole,
A method for manufacturing a ceramic substrate, in which a part of the through hole is cut, another ceramic sheet is laminated and fired.