JPS58193818U - Earth fault directional relay - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a conventional phase discrimination circuit.
2, 3, and 4 are explanatory diagrams of the operation of the phase discrimination circuit shown in FIG. 1, FIG. 5 is a block diagram showing one embodiment of the phase discrimination circuit according to this invention, and FIG. FIG. 7 is a block diagram showing another embodiment of the phase discrimination circuit according to the present invention, and FIG. 8 is a diagram explaining the operation of the phase discrimination circuit shown in FIG. 3.4 is a rectangular wave shaping circuit, 6.8 is a timer circuit whose operating time is T, T2 is a timer circuit whose recovery time is zero, 15 is a low frequency detection circuit, 16 is a NOR circuit, vA, VB are input AC electricity The quantity, vo, is the final output. Note that the same reference numerals in each figure indicate the same or corresponding parts. Figure 2-Figure 3

Claims (1)

[Scope of utility model registration request] a first timer circuit that outputs an output when the first and second amounts of alternating current electricity have the same polarity and continue for a predetermined time period; a second timer circuit that outputs an output when the above signal continues for a predetermined time period; a third timer circuit that outputs an inverted signal of the above signal that continues for a predetermined time period; a first logic circuit that takes an OR; a fourth timer circuit that receives the output signal of the first logic circuit and has a predetermined recovery time; and a fourth timer circuit that receives the output signal of the first timer circuit; and a second logic circuit which is inhibited by the output of the circuit.