JPS58179546U - information processing equipment - Google Patents
information processing equipmentInfo
- Publication number
- JPS58179546U JPS58179546U JP7575982U JP7575982U JPS58179546U JP S58179546 U JPS58179546 U JP S58179546U JP 7575982 U JP7575982 U JP 7575982U JP 7575982 U JP7575982 U JP 7575982U JP S58179546 U JPS58179546 U JP S58179546U
- Authority
- JP
- Japan
- Prior art keywords
- output
- timing signal
- logic operation
- information processing
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Hardware Redundancy (AREA)
- Retry When Errors Occur (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案情報処理装置実施例の構成図、第2図は
プログラム実行順序を示すタイムチャートを示す図であ
る。
1・・・非対称誤りデータ出力部、2・・・タイミング
信号出力部、3・・・1系演算処理部、4・・・2系演
算 “処理部、5・・・相補反転判断部、RA、
RB・・−人力1ノ。
レー、t3・・・1系に与える交番形タイミング信号、
t4・・・2系に与える交番形タイミング信号、A・・
・正論理演算プログラム、”A・・・負論理演算プログ
ラム、P3・・・1系の論理演算部の実行プログラム、
P4・・・2系の論理演算プログラムである。FIG. 1 is a block diagram of an embodiment of the information processing apparatus of the present invention, and FIG. 2 is a time chart showing the program execution order. DESCRIPTION OF SYMBOLS 1... Asymmetrical error data output unit, 2... Timing signal output unit, 3... 1st system arithmetic processing unit, 4... 2nd system arithmetic processing unit, 5... Complementary inversion determination unit, RA ,
RB... - Human power 1no. ray, t3...an alternating timing signal given to the 1 system,
t4... Alternating timing signal given to the 2nd system, A...
・Positive logic operation program, "A...Negative logic operation program, P3...1 system logic operation unit execution program,"
P4...2 type logical operation program.
Claims (1)
して出力信号を出力する情報処理装置において、所定の
リレー接点を介した2系列に出力する非対称誤りデータ
出力部と、タイミング信号を出力するタイミング信号出
力部と、正論理演算プログラムと負論理演算プログラム
を有し前記非対称誤りデータ出力部からの入力にもとづ
いて前記タイミング信号の出力に従って正論理演算およ
び負論理演算を交互に実行し交番矩形波を出力する1系
の演算処理部と、正論理演算プログラムと負論理演算プ
ログ2ムを有し前記非対称誤りデータ出力部からの入力
にもとづいて前記タイミング信号出力部から出力される
タイミング信号が前記1系に入力されるタイミング信号
と180°位相の反転したタイミング信号として入力さ
れるタイミング信号に従って正論理演算および負論理演
算を実行し前記1系と180°位相の反転した交番矩形
波を出力する2系の演算処理部と、前記1系および2系
からの交番人力にもと、づいて所定の演算出力がありと
判断して出力し1系および2系からの入力が相補反転入
力でないときには所定の演算出力なしと判断する相補反
転判断部とからなる情報処理装置。In an information processing device that performs arithmetic processing on input signals input through a plurality of relay contacts and outputs an output signal, an asymmetric error data output unit that outputs two series through predetermined relay contacts and a timing signal are output. It has a timing signal output section, a positive logic operation program, and a negative logic operation program, and based on the input from the asymmetric error data output section, performs the positive logic operation and the negative logic operation alternately in accordance with the output of the timing signal. The timing signal is output from the timing signal output section based on the input from the asymmetric error data output section. A positive logic operation and a negative logic operation are performed according to a timing signal inputted as a timing signal whose phase is inverted by 180 degrees from the timing signal inputted to the first system, and an alternating rectangular wave whose phase is inverted by 180 degrees from that of said first system is output. Based on the arithmetic processing unit of the 2nd system and the alternating human power from the 1st and 2nd systems, it is determined that there is a predetermined calculation output and output, and the inputs from the 1st and 2nd systems are not complementary inversion inputs. An information processing device comprising a complementary inversion determining section that sometimes determines that a predetermined calculation output is not present.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7575982U JPS58179546U (en) | 1982-05-25 | 1982-05-25 | information processing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7575982U JPS58179546U (en) | 1982-05-25 | 1982-05-25 | information processing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58179546U true JPS58179546U (en) | 1983-12-01 |
JPS6220025Y2 JPS6220025Y2 (en) | 1987-05-22 |
Family
ID=30085103
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7575982U Granted JPS58179546U (en) | 1982-05-25 | 1982-05-25 | information processing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58179546U (en) |
-
1982
- 1982-05-25 JP JP7575982U patent/JPS58179546U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6220025Y2 (en) | 1987-05-22 |
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