JPS5818981A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an infrared light emitting diode having a long life and high reliability by a method wherein the II group element to be made as P type impurities is diffused in high concentration in the P type region of a compound semiconductor crystal provided with a P-N junction, and the heat treatment is performed in an atmosphere not containing the II group element to promote rearrangement of the introduced II group element to the position of crystal lattice. CONSTITUTION:An N type GaAs layer 7 and a P type GaAs layer 8 are made to grow liquid phase epitaxially in succession on an N type GaAs substrate 6, and moreover additional diffusion is performed to the layer 8 using Zn to form the P<+> type region 9. After then, the heat treatment is performed at 600 deg.C for 15-24hr in the atmosphere having no existence of a diffusion source consisting of Zn or a compound containing Zn to promote rearrangement of diffused Zn to the position of crystal lattice. Accordingly influence of thermal distortion, etc., remaining inside of the crstal can be removed, and the P-N junction having the stable characteristic can be enabled to obtain.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a highly reliable semiconductor device.

Gallium arsenide (GaAa'), gallium phosphide (GaP)
IV group compound semiconductors such as 1-V compound semiconductors are currently widely used as materials for light-emitting devices such as light-emitting diodes and lasers. In these light emitting devices, a structure in which a pn junction is formed is used in order to obtain good ohmic contact.

To form this p+ layer, a compound containing a group Ⅰ element or a group 1 element is used as a diffusion source, and a method of diffusion from a gas phase is generally adopted. FIG. 1 is a diagram schematically showing this method.
-■For example, a GaAs substrate 3t as a compound semiconductor substrate-
1. On the other hand, as a diffusion source 4, for example, a quartz ampoule 6 containing a group III zinc compound zinc arsenide (znA112) is arranged,
A method of applying heat treatment is used.

FIG. 2 is a diagram showing a typical structure of a light emitting device, such as a light emitting diode, manufactured by the p+ diffusion method shown in FIG.
In the figure, 6 is an n-type GaM 8 substrate, 7 is an n-type 0&M S epitaxial region, 8 is a p-type G&M S epitaxial region, 9
are p+ regions 10 and 11 formed by Zn diffusion.
is an electrode that makes ohmic contact with the n-type Ga 8 substrate 6 and the p + region 9 .

By the way, light emitting dies 3 and 8- represented by the structure shown in Figure 1
It is widely known that when a forward current is passed through a geode for a certain period of time, the output of one light emission decreases compared to the initial value, resulting in deterioration of the output. The reason for this is that the diffusion coefficient of zinc (Zn) ions located at interstitial positions in the p region is large, and when a forward voltage is applied, zinc ions diffuse into the space charge layer like holes, resulting in non-radiative recombination. It is said to be used to create a center.

The present invention provides a method for significantly improving such performance deterioration such as output deterioration, after diffusing impurities, particularly group (I) element impurities, by a vapor phase method.

It is characterized by heat treatment at a temperature lower than the diffusion temperature. The present invention will be described in detail below with reference to Examples.

Here, we will discuss the case where zinc is diffused into an infrared light emitting diode using all Ga-8 materials, but other X-
V compounds such as GaP, GaAIP.

Similar effects can be expected from InGamusP, etc.

It can also be applied to cases in which Hg, Cd, etc. are used in addition to Zn as group (2) elements.

FIG. 3 shows a method of manufacturing an infrared light emitting diode. The n-Ga58 substrate 6 used in the experiment was S
It is an i-doped (approximately 1018 cIL-3) (100) n-type mirror slice.

For n-type and p-type impurities, monoampholytic impurity Sii is used,
A pn junction was formed by a continuous process/pitaxial method according to the program diagram shown in FIG. n Growth start temperature (Tn!
! 3 is 926℃, n growth stop temperature (Tne) is 886℃
and the cooling rate 0n=1. n-G at es℃/min
aAs epitaxial region 7'ft: grown. The p epitaxial growth has a growth start temperature (TpS) of 885°C, a growth stop temperature (TpS) of 780°C, and a cooling rate of Op.
= Cooled at 0.3℃/win,...p-GILA! !
Epitaxial region 8 was formed.

The thickness of the epitaxial region obtained by the above growth method is approximately 60 to 60 μm for the n region and approximately 70 to 80 μm for the p region.
It is. The p carrier concentration in the vicinity of the surface of the p region after the evipitational growth is approximately 6 to 8 x 10"(m"-
It is 3.

Therefore, in order to obtain good ohmic contact.

'C, 40 minutes, and Znh82 was used as the diffusion source.

The formed p+ region 9 has a thickness of 1 μs and a Zn concentration of about 1Q.
20 (1'#l' high concentration layer).

Next, heat treatment, which is a feature of the present invention, was performed on the GaAB substrate after the ftp+ region was formed. The heat treatment conditions are 600° C. for 16 to 24 hours using the quartz sealed tube method.

As a result, as shown in Table 1, compared to the above-mentioned after diffusion,
The surface Zn concentration decreased by about one order of magnitude, and the diffusion length changed to about 1.2 μm. Table 1 shows the results after p+ diffusion and heat treatment.
This is a comparison of surface Zn concentration, diffusion length, and V/I. Also p
The +region V/I is also increasing.

Chapter 1 Table When subjected to treatment, redistribution of Zn atoms at a high concentration occurs.

It is thought that the number of interstitial Zn atoms, which have the above-mentioned adverse effect, is reduced. Here, the reason why a diffusion source is not introduced during the heat treatment is to prevent Znn atoms located at interstitial positions from being newly added, as explained above. After performing such heat treatment, the entire n-side electrode 10 is used as the p-side electrode 11.
Gold-germanium alloy (MU/G6)'i was used as
An infrared light emitting diode as shown in FIG. 2 was produced by performing alloying treatment at 480° C. for 10 minutes in a forming gas.

Table 2 shows the fcG produced using the conventional method and the method of the present invention.
! 100 hours of LAS infrared light emitting diode.

Value of light emission output after forward current application at 200 hours, 300 hours, 600 hours, and 1000 hours Δpot initial value = 1
It is expressed as 00%.

This is Table 2 on page 7. The table also shows a comparison of measurement results for conventional infrared light emitting diodes that have not been subjected to heat treatment.Δ
The larger the pO value, the less the luminescence output decreased after energization for a certain period of time. As is clear from Table 2, the light emitting diode manufactured by the manufacturing method of the present invention has a forward current Xy of 100IL,
It can be seen that even after 1000 hours of forward energization, the light emission output is only 96% of the initial value, and the output deterioration is extremely small.

18MS8-18981 (8) On the other hand, for an infrared light emitting diode manufactured by the conventional manufacturing method, the light emission output after 1000 hours decreased to 68% of the initial value by applying a completely similar forward current. It can be seen that a very large output deterioration has occurred.

In this way, when heat treatment, which is a feature of the present invention, is performed when manufacturing a light-emitting semiconductor device, the heat treatment redistributes the zinc atoms that have been diffused at high temperatures in the gas phase, resulting in the formation of interstitial structures that cause output deterioration. It is estimated from the above results that the effect of reducing the number of zinc atoms in the position and mitigating the effects of thermal strain remaining inside the crystal during the rapid supercooling process immediately after diffusion is achieved. It is thought that the effect of significantly improving output deterioration is brought about by these factors.

From what has been explained above, it is clear that by adopting the manufacturing method of the present invention, a long life can be achieved.

High performance semiconductor devices such as infrared light emitting diodes with high reliability can be manufactured, and their industrial value is great.

9 vanes

[Brief explanation of the drawing]

Figure 1 is a diagram for explaining the method of diffusing Zn into G&M S using the quartz sealed tube method, Figure 2 is a cross-sectional view of a light emitting diode,
FIGS. 3(b) and 3(b) are schematic diagrams of the manufacturing process of infrared light emitting diodes according to a conventional method and an embodiment of the present invention, respectively, and FIG. 4 is a diagram showing a temperature diagram of liquid phase epitaxial growth. 1...Catalyzer, 2...Quartz tube, 3...
...G&MUS substrate, 4...ZnAg2 diffusion source, 6...quartz ampoule. 6...n-type G&MUS substrate, 7...-n-type GaAsg epitaxial region, 8...p-type G
aAs epitaxial region, 9...Zn f diffused p+ region 10-n side ohmic electrode, 11...
...p-side ohmic electrode. Name of agent: Patent attorney Toshio Nakao and one other person @i
ll @2 Figure f

Claims (1)

[Claims] In the p-type head region of the compound semiconductor crystal that has formed the p-n junction, p
A first step of diffusing and introducing a group I element, which will become a type impurity, at a high concentration, and heat treatment in an atmosphere that does not have a diffusion source for the group I element or a compound containing the group I element. A method for manufacturing a semiconductor device, comprising: a second step of promoting rearrangement of the components into crystal lattice positions.