JPS5818951A - 半導体チツプ装着用基板 - Google Patents

半導体チツプ装着用基板

Info

Publication number
JPS5818951A
JPS5818951A JP57084091A JP8409182A JPS5818951A JP S5818951 A JPS5818951 A JP S5818951A JP 57084091 A JP57084091 A JP 57084091A JP 8409182 A JP8409182 A JP 8409182A JP S5818951 A JPS5818951 A JP S5818951A
Authority
JP
Japan
Prior art keywords
conductor
pattern
conductors
substrate
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57084091A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62583B2 (OSRAM
Inventor
ウイリアム・エドウイン・ダウテイ・ジユニア
スチユア−ト・ユ−ジン・グリア
ウイリアム・ジヨン・ネスト−ク
ウイリアム・テイルデン・ノリス
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5818951A publication Critical patent/JPS5818951A/ja
Publication of JPS62583B2 publication Critical patent/JPS62583B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W70/611—
    • H10W90/401—
    • H10W90/724—

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
JP57084091A 1981-07-22 1982-05-20 半導体チツプ装着用基板 Granted JPS5818951A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US28572581A 1981-07-22 1981-07-22
US285725 1981-07-22

Publications (2)

Publication Number Publication Date
JPS5818951A true JPS5818951A (ja) 1983-02-03
JPS62583B2 JPS62583B2 (OSRAM) 1987-01-08

Family

ID=23095459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57084091A Granted JPS5818951A (ja) 1981-07-22 1982-05-20 半導体チツプ装着用基板

Country Status (4)

Country Link
EP (1) EP0070533B1 (OSRAM)
JP (1) JPS5818951A (OSRAM)
CA (1) CA1182582A (OSRAM)
DE (1) DE3277890D1 (OSRAM)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4674007A (en) * 1985-06-07 1987-06-16 Microscience Corporation Method and apparatus for facilitating production of electronic circuit boards
JPS63245952A (ja) * 1987-04-01 1988-10-13 Hitachi Ltd マルチチップモジュ−ル構造体

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3370203A (en) * 1965-07-19 1968-02-20 United Aircraft Corp Integrated circuit modules
FR1540051A (fr) * 1966-09-21 1968-09-20 Rca Corp Microcircuit et son procédé de fabrication
EP0006444B1 (de) * 1978-06-23 1982-12-22 International Business Machines Corporation Vielschichtiges, dielektrisches Substrat
JPS5612760A (en) * 1979-07-10 1981-02-07 Nec Corp Multi chip lsi package

Also Published As

Publication number Publication date
CA1182582A (en) 1985-02-12
JPS62583B2 (OSRAM) 1987-01-08
DE3277890D1 (en) 1988-02-04
EP0070533B1 (de) 1987-12-23
EP0070533A2 (de) 1983-01-26
EP0070533A3 (en) 1985-01-30

Similar Documents

Publication Publication Date Title
US4602271A (en) Personalizable masterslice substrate for semiconductor chips
US11063017B2 (en) Embedded organic interposer for high bandwidth
US6462408B1 (en) Contact member stacking system and method
US6034438A (en) L-connect routing of die surface pads to the die edge for stacking in a 3D array
DE19758197C2 (de) Stapelanordnung für zwei Halbleiterspeicherchips und Leiterplatte, die mit einer Vielzahl derartiger Stapelanordnungen bestückt ist
EP1264347B1 (en) Electronic module having a three dimensional array of carrier-mounted integrated circuit packages
EP1327265B1 (en) Electronic module having canopy-type carriers
US4907128A (en) Chip to multilevel circuit board bonding
US5847448A (en) Method and device for interconnecting integrated circuits in three dimensions
US5016085A (en) Hermetic package for integrated circuit chips
US20020089831A1 (en) Module with one side stacked memory
US4237522A (en) Chip package with high capacitance, stacked vlsi/power sheets extending through slots in substrate
US5885850A (en) Method for the 3D interconnection of packages of electronic components, and device obtained by this method
EP0236493A1 (en) Microelectronic package.
US4016463A (en) High density multilayer printed circuit card assembly and method
KR100575041B1 (ko) 신호라우팅 디바이스에서 층수를 줄이는 기술
JPS6115395A (ja) 半導体チツプ用モジユ−ル
JPS5818951A (ja) 半導体チツプ装着用基板
US5790386A (en) High I/O density MLC flat pack electronic component
US6467163B1 (en) Universal component mounting structure for surface mountable electronic devices
JPS59136963A (ja) 記憶装置の多層実装構造
US6404662B1 (en) Rambus stakpak
JP4658529B2 (ja) 集積回路モジュールの構造
US6618257B1 (en) Wide data path stacking system and method
JP2924583B2 (ja) 素子分離型複合マイクロ波回路モジュール