JPS58188140A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS58188140A
JPS58188140A JP7199182A JP7199182A JPS58188140A JP S58188140 A JPS58188140 A JP S58188140A JP 7199182 A JP7199182 A JP 7199182A JP 7199182 A JP7199182 A JP 7199182A JP S58188140 A JPS58188140 A JP S58188140A
Authority
JP
Japan
Prior art keywords
resist
hole
film
mask
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7199182A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Hirano
平野 芳行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7199182A priority Critical patent/JPS58188140A/en
Publication of JPS58188140A publication Critical patent/JPS58188140A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a steplike electrode hole by a method wherein a resist film is selectively left on a hole partly removing an oxide film adjoining the resist only by HF plasma to etch any residual resist in the longitudinal and lateral directions. CONSTITUTION:An SiO2 film 12 is formed into a hole on n layer 13 on p type Si substrate 11 to be covered with another SiO2 film 14 further forming a rubber base resist mask 15 in the hole. After selectively etching the film 14 by means of activating HF heated in a furnace, HF is removed to etch the mask 15 isotropically by O2 plasma down to the contracted shape 15' of said mask 15. HF is again introduced to etch the film 14 and then HF is discharged to contract the mask 15' isotropically by O2 plasma repeatedly until Si surface comes into direct contact with the mask 15'. Consequently the hole becomes steplike and the reaction is stopped as soon as Si comes into direct contact with the resist. In this constitution, the dimensional difference in the lateral direction of the resist mask before and after etching may be decided by the size of hole at upper and lower edge of the connecting hole regardless of the adherence of the resist forming a steplike hole with excellent reproducibility.

Description

【発明の詳細な説明】 本発明は、コンタクト開孔部の段差の形状を改善し、コ
ンタクト開孔部での金属配線の断線を防ぐ半導体装置の
製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device that improves the shape of a step in a contact opening and prevents disconnection of metal wiring at the contact opening.

従来の半導体装置の製造方法として、第1図に示す多結
晶/リコンゲートMO8)う/ジスタに関し、説明する
As a conventional method for manufacturing a semiconductor device, a polycrystalline/reconverter MO/MOS transistor shown in FIG. 1 will be explained.

年11Ft型基体1上にフィールド酸化膜2を形成した
後、その酸化膜2を選択除去する。ゲート酸化M3.多
結晶シリコン層4を形成する。多結晶シリコ/層はケー
ト電極及び配線となる領域のみ選択的に残し、ンース・
ドレイン拡散層5a、5bを自己整合法で形成する。全
面に気相成長法で、酸化膜もしくはり/ガラス(PSG
)膜などOIl!縁膜6を成長し、コ/タクト窓7a、
7bを開孔するが、この開孔部の絶縁膜6の段差が大き
い場合、コンタクト窓の急峻な段差のために、金属配線
8Ω断線が起こる場合があった。これ全改善する方法と
して、第2図に示すように、コンタクト開孔部の絶縁膜
6の段差9m、9bになだらかな傾斜をつけて、金属配
線100段差でのMlりrよくし、断ii防止していた
。この傾斜をつける方法としては、二/タクト開孔用の
感光性被膜(以下、フォトレジストと言う)と下地の絶
縁膜の密着性を故意に悪くする方法−例えば、絶縁膜6
の表面に化学的もしくは物理的な処理を行なう方法−も
しくけエツチング速変の大きいり/ガラス層を薄く表面
に形成する方法などがある。このような方法で、酸化膜
エツチングでのサイドエッチ量を大急くして、9a、9
bのようにコンタクト部の段差に傾斜をつけていた。し
かし、このような方法では。
After forming a field oxide film 2 on the 11Ft type substrate 1, the oxide film 2 is selectively removed. Gate oxidation M3. A polycrystalline silicon layer 4 is formed. The polycrystalline silicon/layer selectively leaves only the areas that will become the gate electrodes and wiring, and
Drain diffusion layers 5a and 5b are formed by a self-alignment method. An oxide film or glue/glass (PSG) is applied to the entire surface using a vapor phase growth method.
) Membrane etc.OIl! Grow the membrane 6 and open the co/tact window 7a,
7b is opened, but if the step of the insulating film 6 at this opening is large, the metal wiring 8Ω disconnection may occur due to the steep step of the contact window. As a way to completely improve this, as shown in FIG. It was being prevented. This slope can be created by intentionally reducing the adhesion between the photosensitive film for tact opening (hereinafter referred to as photoresist) and the underlying insulating film.
There is a method of chemically or physically treating the surface of the substrate, which results in a large change in etching speed, and a method of forming a thin glass layer on the surface. By using this method, the amount of side etching during oxide film etching is greatly increased, and 9a, 9
As shown in b, the step of the contact part was sloped. But in such a way.

サイドエッチ量が大きくなりゃすく%また。密着性にバ
ラツキが生じて、サイドエッチ量が一定しない場合があ
った。このために1パターンのサイズの制御を必要とす
るICの製造方法で使用する場合、コンタクト窓周辺の
設計に十分な余裕をもたないと、金属配線の断線は防げ
るがコンタクト穴が広がり、ンース・ドレイン電極とゲ
ート電極が短絡する場合があり歩留りの安定性に問題を
残す恐れがあった。
The amount of side etch becomes larger. There were cases in which the amount of side etching was not constant due to variations in adhesion. For this reason, when used in an IC manufacturing method that requires control of the size of one pattern, if there is not enough margin in the design around the contact window, disconnection of the metal wiring can be prevented, but the contact hole will expand and the contact hole will become larger. - There was a possibility that the drain electrode and gate electrode would be short-circuited, resulting in problems with yield stability.

本発明は前記の欠点をなくシ、かつ、サイドエッチ量を
制御できるコンタクトのエツチング方法を提供するもの
である。
The present invention provides a contact etching method that eliminates the above-mentioned drawbacks and can control the amount of side etching.

本発明の特徴は、基板上に絶縁膜を形成し、この絶縁膜
に開孔を設ける半導体装置の製造方法において、絶縁膜
上に選択的に7オトレジスト膜を設ける工程と、しかる
後にこのフォトレジスト膜が設けられた部分の絶縁膜の
主表面をエツチングする工程と、このフォトレジスト膜
が設けられていない部分の絶縁膜の主表面および側面を
エツチングする工程と?含む半導体装置の製造方法にあ
る0 例えは、第1導電型半導体基体の表面の一部に第2導袖
型拡散層を形成し、前記拡散層上を酸化シリコン膜で被
膜した後に、@1拡散層と金属配縁1−とを接続するコ
ンタクト開孔部を前記開孔部の形成される佃域上に残し
た感光性被膜の下だけ弗化水素ガスプラズマによる反応
で、酸化シリコ/腰を除去する方法により形成する半導
体装置の製造方法において、弗化水素ガスプラズマによ
り感光性被膜の下の酸化クリコノ膜厚の一部を除去する
第一の処理と酸素プラズマ會利用して、該感光性被膜の
膜厚の一部を上底面と側面から同時に。
A feature of the present invention is a method for manufacturing a semiconductor device in which an insulating film is formed on a substrate and a hole is formed in the insulating film. A process of etching the main surface of the insulating film where the photoresist film is provided, and a process of etching the main surface and side surfaces of the insulating film where the photoresist film is not provided. For example, after forming a second conductive sleeve type diffusion layer on a part of the surface of the first conductivity type semiconductor substrate and coating the diffusion layer with a silicon oxide film, @1 A contact opening connecting the diffusion layer and the metal interconnection layer 1- is formed by a reaction using hydrogen fluoride gas plasma under the photosensitive coating, which is left on the area where the opening is formed. In the method of manufacturing a semiconductor device formed by a method of removing a photosensitive film, a first process of removing a part of the thickness of the oxidized film under the photosensitive film using hydrogen fluoride gas plasma and an oxygen plasma treatment are performed to remove the photosensitive film. Part of the thickness of the sex capsule from the top and side surfaces at the same time.

同じ膜厚で除去する第二の処理を交互に複数回繰り返し
て、コンタクト窓を開孔する工程を含む半導体装置の製
造方法である。
This method of manufacturing a semiconductor device includes a step of forming a contact window by alternately repeating a second process of removing the same film thickness a plurality of times.

この方法は、エツチングされるコンタクト窓の領域に7
オトレジストを選択露光により残す工程と、いわゆる反
転エツチング現象によりフォトレジストと接した酸化膜
のみを弗化水嵩ガスプラズマを用いて酸化膜厚の一部だ
け除去する工程と、コンタクト開孔部に残留したフォト
レジストを酸素プラズマ処理でたて方向、横方向共レジ
スト膜厚の一部膜厚同一膜厚減少させる工程を同一反応
炉内で機数回繰り返して行なうことで、エツチングされ
た部分の断面が階段状の形状を有するコンタクト開孔部
を形成させるものである。
This method requires seven etchings in the area of the contact window to be etched.
There is a process in which the photoresist is left behind by selective exposure, a process in which only a portion of the oxide film thickness is removed by using fluoride water bulk gas plasma from the oxide film in contact with the photoresist by a so-called reverse etching phenomenon, and a process in which the oxide film remaining in the contact opening is removed. By repeating the process of reducing part of the resist film thickness by the same thickness both vertically and horizontally by oxygen plasma treatment in the same reactor several times, the cross section of the etched portion is A contact opening having a stepped shape is formed.

本発明による半導体装置の製造方法を拡散層に対する金
属配線層とのコンタクト窓の形成に適用した実施例を示
す。第3図(11〜(e) K従って説明するO 第3図(al :最初に、第1導電型基板ll上に酸化
膜12を形成し、拡散層を形成する領域上を選択除去し
て、第2導電型拡散層13を形成する。
An example will be described in which the method for manufacturing a semiconductor device according to the present invention is applied to the formation of a contact window between a diffusion layer and a metal wiring layer. FIG. 3 (11 to (e)) K Therefore, explanation will be given. FIG. 3 (al: First, an oxide film 12 is formed on the first conductivity type substrate ll, and a region where a diffusion layer is to be formed is selectively removed. , a second conductivity type diffusion layer 13 is formed.

その後、基板11全面に、酸化@(不純物を含むす/ガ
ラス膜も含む)14を気相成長法により形成する。次に
ゴム系の7オトレジストを前記酸化膜14上に形成する
。その勝゛厚は後の工程の処理で減少する膜厚よりも厚
く塗布する必要がある。
Thereafter, an oxide layer 14 (including a glass film containing impurities) is formed on the entire surface of the substrate 11 by vapor phase growth. Next, a rubber-based photoresist is formed on the oxide film 14. The resulting thickness must be thicker than the film thickness that will be reduced in subsequent steps.

その後にコンタクト窓の位置決めの工程を行ない、コン
タクト窓開孔部にゴム系フォトレジスト15を残す。
Thereafter, a step of positioning the contact window is performed, leaving a rubber photoresist 15 in the contact window opening.

! 31kl(bl :次にウェハーを反応炉内に入れ
て、弗化水素ガスを導入し、加熱しつつ作用させるとゴ
ム系フォトレンス)15で級われた酸化m14のみエツ
チングが進行する。また、ノホラック系ポジレジストl
用いた場合には、エツチングはほとんど進行しない。
! Next, the wafer is placed in a reactor, hydrogen fluoride gas is introduced, and when the wafer is heated and allowed to act on the wafer, only the oxidized m14 graded with rubber photolens 15 is etched. In addition, noholac type positive resist l
When used, etching hardly progresses.

この差は、ゴム系レジストが疎水性であり、ノボラック
系が親水性であることによると考えられる。
This difference is thought to be due to the fact that the rubber resist is hydrophobic and the novolac resist is hydrophilic.

弗化水素ガスは表面にH2Oが付着していない酸化膜に
対し反応性がないが、これがH2Oと反応しH+F−イ
オンが生じる。S r 02の表面は吸潜水と反応して
一部かンラノール8i(OH)2となっているが、弗化
水素ガスはこれと反応してH2Oを生じる。ゴム系レジ
スト下でin、oが保持されて、エツチングの進行に従
ってH,0が増加し、F−イオ/の生成量が大きくなり
、エツチングを進行させるが、ノボ2ツク系レジストは
H,0を通すから、生成したH2Oがレジスト表面に移
動して失なわれ、F−イオンはほとんど生ぜず、エツチ
ングされない。
Hydrogen fluoride gas has no reactivity with an oxide film on which no H2O is attached, but it reacts with H2O to generate H+F- ions. The surface of S r 02 reacts with absorbed water and partially becomes kanranol 8i (OH) 2 , but hydrogen fluoride gas reacts with this to generate H 2 O. Under the rubber-based resist, in,o is maintained, H,0 increases as etching progresses, and the amount of F-io/ produced increases, allowing etching to proceed, but in the novo2c-based resist, H,0 increases. Since it passes through, the generated H2O moves to the resist surface and is lost, and almost no F- ions are generated and are not etched.

このような1反転エツチングの現象を利用してフォトレ
ジスト15下の酸化膜14の厚さの一部を除去する。
A portion of the thickness of the oxide film 14 below the photoresist 15 is removed by utilizing the phenomenon of one-inversion etching.

第3図(C):次に反応炉内のHFガスを排気し酸素を
導入し酸素プラズマにより、フォトレジスト15を表面
から膜厚の一部の厚さだけ等方的に減少させる。このと
きsフォトレジスト15は横方向にも除去されるので、
コンタクト上の7.)レジスト15の大きさは小さくな
る(15す。
FIG. 3(C): Next, the HF gas in the reactor is exhausted, oxygen is introduced, and the photoresist 15 is isotropically reduced from the surface by a portion of the film thickness using oxygen plasma. At this time, the s-photoresist 15 is also removed in the lateral direction, so
7. on the contact. ) The size of the resist 15 becomes smaller (15).

第3図(d):次に再ひ弗化水素ガスを導入し、加熱し
て前回の酸素プラズマ処理で小さくなったフォトレジス
ト15′下の酸化膜のみエツチング進行させる。次に、
再び酸素を導入してフォトレジスト15′を等方的に除
去する。このような工程を。
FIG. 3(d): Next, hydrogen fluoride gas is introduced again and heated to proceed with etching only the oxide film under the photoresist 15' which has become smaller due to the previous oxygen plasma treatment. next,
Oxygen is introduced again to remove the photoresist 15' isotropically. A process like this.

コンタクト部のシリコン表面が、フォトレジストに直接
接するまで複数回繰り返して行なう。この結果、コンタ
クト開孔部の断面図は階段状となる。
This process is repeated several times until the silicon surface of the contact portion is in direct contact with the photoresist. As a result, the cross-sectional view of the contact opening becomes step-like.

酸化膜が完全にエツチングされて、シリコンがレジスト
に直接接した状態となるとシリコン−レジスト界面での
反応が止まる。これは、レジストが緩衝材の働きをして
、Siと弗化水素の反応を止めるためと考えられる。
When the oxide film is completely etched and the silicon is in direct contact with the resist, the reaction at the silicon-resist interface stops. This is thought to be because the resist acts as a buffer material to stop the reaction between Si and hydrogen fluoride.

次に洩っているフォトレジスト15を除去し。Next, remove the leaking photoresist 15.

金蝿配?INを形成して、第3図(e)となる。Golden fly? After forming IN, the result is shown in FIG. 3(e).

本発明の製造方法でコンタクトの形状を形成した場合、
コンタクトの径の大きさはコンタクト17の上端の大き
さはフォトレジスト15の現像後の大きさで決まり、コ
ンタクト17の下端の大きさはtIk後に残っているフ
ォトレジストの径の大きさで決まる。
When the shape of the contact is formed by the manufacturing method of the present invention,
The size of the diameter of the contact 17 is determined by the size of the upper end of the contact 17 after development of the photoresist 15, and the size of the lower end of the contact 17 is determined by the size of the diameter of the photoresist remaining after tIk.

このように、フォトレジストのエッチフグー始時点及び
終了時点の形状の差つまりフォトレジストの膜厚の減少
量、すなわち横方向の径の大きさの点でコンタクトの上
端・下端の大きさが決まる。
In this way, the size of the upper and lower ends of the contact is determined by the difference in shape between the beginning and end of the photoresist etch, that is, the amount of reduction in the film thickness of the photoresist, that is, the size of the lateral diameter.

このために酸化11114と7オトレジスト15の密着
性に左右されることなく、コンタクトの断面形状が決ま
り、再現性がない。
For this reason, the cross-sectional shape of the contact is determined regardless of the adhesion between the oxide 11114 and the 7-photoresist 15, and there is no reproducibility.

また、フォトレジストと接した酸化膜のみがその界面で
エツチングが進行するため、レジストの大きさでエツチ
ングされる領域が決まり、サイドエッチがない。
Furthermore, since etching progresses only at the interface of the oxide film in contact with the photoresist, the area to be etched is determined by the size of the resist, and there is no side etching.

更に、この形状は酸化膜が、す/を高い濃度で含有する
酸化膜であればコンタクト開孔後の1000℃位の短か
い熱処理でも階段状の断面形状が溶隔軟化し、第4図の
ように階段状のコンタクトの形状を傾斜のついた形にす
ることも可能である。
Furthermore, if the oxide film contains a high concentration of sulphur, the step-like cross-sectional shape will soften even with a short heat treatment of about 1000°C after the contact hole is formed, as shown in Fig. 4. It is also possible to make the stepped contact shape sloped.

本発明によれば、(1)シリコ/酸化膜表面のコンタク
ト径の大きさはレジスト現gII後のレジストの大きさ
で決められる。(2)コンタクト部の段差會断線が起こ
らない階段形状に分けて、金属配IIII!18のステ
ツノカバレッジが良い、(3)形状の再現性が良い、な
どの%像がある。
According to the present invention, (1) the size of the contact diameter on the silicon/oxide film surface is determined by the size of the resist after resist development gII. (2) Divide the metal wiring into a staircase shape that prevents disconnection from occurring due to step differences in the contact area. There are percentages such as (18) good stem coverage and (3) good shape reproducibility.

また、コンタクトで開孔された基板に和尚するものとし
て、多結晶シリコン層の場合やアルきニウムなどの金属
配線の場合でも同様の工程が適用できることは言うまで
もない。
Furthermore, it goes without saying that the same process can be applied to a substrate having a contact hole formed therein, in the case of a polycrystalline silicon layer or a metal wiring made of aluminum or the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図には従来のプ/タクト部で金属配線の断線の起こ
った状態のシリコ/ゲートMO8)う/ンスタの断面図
を示す。第2図には従来のウェットエッチでコンタクト
部の段にテーパーをつけた場合のMOS トラ/ラスタ
の断面図を示す。第3図ta+〜(eiVi本発明実施
例による拡散層に対するコンタクトに注目し念、半導体
装置の断面図である。 第4図は本発明の他の笑施例である。 なお図において、l・・・・・・第1導電型基板、2・
・・・・・フィールド酸化膜、3・・・・・・ケート酸
化膜、4・・・・・・ゲート多結晶・/す;ン、5a、
5b・・・・・・ンース及びトレイ/拡散層、6・・・
・・・酸化膜、7a、7b・・・・・・コンタクト開孔
部、lO・・・・・・金属配線、11・・・・・・第1
411[型基板、12・・・・・・フィールド部の酸化
膜、13・・・・・・拡散#、14・・・・・・酸化膜
、15・・・・・・フォトレジスト、16.17・・・
・・・コンタクト部の段差部。 18・・・・・・金属配線、19・・・・・・熱処理に
よシだらされたコンタクト開孔部、である。 n 34 5ジ 鉾1図 強2図 13            1j 5 311 第3図
FIG. 1 shows a cross-sectional view of a silicon/gate MO8) in which a metal wiring breakage has occurred in a conventional PC/tact portion. FIG. 2 shows a cross-sectional view of a MOS transistor/raster in which the step of the contact portion is tapered by conventional wet etching. FIG. 3 is a cross-sectional view of a semiconductor device, paying attention to the contact to the diffusion layer according to the embodiment of the present invention. FIG. 4 is another embodiment of the present invention. ...First conductivity type substrate, 2.
...Field oxide film, 3...Kate oxide film, 4...Gate polycrystalline, 5a,
5b... nce and tray/diffusion layer, 6...
...Oxide film, 7a, 7b...Contact opening, lO...Metal wiring, 11...First
411 [type substrate, 12... oxide film in field section, 13... diffusion #, 14... oxide film, 15... photoresist, 16. 17...
...Step part of contact part. 18...Metal wiring, 19...Contact opening portion sloppy due to heat treatment. n 34 5jihoko 1 figure strong 2 figures 13 1j 5 311 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 基板上に絶縁膜を形成し、骸絶縁膜に開孔を設ける半導
体装置の製造方法において、鋏絶縁膜上に選択的に7オ
トレジスト膜を設ける工1と、しかる後に#フォトレジ
スト膜が設けられた部分の前記絶縁膜の主表(Iをエツ
チノグする1寝と、該7、)レジスト膜が設けられてい
ない部分の前記絶縁膜の主表面および側面をエツチノグ
する1穆とを含むことを特徴とする半導体装置の製造方
法。
In a method of manufacturing a semiconductor device in which an insulating film is formed on a substrate and an opening is formed in the skeleton insulating film, step 1 of selectively forming a photoresist film on the scissor insulating film, and then a #photoresist film is provided. the main surface (I) of the insulating film in the part where the resist film is not provided; A method for manufacturing a semiconductor device.
JP7199182A 1982-04-28 1982-04-28 Manufacture of semiconductor device Pending JPS58188140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7199182A JPS58188140A (en) 1982-04-28 1982-04-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7199182A JPS58188140A (en) 1982-04-28 1982-04-28 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS58188140A true JPS58188140A (en) 1983-11-02

Family

ID=13476433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7199182A Pending JPS58188140A (en) 1982-04-28 1982-04-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS58188140A (en)

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