JPS58182767A - System operation analyzer - Google Patents

Abstract

PURPOSE:To perform the analysis of system operation and the searching of a fault, etc. with large capacity, by displaying consecutively a designated address or region of a system to be tested and then using effectively a memory area. CONSTITUTION:A control part 2 feeds the address and the data of a system 1 to be tested as well as a machine cycle pulse sent from a terminal M1. Then the part 2 detects the machine cycle pulse and writes the address information and the data to storing memory areas 3 and 4 while detecting a designated address or area which is set inside. At the same time, a diskette control part 5 controls the writing to a diskette 6, and a typewriter control part 7 performs a print control to a typewriter 8 when the diskette 6 is filled.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to an apparatus for analyzing the operational flow of a system using a microprocessor and searching for faults.

[Description of prior art]

Conventional motion analysis devices of this type have adopted a method of accumulating data for motion analysis using hardware and analyzing this data later. Therefore, there is a drawback that the content that can be analyzed is limited by the amount of data that can be stored.

[Purpose of the invention]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned drawbacks, and an object of the present invention is to provide a system behavior analysis device that can store a large amount of data for behavior analysis and can perform large-capacity behavior analysis.

[Summary of the invention]

The present invention monitors the machine cycles of the system under test,
A specified address or specified area is detected, and the address information and data are stored in one of the two storage memory areas based on the detection output, and when this storage memory area becomes full, the other storage memory area is stored. The address information and data are continuously stored in the storage memory area. Regarding the storage memory area that has become full, another control section performs writing processing to the external memory, and after the writing processing is completed, the storage memory area is made an empty memory area. It is also characterized in that it can be displayed externally from the external memory either manually or automatically.

[Explanation based on examples]

Next, embodiments of the present invention will be described with reference to the drawings.

The figure is a block diagram of an apparatus according to an embodiment of the present invention.

In the figure, 1 is the system under test. Reference numeral 2 denotes a control unit, which inputs the address, data, and machine cycle pulses sent from the terminal M of the system under test 1, and after detecting the machine cycle pulses,
While detecting whether it is an internally set designated address or designated area, the address information and data are written into the storage memory area 3 or 4 described below. 3 is a 0-system storage memory area, and 4 is a 1-system storage memory area. Further, 5 is a diskette control section, which controls writing to the diskette 6. Furthermore, 7 is a typewriter control section, which controls printing on the typewriter 8 when the diskette 6 is full.

Next, we will explain the operating method and internal processing of this system analyzer. Before using this device, set the designated address or designated area (start address and stop address) where you want to analyze the operational flow of the system under test 1.

Here, we will explain the case where a designated area is set.

First, start the device. Once started, the control section 2 of this apparatus starts detecting machine cycle pulses sent from the terminal M1 of the system under test 1. When the control section 2 detects this machine cycle pulse, it determines the start address, and if it determines that it is the start address, it reads the address information and data, and writes both of them into the storage memory area 3 as data.

Next, the above data is written every time a machine cycle pulse sent from terminal M is generated, but it is also judged at the same time whether it is a stop address or not, and when a stop address is detected, data collection is stopped. , returns to the start address monitoring state. Thereafter, the process described above is repeated.

When writing to the storage memory area 3, if the memory area 3 becomes full, the memory area 3 is switched to the memory area 4. To switch from memory area 3 to memory area 4, a switching signal (CS) is sent from memory area 3 to control section 2. When the control section 2 receives this switching signal, it outputs a diskette write start signal to the diskette control section 5. Memory writing continues in memory area 4. When this diskette control unit 5 receives the diskette write start signal, it reads data from the memory area 3 and starts writing this data to the diskette 6. When the entire memory area has been written, the process is stopped and the diskette write start signal is sent again. It will be a wait.

When the storage memory area 4 becomes full, the data in the memory area 4 is written to the diskette 6 by the diskette control section 5 in the same way as when the storage memory area 3 becomes full.

Further, if the diskette 6 becomes full during write control of the diskette 6, the present apparatus stops the analysis process, and the diskette control section 5 activates the control section 7 of the typewriter 8. Typewriter control section 7
Then, the typewriter 8 is made to print the data of all diskette areas. When printing is completed, the diskette 6 is formatted and the process is completed.

In this embodiment, a diskette and a tie writer are used as the external memory and the external display device, respectively, but the external memory is not limited to the diskette, but may be any other storage device capable of high-speed writing. Further, the external display device is not limited to the tie writer, but can be changed to other display devices. In addition, if the diskette is painted over and displayed externally only when necessary, it is possible to semipermanently analyze the operation.

〔Effect of the invention〕

As explained above, the present invention is capable of continuously displaying a designated address or a designated area of a system under test on a display device, so that memory area can be effectively utilized, and system operation analysis and This has the excellent effect of enabling large-capacity failure searches and the like.

[Brief explanation of the drawing]

The figure is a block diagram of an apparatus according to an embodiment of the present invention. 1... System under test, 2... Control unit, 3.4.-
- Storage memory area, 5... Diskette control unit, 6... Diskette, 7... Typewriter control unit, 8... Typewriter. Patent Applicant NEC Corporation Representative Patent Attorney Takashi Izunao 2

Claims (1)

[Claims] (1) Detection means for monitoring the machine cycle of the system under test and detecting a designated address or designated area; and 2. Selectively switching and storing the address information and data of the designated address or designated area based on the output of this detection means. A system behavior analysis device comprising: two storage memory areas; and write control means for writing the storage contents of the storage memory area into an external memory when one of the two storage memory areas is full.