JPS5817958B2 - The pulse of the wind and the wind - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for generating a luminance modulation signal in an image display device using a matrix panel.

In recent years, gas discharge devices (plasma), electroluminescent devices EL,
BACKGROUND ART Research is actively being conducted on image display devices using matrix panels using display elements such as liquid crystals, especially television receivers.

In an image display device using a multi-IJ panel, a matrix driving method using line sequential scanning is performed.

FIG. 1 shows a method of driving a matrix panel by line sequential scanning.

In FIG. 1, a matrix panel 1 includes strip-shaped horizontal electrodes (
A strip-shaped vertical electrode (hereinafter referred to as a signal electrode) is formed on the other surface.

Therefore, the intersection of the scanning electrode and the signal electrode forms one pixel.

A scan signal voltage is applied to the scan electrode by a scan electrode drive circuit 2.

A video signal is applied to the signal electrode by a signal electrode drive circuit 3.

At this time, the brightness of the pixels at the intersections of the scanning electrodes and the signal electrodes changes according to the video signal.

In the line sequential scanning method, a line memory capable of storing a video signal on one scanning line is used, and the video signal is applied from the line memory to the signal electrode via a signal electrode drive circuit.

Therefore, in the matrix panel, the pixels on the scanning electrodes change their brightness at the same time.

As line memory, there are methods using analog memory and methods using digital memory.

The invention uses digital memory. Therefore, the analog video signal is converted into a digital signal and then written into the digital memory.

Conventionally, pulse width modulation methods, pulse number modulation methods, and the like have been known as methods for controlling the brightness of pixels.

FIG. 2A shows an example of a brightness control signal generating circuit using the pulse width modulation method.

In the figure, 4 and 5 are NOT circuits, 6 to 9 are AND circuits,
10 is an OR circuit.

MA and MB are outputs of the line memory.

t, to t4 are pulse width modulated signals shown in FIG. 2B.

The output tp of the brightness control signal generation circuit in FIG. 2 is determined by the combination of 0 and 1 of the outputs MA and MB of the line memory.
-t4 is selected.

That is, if MB and MA are 0,0, tp=t1.0.
If 1, tP-t2, ■; If 0, tp=t3.1,1
Then, tp=t4.

FIG. 3 is a timing diagram of a signal according to the conventional Wareno-Choice width modulation method.

In the figure, ■ is a composite video signal, and H8 is a horizontal synchronization signal.

H8 is a signal with the polarity of H8 inverted.

The video signal written to the line memory in period ■ is
It is displayed on the matrix panel in between ■.

The pulse width modulated signals t1 to t4 are generated at the timing shown in FIG.

The display elements on the matrix panel change their brightness depending on the pulse width.

The pulse width modulation method shown in FIG. 3 is a method that uses H8j as a reference and has timing such that the leading edge of the pulse width modulation signal coincides with Hs.

As a method for generating such a pulse width modulation signal,
A well-known method is to use a monostable multi-by-break with H8 as a trigger pulse, or a clock pulse generator with 13 colors of clock pulses c as shown in Figure 4.
A bit shift register 11 driven by p
The flip-flop group 14 is set by the horizontal synchronizing signal Hs and reset by the output of each bit of the shift register 11, and the output t1 . A possible method is to use t2...tK as pulse width modulation signals.

Note that 12 in FIG. 4 is a circuit for setting the input of the shift register 11.

However, in the conventional method using a monostable multi-by-break, the pulse width is determined by the C and R time constants of the circuit, so the pulse width is unstable.

Furthermore, since the method shown in FIG. 4 provides a pulse width synchronized with the clock pulse, the pulse width is accurate, but it has the disadvantage that the circuit is too complex.

An object of the present invention is to use a pulse width modulation method in which the trailing edge of the pulse width modulation signal coincides with Hs.
It is an object of the present invention to provide a simple pulse width modulation signal generator having a four-circuit configuration while taking advantage of the advantages of the system shown in the figure.

In the present invention, when the tone transition of halftone display of an image is K,
A (K+1) bit shift register, a device that generates a clock pulse as an input signal of the shift register only during a period excluding the pulse width period of the horizontal synchronization signal, and an output of the (K+1) bit of the shift register. The circuit includes one driven flip-flop, and a circuit that clears the shift register using a horizontal synchronizing signal and the output of one of the flip-flops, and clears each of the outputs of the first to third bits of the shift register and the flip-flop. A pulse width modulated signal having a pulse width whose trailing edge coincides with that of the horizontal synchronizing signal is generated by the other output of the horizontal synchronizing signal.

FIG. 5 shows the timing of a pulse width modulated signal according to the present invention.

The conventional method shown in FIG. 3 is a method in which the pulse width increases with time based on H8.

That is, this is a method of making the leading edge of the pulse width modulation signal coincide with H8.

The method according to the present invention shown in FIG. 5 is a method of making the trailing edge of the pulse width modulation signal coincide with H8 using H8 as a reference.

It is clear that even if the method shown in FIG. 4 is used, exactly the same brightness control as the method shown in FIG. 3 can be performed.

FIG. 6 shows an embodiment of a pulse width modulation signal generating circuit according to the present invention.

In the figure, 11 is a shift register of 2 bits (=5 in this example), and a1 to a5 are outputs.

12 is a circuit that sets the input of the shift register,
Always set to logic 1.

13 is the clock pulse of the shift register, H8-〇(
A clock pulse is generated for a period of Hs-1).

Reference numeral 14 uses a J- flip-flop as a T flip-flop, and its state is reversed by a negative step voltage at the input.

FIG. 7 is a timing diagram of the apparatus shown in FIG.

Cp is the clock pulse of the shift register, Q and Q are the outputs of the flip-flop 14 at J-.

The operation shown in FIG. 6 will be explained below with reference to FIG.

First, Hs (=0) passes through the AND circuit 16 and is applied to the clear input of the shift register, and the outputs a1 to a5 of the shift register all become 0.

When H8=1 (H8-0), the clock pulse generator 13 generates the clock pulse CP.

Since the input of the shift register is always 1, the outputs a1 to a5 of the shift register are sequentially changed to 1 by the clock pulse.
become.

When an output is generated at a5, this output is inverted by the inverter 15 and applied to the flip-flop 14.
14 inverts the state.

The output of 14 passes through an AND circuit 16 and is applied to the clear terminal of the shift register.

Therefore, the output a1. of the shift register 11 shown in FIG. Corresponding to a2+a3 y a4, the pulse width modulation signal t4. shown in FIG. t3. t2 and tl can be obtained.

In FIG. 7, it is difficult to precisely match the leading edge and trailing edge of t4 with Hs, and times T1 and T2, respectively.
It shifts by just that.

However, by controlling the frequency of the clock pulse, it is possible to reduce it to a practically acceptable level.

FIG. 8 shows the pulse number modulation signal bow t7 by applying the present invention.
, t/, t1' is a modification of the present invention.

The explanation so far has been given on the assumption that four gradations are displayed, that is, four types of pulse width modulation signals are generated, but by increasing the number of bits in the shift register, K
It is clear that this can be extended to gradation display.

Also, in Figure 3, H8 is a minute. Periods I and ■ can be selected to arbitrary values by repeating the cycle.

As described above, according to the present invention, compared to the conventional method of driving one monostable multi-bi break using a horizontal synchronization signal as a trigger signal, the pulse width is 4 reliably, and the method shown in FIG. The number of flip-flops compared to (
K-1) It can be made smaller.

It also has the following features: (1) It can be constructed using only digital circuits, and the circuit configuration is simple.

Therefore, it is easy to implement MO8LSI.

, (2) By increasing the number of bits of the shift register, the pulse width ratio of the pulse width modulation signal can be arbitrarily selected.

Therefore, brightness control can be performed according to the voltage versus brightness characteristics of the display element.

(3) Once the pulse width ratio is set, the overall pulse width can be changed simply by changing the frequency of the clock pulse without changing the pulse width ratio.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the first driving method of the matrix panel, □ Figure 2
The figure shows a device that generates a brightness control signal, Figure 3 is a timing diagram of a composite video signal and a pulse width modulation signal, and Figure 4 shows a possible method for generating a pulse width modulation signal as shown in Figure 3. 5 is a diagram showing the timing of the pulse width modulation signal according to the present invention, FIG. 6 is a diagram showing an embodiment of the pulse width modulation signal generator according to the present invention, and FIG. 7 is a diagram showing the circuit system. Diagram showing the timing of signals of each part in Fig. 6, Fig. 8
The figure shows a modification of the present invention. 11...Shift register, 13...Clock pulse generator, 14...Flip-flop, H8...Horizontal synchronization signal, al+a2. a3 y a4'''Each bit output of shift register 11.

Claims (1)

[Claims] 1. In a pulse width modulation signal generator for brightness control of an image display device using a matrix panel using a display element such as a gas discharge element, an electroluminescent element, or a liquid crystal, when the number of gray levels of halftone display of an image is K. , (K+1
) bit shift register, a device that generates a clock pulse only during a period excluding the pulse width period of the horizontal synchronization signal as an input signal of the shift register, and driven by the output of the (K+1)th bit of the shift register. and a circuit for clearing the shift register using a horizontal synchronizing signal and the output of one of the flip-flops, and a circuit that clears the shift register by using a horizontal synchronizing signal and the output of one of the flip-flops. 1. A pulse width modulation signal generating device, which generates a pulse width modulation signal having a pulse width whose trailing edge coincides with that of a horizontal synchronization signal.