JPS58174872A - Underwater detection display - Google Patents

Underwater detection display

Info

Publication number
JPS58174872A
JPS58174872A JP56198940A JP19894081A JPS58174872A JP S58174872 A JPS58174872 A JP S58174872A JP 56198940 A JP56198940 A JP 56198940A JP 19894081 A JP19894081 A JP 19894081A JP S58174872 A JPS58174872 A JP S58174872A
Authority
JP
Japan
Prior art keywords
time
display
circuit
memory
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56198940A
Other languages
Japanese (ja)
Inventor
Shozo Uchihashi
内橋 昭三
Shozo Shibuya
渋谷 正三
Kazuo Yamauchi
和夫 山内
Tadao Hayashi
林 忠夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furuno Electric Co Ltd
Original Assignee
Furuno Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furuno Electric Co Ltd filed Critical Furuno Electric Co Ltd
Priority to JP56198940A priority Critical patent/JPS58174872A/en
Publication of JPS58174872A publication Critical patent/JPS58174872A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/52Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S15/00
    • G01S7/56Display arrangements
    • G01S7/62Cathode-ray tube displays

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)

Abstract

PURPOSE:To enhance the relativity of old and new informations received and that between information received and reception points by combining old information received and reception time. CONSTITUTION:A control pulse generation circuit 2 sends out a pulse at a preset cycle to a transmission trigger generation circuit 3 while feeding it to an X-axis counter 7 and Y-axis counter 8. The X-axis counter 7 adds and counts a divided pulse and stops the action when the counts reach m0-1. The Y-axis counter 8 subtracts 1 from output counts each time a control pulse is provided from the control pusle generation circuit 2 and set at m0-1 with the subsequent pulse when the counts are down to 0. Both the counts are sent into a memory circuit 6 through a switching circuit 10 and signals received converted to digital are written into addresses as specified by both of the counts.

Description

【発明の詳細な説明】 本発明は、指向性超晋彼パルス會用いて連続的に水中探
知することにより得られる受信1ぎ号を・−日メモして
、例えばCR1表示器上に経時的表示する水中探知@不
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for recording received signals obtained by continuous underwater detection using a directional ultra-high pulse system and displaying them over time on, for example, the CR1 display. Regarding underwater detection @ non-equipment to display.

出願人は、上記メモを表示器一画面が有する画素容量以
上の容量を少くとも経時方向に具備せしめ、過去の探知
情報との比較、再確認等の目的で上記メモ内に記憶され
た比較的古い情報分全適宜再読出表示する水中探知装置
に関して提案した(突願昭56−2034号)。これは
ペン記録方式の水中探知機と同様な上記比軸、再確認前
の機能を具備させんとするもので・りる。
The applicant has provided the above-mentioned memo with a capacity greater than the pixel capacity of one screen of the display device, at least in the chronological direction, and the comparative information stored in the above-mentioned memo for the purpose of comparison with past detection information, reconfirmation, etc. A proposal was made regarding an underwater detection device that rereads and displays all old information as needed (Gan No. 56-2034). This is intended to provide the above-mentioned ratio axis and pre-reconfirmation functions similar to pen-recording underwater detectors.

しかしながら、水中探知に際しては深度、魚群状況等に
j、6じて探知のだめの最適な探バ」レンジが要求され
る結果、常時同一のレンジで観測が行ゎ1Lることはま
ずあり得なく、係る楊せ上記レンジの変更に応じて探知
周期が変化することを考慮す扛ば表示器上での経時方向
の割合が秤1時時間に比例せず、而して希望する再表示
情報が何時探知さnたか音知ること、又逆に過去の特定
の時1川に探知さ扛だ情報を再表示することは極めて困
難である。
However, when performing underwater detection, the optimal range for detection is required depending on depth, fish school conditions, etc., and as a result, it is almost impossible to always conduct observations at the same range. If you take into account that the detection period changes according to the change in the range mentioned above, the proportion of the time direction on the display will not be proportional to the time on the scale, and therefore the desired redisplay information will not be displayed at any time. It is extremely difficult to know what was detected or, conversely, to re-display information that was detected at a particular time in the past.

本発明は、土日己に鑑みてなδ1したもので、J9rだ
時間毎に探知信号の掛込が行われてい、り)番地を順次
記憶することにより、特定の経過時間音指定することに
より対応する番地を続出して該番地に記憶された情報を
再読出表示する水中探知表示装置dを提供するものであ
る。
The present invention has been developed in consideration of Saturdays and Sundays, and the detection signal is interrogated every J9r time. ri) Addresses are sequentially memorized and a specific elapsed time sound is specified. The present invention provides an underwater detection display device d that successively displays addresses and rereads and displays information stored at the addresses.

以下、図面の実施例により説明する。Hereinafter, it will be explained with reference to the embodiments shown in the drawings.

第1図は掛込、続出を説明するための記1.椴1虹路(
第2図、6)の番地構成図である。該記憶回路6はno
c列) Xm6 (行)の記憶容量r有し、受信信号の
書込は吊初(n61)効目のO乃至(me 1)行に対
して行われる。そして順次性しい受信信号毎に(n6〜
1)列目・・・・1列目、θ列目と実行される。
Figure 1 shows the notes 1. Temple 1 Rainbow Road (
It is an address structure diagram of FIG. 2, 6). The memory circuit 6 is no
It has a storage capacity r of (column c) Then, for each sequential received signal (n6~
1) Column... Executed from the 1st column to the θ column.

従って、今、n≦no 1)列目にn0回前の受信信号
全消去しつつ新たに掛込が行われているときは最も古い
、すなわち(no  1)回前の受信信号は(n−1)
列目に記憶さ扛ている。
Therefore, if a new reception is being performed in the n≦no 1) column while erasing all n0 received signals, the oldest, that is, the (no 1) previous received signal is (n- 1)
It is remembered in the column.

一方、C此T等の表示器(第2図、14)は経時方向に
k (< n 6 )列、深度方向にm。行の画素容せ
を有している(図示せず)。表示器14上、最新の探知
に基づく受信信号は0列目の0乃至(me  1)行に
順次表示され、表示される最も古い受信信号は(k−1
)列目の0乃至(mo  1)行に順次表示される如く
なされてbる。そして記憶回路6から表示器14へ記憶
読出は、通常最新情報の存在するn列目から11貝次(
n+1)、(n+2) ・・” (n+k  1)ダリ
目と行わnる。
On the other hand, the display device (FIG. 2, 14) of C, etc. has k (< n 6 ) columns in the temporal direction and m in the depth direction. It has rows of pixel containers (not shown). On the display 14, the received signals based on the latest detection are sequentially displayed in rows 0 to (me 1) of the 0th column, and the oldest received signals displayed are (k-1).
) column 0 to (mo 1) rows are displayed sequentially. The memory readout from the memory circuit 6 to the display 14 is normally carried out from the nth column where the latest information exists to the 11th column (
n+1), (n+2)..." (n+k 1) Do n.

さて、第2図は本発明の一実施例を示す回路図で、1は
超音波パルスを水中に送受波する]木受波器である。上
記送波VJ、 *t制御パルス発生回踏2より送出され
るパルスに基づく送信トリガ発生回路3からの送信トリ
ガにより行われる。そして受信1を号は増幅間11五4
で増幅検波さ汎た後A、−D変換回路5を経て記憶回路
6にh記憶される。
Now, FIG. 2 is a circuit diagram showing an embodiment of the present invention, in which numeral 1 indicates a wooden receiver for transmitting and receiving ultrasonic pulses underwater. The transmission VJ is performed by the transmission trigger from the transmission trigger generation circuit 3 based on the pulse sent out from the *t control pulse generation circuit 2. And the reception number 1 is amplified between 11 and 5
After being amplified and detected, the signal is passed through the A and -D conversion circuit 5 and stored in the storage circuit 6.

ところで、上記制御パルス発生商略2は探知レンジ毎e
こ予め投ずきれた周期にてパルスを送出して上記送信ト
リガ発生回路3へ導かれると共にX軸カウンタ7及びY
軸カウンタ8に送入される。
By the way, the above control pulse generation strategy 2 has e
Pulses are sent out at a predetermined period and are guided to the transmission trigger generation circuit 3, as well as to the X-axis counter 7 and Y-axis counter 7.
It is fed into the axis counter 8.

又、分周回路9は水中音速度及び探知レンジaV(二よ
シ後述の6+hぐ定められた周期で分周パルスを発生す
る。、X軸カウンタ7は上記分周パルス全加算計数し、
該計数1直が(mo−1)になった時計数動作音停止す
る。、、そして制御パルス発生回路2がらの+ff1J
 mlパルスにてリセットされ、その出力計式1直を0
とする如くなされている。Y軸カウノタ8は制御パルス
・発生回路2がらの副側Iパルス毎に出力計数値を1ず
つ減算し、該計数値が0になると次パルスで(mo 1
)にセットされる如くなされている。
In addition, the frequency dividing circuit 9 generates frequency dividing pulses at a predetermined period for underwater sound velocity and detection range aV (6+h, which will be described later).
When the first shift reaches (mo-1), the clock operation sound stops. , , and +ff1J of the control pulse generation circuit 2
It is reset by the ml pulse, and the output meter is set to 0.
It is done as follows. The Y-axis counter 8 subtracts the output count value by 1 for each secondary I pulse from the control pulse/generation circuit 2, and when the count value reaches 0, it subtracts (mo 1
).

−ト記両計数値が切換回路ioを介して記憶回路6に送
入される結果、上記A−D変換された受信信号は両肘数
値が指定する番地に書込まれる。この時、X軸カウンタ
7及びY軸カウンタ8の計数値は各々記憶回路6の深度
及び経時方向の書込位置をボす。従って、X 1lil
lカウンタ7の計数値が0乃至(mo、−1)壕で変化
する間に記憶回路6 iCは深度方向−タリ分の受信信
号が書込まれる。次に制御パルス発生回路2からパルス
が送出されるとY軸カウンタ8は計数値を1だけ減算し
、X軸カウンタ7は前日白5j様0乃至(mol)の計
数を行い記憶回路6の深度方向一部分の受信信号が一尋
込筐れる。同様VC上記パルス信号が送出される毎に前
述の動作を繰返すからYIIIlllカウンタ8のiv
1′数値が(no−、x)からO−!、で変化する間に
dピ憶回路6の全ての番地に受信情報が書込まれる。
As a result, the A-D converted received signal is written to the address specified by the elbow count values. At this time, the counts of the X-axis counter 7 and the Y-axis counter 8 correspond to the depth of the memory circuit 6 and the write position in the chronological direction, respectively. Therefore, X 1lil
While the count value of the counter 7 changes from 0 to (mo, -1), the received signal corresponding to the depth direction is written into the memory circuit 6 iC. Next, when a pulse is sent from the control pulse generation circuit 2, the Y-axis counter 8 subtracts the count value by 1, and the X-axis counter 7 counts the previous day's white 5j from 0 to (mol), and stores the depth of the memory circuit 6. The received signal for one part of the direction is contained. Similarly, the above operation is repeated every time the above pulse signal is sent out, so the iv of YIIIllll counter 8
1' value changes from (no-, x) to O-! , the received information is written to all addresses in the d-pin storage circuit 6.

尚、11は水中音速度の半分Vとmoとの積、すなわち
vmoなる周波数にてクロックパルスを送出するクロッ
クパルス発生回路である。又、12は上記探知距14a
に相当する信号を送出する探知距離信号送出回路で、該
探知距離は+動により可変自在である。そして、上記分
周回路9は上記周波数VmQをa分周したvma/aな
る周波数((て分周パルスを送出する如くなされている
。すなわら、上記周波数の逆数a/vmQなる周期で分
周パルスが送出され、該パルスがm。個送出される時間
はVvであり、そして上記a/V時11」J内における
信号伝達1+′lシl#はa/v×vとなシ、この結果
深度方向0乃至m。番地外に深度aまでの受信信号がt
mQ間隔て書込丑れることとなる。
Note that 11 is a clock pulse generation circuit that sends out clock pulses at a frequency of vmo, which is the product of half the underwater sound speed V and mo, that is, vmo. Also, 12 is the detection distance 14a.
This is a detection distance signal sending circuit that sends out a signal corresponding to , and the detection distance is freely variable by + movement. The frequency dividing circuit 9 is configured to send out a frequency divided pulse by dividing the frequency VmQ by a to a frequency vma/a ((()). A periodic pulse is sent out, and the time during which m pulses are sent out is Vv, and the signal transmission 1+'l in the above a/V time 1+'l is a/v×v. As a result, the depth direction is from 0 to m.The received signal to the depth a is t outside the address.
Writing will be delayed at mQ intervals.

次に、sr2憶回絡6から記1鳥信号を読出しI’)−
A変換回路13を介して表示器14Vこ次示させる点に
つき説明する。
Next, read the 1st bird signal from the sr2 memory circuit 6 and read it out I')-
The following will explain how the display 14V is displayed via the A conversion circuit 13.

上記症・1:□□□信号の表示器14への読出表示は縦
方向掃引により実行′さnる。すなわち、先ずθ列目の
X方向0乃至(mo 1)行′までの掃引が行われ、次
に1列目のX方図O乃至(mo 1)行までという如く
行われ、左端に列目が終了すると0列目に復帰する。1
5は上記の縦方向、すなわち深度方向の光示読出のだめ
の帯地指定全行うX補カウンタで、クロックパルス発生
回路16から送出される予め定められた周期パルスを0
乃至(mo  1)まで加算計数することによシ上記耽
出番地が形成される。そして上記計数値(mo 1)は
垂直同期パルス発生回路17からの深度方向−掃引毎に
送出される同期パルスぐこより0にリセットせしめられ
る。
Symptom 1: Reading and displaying the □□□ signal on the display 14 is performed by vertical sweeping. That is, first, a sweep is performed from column θ in the X direction from 0 to row (mo 1), and then from O to row (mo 1) in the first column in the X direction, and so on. When the process ends, it returns to the 0th column. 1
Reference numeral 5 designates an X-complementary counter that specifies the zone of the optical display readout in the vertical direction, that is, the depth direction, and sets the predetermined periodic pulse sent from the clock pulse generation circuit 16 to 0.
By adding and counting from (mo 1) to (mo 1), the above-mentioned destination address is formed. The above-mentioned count value (mo 1) is reset to 0 by the synchronization pulse sent from the vertical synchronization pulse generation circuit 17 every time the depthwise sweep is performed.

上記垂直同期パルスは掃引回路18に送入されて表示器
14上で深度方向の掃引全実行させると共にY軸カウン
タ19に送入される。該Y軸カウンタ19は垂(ば同期
パルスをO乃至(k−1)まで加算計数し、その出力計
数値は後述する如く記憶回路6の経時方向の読出番地を
指定する基本計数値として働く。又、上記計数値が(k
−1)からOにリセットされる毎に掃引回路18へパル
スを送出して表示器14上で経時方向の掃引が実行さ扛
る。上記Y軸カウンタ19の出力数値は加算回路20を
介して形成される数11uが読出番地として作用するこ
ととなる。
The vertical synchronizing pulse is sent to the sweep circuit 18 to cause the display 14 to perform a complete sweep in the depth direction, and is also sent to the Y-axis counter 19. The Y-axis counter 19 adds and counts the vertical synchronization pulses from O to (k-1), and its output count value serves as a basic count value for designating a reading address in the storage circuit 6 in the chronological direction, as will be described later. Also, the above count value is (k
-1) to O, a pulse is sent to the sweep circuit 18 to perform a sweep in the time direction on the display 14. For the output numerical value of the Y-axis counter 19, the number 11u formed via the adder circuit 20 acts as a read address.

加昇回路20の他の入力端には通常切換スイッチ21を
介してY軸カウンタ8の出力計数値が導入される結果、
記憶内容の読出は最も新しい受信信号より順次占い方向
にに部分行われることになる (第1図、斜線部分)。
As a result, the output count value of the Y-axis counter 8 is introduced into the other input terminal of the boost circuit 20 via the changeover switch 21.
The reading of the memory contents is carried out sequentially in the fortune-telling direction starting from the newest received signal (shaded area in Figure 1).

尚、加算回路20の計数容量はnoとする。Note that the counting capacity of the adder circuit 20 is assumed to be no.

次に本発明の主要部である再読出戎示制側1部22に関
して説明する。
Next, the rereading display system part 22, which is the main part of the present invention, will be explained.

23は該再仇出表不゛IItll @1都22内におけ
る時計の役割τ果す時刻カウンタで、クロックパルス発
生回路11のクロックパルスケ分周回路24で分周して
得られた、例えば1(H2)の秒パルス(波形率L/2
)を計数する。又、25は、例えば時、分、秒の形態で
時刻の設定が行えるデジタル型の時刻設′LE:器で、
時刻の出力は、秒に変換した数値で送出さ汎る!ii」
くなされている。上記時刻カウンタ23の時刻セット動
作は、先ず該セット動作時の時刻金時刻設定器に設定し
、時刻カウンタ23内に尋かれるその秒単位数値出力を
、更にL OA、I)することによりなされる。そして
その恢?−J、上記秒パルスを加算計数することにより
時々刻々の時刻を出力する。上記時刻カウンタ23の時
刻は秒パルスの半周期である尚レベル期向に切□□□ス
イッチ26を通して記憶1川路27に導かれ、その時刻
に該当する番地にその時のY軸カウンタ8の出力計数値
を書込む。すなわち、上目ピ秒パルスの高レベル期間に
pいては切換スイッチ26は時刻カウンタ23側に接続
さn且っ記憶回路271:」、書込状態どされる。又、
記憶回路27の記憶容量は、1日分とすれば、 24X60X60XL  (但し、Lばn。全2進数で
表わしたときのビット数) だけ硬水される。28(d秒パルスの低レベル期間、す
なわち切換スイッチ26が時刻設定器25側に接続され
、d内意回路27が読出状態のときの該読出査〕也tラ
ッチするラッチ回路である。
23 is a time counter that plays the role of a clock in the reproduction table 22, and is obtained by dividing the clock pulse frequency by the clock pulse frequency dividing circuit 24 of the clock pulse generation circuit 11, for example, 1 ( H2) second pulse (waveform rate L/2
) is counted. In addition, 25 is a digital time setting unit that can set the time in the form of hours, minutes, and seconds, for example.
The time output is sent as a number converted to seconds! ii”
It is being neglected. The time setting operation of the time counter 23 is performed by first setting the time on the time setter at the time of the setting operation, and then further outputting the numerical value in seconds displayed in the time counter 23. . And the result? -J, outputs the momentary time by adding and counting the second pulses. The time of the above-mentioned time counter 23 is led to the memory 1 channel 27 through the switch 26, and the output counter 8 of the Y-axis at that time is stored at the address corresponding to that time. Write the numerical value. That is, during the high level period of the upper pi-second pulse, the selector switch 26 is connected to the time counter 23 side and the memory circuit 271 is put into the write state. or,
If the memory capacity of the memory circuit 27 is for one day, the water is hardened by 24×60×60XL (Lban, the number of bits when expressed in binary). 28 (d-second pulse low level period, that is, when the changeover switch 26 is connected to the time setter 25 side and the internal circuit 27 is in the read state), it is also a latch circuit that latches.

式て、前述したダlく、通常時にはY軸カウンタ8の出
力計数1+Mが切換スイッチ21盆介して加算回路20
VC送入される結果、表示器14上には最新の受信情報
より表示が開妬さ扛るが、切換スイッチ21を再続出表
示’+ii制御部22側に切換えることにより所望する
時刻における受信情報からの再表示がなされる。すなわ
ら、例えば現在(2時10分0秒とする)より1時間前
の探知情報−2再表示ぜんとする揚台、先ず時刻設ず器
25に1時10分0秒ケ設ボする。この秒単位数420
0は抄パルスの低レベル期間に切換スイッチ26tll
≠てIピ憶回路27に導かれ、当該4200査地に書込
゛まれている記憶値(この値、lよ1時間前のY軸カウ
ンタ8の出力計数1直)ヲ続出し且つラッチ回路28で
ラッチさ汎る。該ラッチ値は上記設定1111 ’t 
?J’史しない−り同一でめる。そして、この埴が切換
スイッチ2Hr通して加A回路20に送入さ扛てY m
uカウンタ19の出力計数値と加算ざする結果、表示器
14上には1時間ii1の受波信号より1+m次衆示芒
扛る。尚、係る場片においても秒パルスの尚レベルM間
Vよ依然として前述同体Y軸カウンタ8の出力計数値葡
i己はしている。
As mentioned earlier, under normal conditions, the output count 1+M of the Y-axis counter 8 is sent to the adder circuit 20 via the selector switch 21.
As a result of the VC being sent, the latest received information is displayed on the display 14, but by switching the changeover switch 21 to the '+ii control section 22 side, the received information at the desired time is displayed. will be redisplayed. In other words, for example, if you want to re-display detected information 1 hour before the current time (2:10:0), first set 1:10:0 to the time setting device 25. . This number of seconds is 420
0 is the selector switch 26tll during the low level period of the pulse pulse.
≠ is led to the I memory circuit 27, and the stored value (this value, the output count of the Y-axis counter 8 1 hour before l) written in the corresponding 4200 location is continuously output and the latch circuit It is latched at 28. The latch value is the above setting 1111't
? J's history is the same. Then, this clay is passed through the changeover switch 2Hr and sent to the A circuit 20.
As a result of being added to the output count value of the u counter 19, a 1+m order signal is displayed on the display 14 from the received signal for 1 hour ii1. In this case, the output count value of the Y-axis counter 8 is still higher than the level M of the second pulse.

受1B池点は受1百時刻より通常地点を逆算可能である
)との関連1生を一段と高めることができる。
Uke 1B Ike point can be used to calculate the normal point backwards from Uke 100 time), and the related 1st grade can be further improved.

尚、本笑施例では時刻カウンタ23の人力パルスとして
秒パルス全使用したが、分パルス、10分パルスの如き
パルスτ便月−1す□こノーはもとより可1〕ヒである
。すなわち、係る場合時刻設定器25は分単位、10分
単位の如く設定されることになる。
In this embodiment, all second pulses are used as manual pulses for the time counter 23, but pulses such as minute pulses and 10 minute pulses can also be used. That is, in such a case, the time setting device 25 will be set in units of minutes, units of 10 minutes, etc.

又、第3図は阿読出衣示制御部22の他の実施例ケ示す
ものである。第2図においては、前述した如く時刻カウ
ンタ23の出力時刻を帯地としてY軸カウンタ8の出力
計数値全記憶回路27に舊込んでいたが、この方式では
、逆にY軸カウンタ8の出力計数置を番地として時刻カ
ウンタ23の出力時刻ヲ書込むこととしている点が相異
する。
Further, FIG. 3 shows another embodiment of the Ado clothes display control section 22. As shown in FIG. In FIG. 2, as mentioned above, the output time of the time counter 23 is stored in the total storage circuit 27 of the output count of the Y-axis counter 8, but in this method, the output count of the Y-axis counter 8 is The difference is that the output time of the time counter 23 is written using the location as the address.

以下、第3凶の実施例につき説明する。The third example will be described below.

時刻カウンタ23は時刻設定後分周回路24からの秒パ
ルスを計数して時刻を出力し、該読出時刻は順次記憶回
路27に導かれている。記憶回路27′は探知レンジに
対応する周期性パルスを送出する制御パルスf6生回路
2のパルス出力期間(高レベル状態)のみ書込状態とさ
れ、上記出力時刻をその時のY紬カウンタ8の出力計数
値の番地に書込記憶する如くなさ扛ている。ここにおい
て、Y軸カウンタ8の出力計数値は制御パルス発生毎に
変化することにより、込波毎の時刻が記憶されることと
なる。このようにして記憶さ・れた谷送1ぎ毎の時刻は
、読出番地指定として機内上する比較的高速でなされる
読出カウンタ29により順次読出される。該読出カウン
タ29は上I己制御パルスの出力休止期間(低レベル状
態)を利用して0乃至(no−1)までの計数匝゛r出
力する如くなされている。
After setting the time, the time counter 23 counts the second pulses from the frequency dividing circuit 24 and outputs the time, and the read time is sequentially led to the storage circuit 27. The memory circuit 27' is in a writing state only during the pulse output period (high level state) of the control pulse f6 generation circuit 2 that sends periodic pulses corresponding to the detection range, and the above output time is stored as the output of the Y Tsumugi counter 8 at that time. It is not like writing and storing at the address of the count value. Here, the output count value of the Y-axis counter 8 changes every time a control pulse is generated, so that the time of every incoming wave is stored. The thus stored times of each downward feed are sequentially read out by the readout counter 29 which is mounted on the machine at a relatively high speed as a readout address designation. The read counter 29 is configured to output a count value from 0 to (no-1) using the output suspension period (low level state) of the upper I control pulse.

順次読出された各番地の記憶内容、すなわち時刻データ
は比較回路30に送入される。該比較回路30(−j:
&示器14への再表示のだめの時刻が設定された時刻設
定器からの時刻の秒単位数が送入されており、該数値と
順次読出でれる上記時刻データと一致しだ時一致パルス
を出力する如くなされている。そして該一致パルスによ
V)−f:の符の脱出カウンタ29の出力計数1直がラ
ッチ回1嗜28にラッテち扛る。この結果、前述の場合
と同僚に機能する。
The stored contents of each address read out sequentially, ie, time data, are sent to the comparison circuit 30. The comparison circuit 30 (-j:
& The number of seconds of the time is sent from the time setter to which the time to be re-displayed on the display 14 is set, and when this value matches the above-mentioned time data that can be read out sequentially, a coincidence pulse is sent. It is designed to output. Then, the coincidence pulse causes the output count 1 of the escape counter 29 of the sign V)-f: to be latched to the latch time 1 28. This results in the aforementioned case and co-worker.

尚、時刻の記憶Vま全送波時にする必要は々く、例えば
、1回置き、2回1ゴきとしても良い。
Note that it is often not necessary to store the time during every wave transmission; for example, the time may be stored every other time and once every two times.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、書込、読出を説明するだめの記憶回路の帯地
構成図である。 第2図は、本発明の一実施例を示す回路図である。 第3図は、本発明要部の他の実施例を示す回路図である
〇 特許出願人 古野電気株式会社 黍11刀 一丁(系呈1?6)方間 −
FIG. 1 is a schematic diagram of a storage circuit for explaining writing and reading operations. FIG. 2 is a circuit diagram showing one embodiment of the present invention. FIG. 3 is a circuit diagram showing another embodiment of the main part of the present invention Patent applicant Furuno Electric Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] (1)超音波パルスを水中に繰返し送阪し、帰来反射涙
金受波し該帰来反射波を一旦経t4的に順次記憶して該
記憶内容を読出して表示器上に経時的に表示する手段に
より表示する如くなされた水中探知表示装置において、 陽性に列の画素で構成される表小器と、上記り蛍来反射
波が記憶さ扛る少くとも印行no (>k)列分の記憶
料量を有する第1の記憶N路と、所定時間毎に上記第1
の記憶回路の書込の行わノ1ている列番地ケ記憶する第
2の記憶回路と、上記所>E時間間隔で過去の一%に時
間を設定する設定手段と、 該設定手段出力よりその時間における第1の記・1意回
路の対応列査地領読出す読出手段と、該続出手段出力を
上記表示器上に経時的に表示する手段に導く手段と全具
備して成り、表示器上に上記−特定時に得し7′1.た
受信信号より順次経時的に表子することを+!f倣とす
る水甲探知表不装置。
(1) Repeatedly sending ultrasonic pulses into the water, receiving the return reflection waves, storing the return reflection waves sequentially over time, reading out the stored contents, and displaying them over time on the display. In an underwater detection display device configured to display a display by a display means, there is a display device consisting of a positive column of pixels, and a memory for at least no (>k) columns of printed rows in which reflected waves from the above-mentioned fluorescent light are stored. a first memory N path having the amount of data;
a second memory circuit for storing the column address at which writing is performed in the memory circuit; a setting means for setting the time to 1% of the past at the time interval >E; It is completely equipped with a readout means for reading out the corresponding column location of the first record/unique circuit in time, and means for guiding the output of the successive output means to the means for displaying the output over time on the display. above--at a particular time 7'1. +! F-type water shell detection device.
(2)超音波パルス全水中に繰返し送出し、帰来反射波
を受波し該帰来反射波を一旦経時的に順次配・億して該
記憶内容を読出しC表示器上に経時的に表示する手段V
こより表示する如くなされた水中探知底水装置VCおい
て、 m行に列の画素で構成される表示器と、上記帰来反射波
が記憶される少くともnolino (>k)列分の記
憶容量を有する第1の8ピ憶1回路と、時刻又は時刻に
対応する信号を発生する時刻発生器と、 1又は2以上の送波毎に上6ピ第lの記憶Iu路の書込
の行わ扛ている列借地に対応する査地に上記信号を記憶
する第2の記憶回路と、 過去の特にの時刻又は時刻に対応する信+=j會設定送
出する時刻設定器と、 上記5g2の記憶IjJ路に記憶された信号τ送波周期
に比し比較的尚速で銅次指定して読出す胱出回路と、 第2の記憶回路より読出された信号と時刻設定器からの
送出信号が一致する時の上記読出回路の指軍着地τ抽出
する抽出生膜と、 該抽出された指定番地伊上記表示器上に経時的に表示す
る手段に導く手段と7具備して成り、表/ド器上に上記
指定番地に対応する第1の記憶回路の列番地の受信信号
より順次経時的に表示することを特徴とする水中探知装
置装+t、−。
(2) Repeatedly send out ultrasonic pulses into all the water, receive the returned reflected waves, distribute the returned reflected waves sequentially over time, read out the stored contents, and display them over time on the C display. Means V
The underwater detection bottom water device VC configured to display the above information includes a display device composed of m rows and columns of pixels, and a storage capacity for at least nolino (>k) columns in which the above-mentioned return reflected waves are stored. a first 8-pin memory circuit having one circuit, a time generator that generates a time or a signal corresponding to the time, and a first 8-pin memory Iu circuit that writes to the upper 6-pin memory Iu every time one or more waves are transmitted. a second memory circuit that stores the above-mentioned signal in a location corresponding to the leased land in the row; a time setter that sends out a signal corresponding to a particular time or time in the past; and the memory IjJ of 5g2 above. The signal read out from the second memory circuit and the signal sent from the time setter match each other. and a means for displaying the extracted designated address on the display over time; An underwater detection device +t, - characterized in that the received signal of the column address of the first storage circuit corresponding to the designated address is displayed sequentially over time.
JP56198940A 1981-12-09 1981-12-09 Underwater detection display Pending JPS58174872A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56198940A JPS58174872A (en) 1981-12-09 1981-12-09 Underwater detection display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56198940A JPS58174872A (en) 1981-12-09 1981-12-09 Underwater detection display

Publications (1)

Publication Number Publication Date
JPS58174872A true JPS58174872A (en) 1983-10-13

Family

ID=16399493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56198940A Pending JPS58174872A (en) 1981-12-09 1981-12-09 Underwater detection display

Country Status (1)

Country Link
JP (1) JPS58174872A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017015645A (en) * 2015-07-06 2017-01-19 古野電気株式会社 Fish detector, program, and fish detecting method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5679975A (en) * 1979-12-04 1981-06-30 Koden Electronics Co Ltd Display device for controlling display time
JPS5679976A (en) * 1979-12-04 1981-06-30 Koden Electronics Co Ltd Color cathode ray tube display device
JPS56115972A (en) * 1980-02-19 1981-09-11 Furuno Electric Co Ltd Underwater detector capable of color display on cathode-ray tube

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5679975A (en) * 1979-12-04 1981-06-30 Koden Electronics Co Ltd Display device for controlling display time
JPS5679976A (en) * 1979-12-04 1981-06-30 Koden Electronics Co Ltd Color cathode ray tube display device
JPS56115972A (en) * 1980-02-19 1981-09-11 Furuno Electric Co Ltd Underwater detector capable of color display on cathode-ray tube

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017015645A (en) * 2015-07-06 2017-01-19 古野電気株式会社 Fish detector, program, and fish detecting method

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