JPS6260665B2 - - Google Patents

Description

[Detailed Description of the Invention] This invention enables, for example, an ultrasonic detection display device such as a fish finder to display detection information on a cathode ray tube and change the time range of the displayed information as necessary. This invention relates to a detection and display device.

For example, in a fish finder, information on a single detection is displayed as a single display line at one end of the display screen of a cathode ray tube display, and information on multiple detections is arranged in chronological order and displayed on one screen, and new information is displayed on one screen. A method has been proposed in which the oldest information is erased each time the new information is displayed and the new information is always displayed at one end of the display screen in a format similar to that of conventional recording paper.

If a color cathode ray tube is used as the display cathode ray tube, it will have much more expressive ability than the conventional recording paper type, which could only record in shading.
It is possible to display a large amount of information and display with high resolution, making it possible to realize an extremely high-performance detection and display device.

To display on a cathode ray tube, a memory element corresponding to one screen is usually required, and the contents of the memory element are repeatedly read out and displayed. On the other hand, detection information is generally stored in a separate storage element that can store only one piece of detection information, and then transferred and stored in the main memory.

Devices using this type of cathode ray tube display have high performance, but because the display screen is limited, they have the disadvantage that past records cannot be viewed as clearly as in recording paper.

For this reason, devices have already been put into practical use that enable long-time display by collecting detection information from multiple times and displaying it as a single display line.

Although long-time displays are convenient for making big-picture decisions, they do not allow the detailed time history to be seen and are used differently depending on the purpose; however, conventional displays, like recording paper, display information that has already been displayed. This did not suit the purpose, and even if I wanted to change the time history and display it, I could not, and I could only change the time history of the information to be detected from now on.

The present invention eliminates these drawbacks and makes it possible to change the time history by going backwards to past information, which was impossible with conventional paper-based recording, and allows for more time to monitor the display. Furthermore, the present invention proposes an extremely effective detection and display device that can prevent missing information due to erroneous operation by redoing the information.

This will be explained in detail below using the drawings. In FIG. 1, the output of the reference oscillator 1 is frequency-divided by a variable frequency divider circuit 2 to create a transmission pulse signal as shown in FIG. 3A.
The transmitter 3 is modulated and an ultrasonic pulse signal is emitted from the transducer 4 into the sea.

The ultrasonic pulse signal is reflected by a school of fish 5 in the sea or the seabed 6, and the reflected sound wave is received by the same transducer 4 used for transmission.

This signal is amplified and detected by the receiver 7 to obtain a transmission trigger signal 4a, a fish school signal 5a, a seabed signal 6a, etc. as shown in FIG. , is converted into a digital code according to its level.

The buffer memory 10 temporarily stores digitally coded detection information, which takes a time corresponding to the speed at which the ultrasonic wave propagates back and forth in the sea. That is, the time required to write and store data in the buffer memory 10 differs depending on the detection distance (or depth).

When one piece of detection information has been written to the buffer memory 10, that information is subsequently transferred and written to the main memory 11, which has a storage capacity of multiple detection information. This transfer is performed within the retrace period of the sub-scan of the cathode ray tube display 12, which performs surface scanning and display in the main scan and sub-scan. This situation will be explained using the waveforms in FIG. 3. FIG. 3C shows one detection period, and a rest period is provided before the next ultrasonic wave emission. FIG. 3D shows a clock signal for operating the address counter 17 of the buffer memory 10, which is generated by the control circuit 16 using the output of the variable frequency divider circuit 2. When the writing of the detection information in the buffer memory 10 is completed, the output of the sub-scanning signal generation circuit 15 (FIG. 3F) is applied to the control circuit 16, so the pause time of the waveform of FIG.
In the next sub-scanning signal that comes after Figure E), Figure 3G
As shown at 17b, a read clock for the buffer memory 10 is generated, and the information stored in the buffer memory 10 is sent to the main memory 11. The main memory 11 stores detection information transferred from the buffer memory many times, but for the sake of explanation, it is assumed here that it can store detection information for 4096 times.

On the other hand, the cathode ray tube display 12 receives the main scanning signal shown in FIG. The area is scanned using the sub-scanning signal shown in FIG. Therefore, the information displayed on one screen is
Main memory 1 stores detection information for 4096 times
1, that is, 256 times, are repeatedly read and displayed.

To read the clock to the address counter 26 of the main memory 11, the outputs of the main scanning signal generation circuit 14 and the sub-scanning signal generation circuit 15 are guided to the gate circuit 20 by the gate circuit 19 as shown in FIG. The signal shown in FIG. This read address counter 26 is 256
It is a counter for the amount of addresses corresponding to the detection information, and normally the readout clock shown in FIG.
The cathode ray tube display 12 repeatedly displays the same information for 256 pieces of detected information by controlling the main memory 11 through the main memory 11 via the main memory 11 via the main memory 11 via the main memory 11.

When new information is written from the buffer memory 10 to the main memory 11, the same clock as the read clock for the buffer memory 10 shown at 17b in FIG. 3G is also supplied to the address counter 18 during the sub-scanning signal period in FIG. 3F. be done.

The image displayed on the cathode ray tube display 12 in this way is, for example, as shown in FIG.
The oscillation signal 4a in Figure B is 51, the fish school and seabed signal 5
a, 6a are displayed as 52a and 53, and each time new detection information arrives, the image is displayed moving from right to left like recording paper being fed out.

The detection device configured as described above has already been put into practical use as a color fish finder that displays information using a color cathode ray tube.

Block numbers 26 to 32 in the configuration of FIG. 1 are for the present invention, and will be explained together with the display example of FIG. 2.

The address counter 18 for the main memory 11 in FIG. 1 has addresses for 4096 pieces of detection information, and when writing to the main memory 11 is controlled via the switching circuit 29, so that 4096 pieces of detection information are stored in the main memory. Suppose that if all of the images were displayed on a cathode ray tube display, the image would be as shown in FIG. 2B. Here, the number of lines displayed on the cathode ray tube display 12 is 256, so it is not possible to directly display all 4096 detected information as shown in FIG. 2B.

If the numerical value setter 30 is currently set to zero,
The output of the adder circuit 31 is the same as the output of the address counter 18, and the output of the adder circuit 28 is the sum of the address counter 18 and the read address counter 26. The read address counter 26 corresponds to a pixel of the cathode ray tube display 12 and cycles with an address capacity of 256 display lines. If the output of the adder circuit 28 is directly supplied to the main memory 11 via the switching circuit 29, the addresses to be read from the main memory 11 will be from the address of the address counter 18 to the address added by 256, and the displayed image will be The rightmost 1/16th of FIG. 2B is displayed to fill the screen as shown in FIG. 2A.

If new detection information is written to the main memory 11, the address counter 18 also advances by one detection information, so the address controlled for reading also advances by one detection information, and the displayed image moves.

Next, when the magnification setter 32 is set to 4, the value of the read address counter 26 is multiplied by 4 in the multiplier circuit 27, resulting in 0, 4, 8, 12...1016, 1020, and then the value of the address counter 18 is increased in the adder circuit 28. Since the main memory 11 is controlled by adding
One-fourth of the information from the right end of Figure B, that is, 256 pieces of information for every 4 out of 1024 pieces of detected information, is displayed to fill the entire screen as shown in Figure 2D.

Further, if the value setter 30 is set to 2048, the value is added to the value of the address counter 18 in the adder circuit 31, so that the left part from the center of FIG. 2B is displayed. 2048 if the magnification setting device 32 is set to 4
Since the area between 3068 and 3068 is displayed, it is displayed as shown in Figure 2C.

In this way, by setting the numerical value setter 30 to zero and the magnification setter 32 to 16, the display shown in FIG. 2B can also be achieved.

As explained above, by operating the numerical value setting device 30 and the magnification setting device 32, it is possible to freely select and display the time and time after which detection information has already passed, thereby preventing information from being overlooked due to operational errors. This makes it easy to analyze information that suits the purpose and is extremely effective. Note that when the magnification setting device 32 is operated, information in the main memory 11 is displayed intermittently, resulting in information leakage. In the case of long-term display, it is often sufficient to display information intermittently, but as a means to prevent information leakage, it is recommended to display the maximum information for each pixel of multiple detection information on a single display line. It will be done. The main memory 11 is usually a random access memory (RAM), but if its operating speed is sufficiently fast, the same detection distance information from multiple detection information is read out, and the information with the largest value among them is used to correspond to each display pixel. However, since this type of RAM is expensive, the method shown in FIG. 4 can be used even with low-speed RAM.

The main memory 11 shown in FIG. 4 has a storage capacity for 4096 pieces of detection information, but it is configured with 16×256 pieces of information, and when read out, 16 pieces of detection information are always output in parallel. Therefore, an address line is also connected to the signal processing circuit in order to select specific information from the 16 detected information. Furthermore, the magnification information is also supplied from the magnification setter 32 to the signal processing circuit 33, and the maximum value of specific plurality of information among the 16 detection information coming from the main memory 11 is displayed momentarily on the cathode ray tube display according to the magnification. Processing is controlled to supply the data to 12.

[Brief explanation of the drawing]

1 and 4 are concrete implementation configuration diagrams of the present invention, FIG. 2 A, B, C, and D are display examples of the display device according to the present invention, and FIG. 3 is a waveform for detailed explanation. Figures are shown respectively. 1...Reference oscillator, 2...Variable frequency divider circuit, 3...
...Transmitter, 4...Transducer, 5...Fish school, 6...
Undersea, 7...Receiver, 8...A-D conversion circuit, 1
0...Buffer memory, 11...Main memory,
12... Cathode ray tube display, 13... Frequency dividing circuit, 1
4...Main scanning signal generation circuit, 15...Sub-scanning signal generation circuit, 16...Control circuit, 17...Address counter, 18...Address counter, 19...
Gate circuit, 20... Gate circuit, 26... Read address counter, 27... Multiplication circuit, 28...
Addition circuit, 29...Switching circuit, 30...Numeric value setter, 31...Addition circuit, 32...Magnification setter, 3
3...Signal processing circuit, 50...Display screen, 51...
... Display of oscillation lines, 52a to 52e ... Display of fish schools,
53...Display ocean floor.

Claims (1)

[Scope of Claims] 1. Periodically arriving detection information is captured as digital information into a main memory via a buffer memory and stored therein, and the information stored in the main memory is periodically read out and supplied to a cathode ray tube display; In a detection display device that displays detection information as one display line on the display screen of the cathode ray tube display, arranging the detection information in the order of oldest detection information, the storage capacity of the main memory is determined by the display pixel capacity of the cathode ray tube display. The main memory is provided with means for storing detection signals of a number of times greater than the number of display lines of the cathode ray tube display in the main memory. A display time control display device characterized by being provided with a setting device for specifying a start address of a memory, and a magnification setting device for specifying skipping of addresses in a main memory for each plurality of times of detection information in order to read out detection information for each plurality of times. 2. Detection information that arrives periodically is captured and stored in the main memory via the buffer memory as digital information, and the stored information in the main memory is periodically read out and supplied to the cathode ray tube display, and the information on the cathode ray tube display is read out periodically. In a detection display device that displays detection information as one display line on a display screen arranged in order of oldest detection information, the storage capacity of the main memory is set larger than the display pixel capacity of the cathode ray tube display, and the cathode ray tube display It has means for storing a large number of detection signals in the main memory according to the number of display lines of the device, and when reading and displaying information in the main memory, the address of the main memory is read out for each detection information multiple times. The present invention is characterized by providing a magnification setting device for specifying skips for each of the plurality of skip addresses, and means for performing signal processing such as selecting the maximum value for each of the same detection distance information of the plurality of detection storage information between the skip addresses. Display time control display device.