JPS58171857A - Manufacture of thyristor - Google Patents
Manufacture of thyristorInfo
- Publication number
- JPS58171857A JPS58171857A JP5489382A JP5489382A JPS58171857A JP S58171857 A JPS58171857 A JP S58171857A JP 5489382 A JP5489382 A JP 5489382A JP 5489382 A JP5489382 A JP 5489382A JP S58171857 A JPS58171857 A JP S58171857A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- thyristor
- layers
- phosphorus
- ion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000011574 phosphorus Substances 0.000 claims abstract description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 7
- 238000009792 diffusion process Methods 0.000 abstract description 5
- 239000012535 impurity Substances 0.000 abstract description 5
- 238000002161 passivation Methods 0.000 abstract 1
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 238000005468 ion implantation Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 206010011224 Cough Diseases 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 241000270666 Testudines Species 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- -1 phosphorus ions Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1012—Base regions of thyristors
- H01L29/102—Cathode base regions of thyristors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thyristors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は特に、ゲート・トリガ電流(Ioテ)の大吉な
サイリスタの製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention is particularly concerned with a method of manufacturing a gate trigger current (Iote) thyristor.
サイリスタのIoyは、他411性を考慮して単にP。The Ioy of the thyristor is simply P in consideration of other characteristics.
−N=−1’、−N、 4層を形成すると、小さく10
μム以下である。また従来より、 IGTを大きくする
九めに、公知の光学的手段を用いて1シリコン酸化膜−
選択的に点状に、酸化層を残し%Nl[域と、なるリン
等を拡散し、部分的にsNが、入らない領域を形成さ−
ItQj法”とられ1パる・し力:−力゛ら腋方法でs
IQ管が敵μム〜1m五掘度のサイリス′を再現性
1〈製造すザとは非常に困M″c′また。-N=-1', -N, if 4 layers are formed, it will be small 10
It is less than μm. Furthermore, conventionally, as a ninth step to increase the size of IGT, one silicon oxide film was formed using known optical means.
Selectively diffuse phosphorus, etc., leaving an oxidized layer in a dot-like manner, leaving an oxide layer in the %Nl [region], and partially forming a region where sN does not enter.
ItQj method is taken from the armpit.
The IQ tube has a reproducibility of 1m to 1m, and it is very difficult to manufacture it.
本発明め目的はこのI・!が数μム〜1mA程度のサイ
リスタを再現性良く製造する方法を提供することにある
。The purpose of this invention is this I! The object of the present invention is to provide a method for manufacturing a thyristor with a voltage of several μm to 1 mA with good reproducibility.
本発明の特徴は、P−N−P−NO4層からなるサイリ
スクの製造方法において%P1−Nl−P、−N、の4
層を形成し九後に、ゲート28層の表面に、エミッタN
1層下部における*&よりも低い濃度の層を形成すべく
、リンをイオン注入する工程と咳リンを熱拡散する工程
を有するサイリスタの製造方法にある。The feature of the present invention is that in the method for manufacturing cyrisk consisting of 4 layers of P-N-P-NO, %P1-Nl-P, -N, 4
After nine layers are formed, the emitter N is placed on the surface of the gate 28 layer.
A method for manufacturing a thyristor includes a step of ion-implanting phosphorus and a step of thermally diffusing cough phosphorus in order to form a layer with a lower concentration than *& in the lower part of the first layer.
本発明によればs IoTtが数μム〜1mA程度の
すイリスタも容易に製造できる。According to the present invention, it is possible to easily manufacture a swiristor having an s IoTt of several μm to 1 mA.
次に1図面を用いて本発明の詳細な説明する。Next, the present invention will be explained in detail using one drawing.
第1図(a)、伽)は、従来の方法によるサイリスタで
第1図(a)は小さな!Gテの場合、第1図伽)紘大き
なrayの場合する・□第2図(−は・本発明0ニ実施
例の製造方法によるサイリスタO断面図、亀2図伽)は
そのP、N、接合表面の拡大図である。亀3a(a)〜
(・)に主要な製法頴を示す。まず従来の方法にて、小
さいI・!となるP、N、P、N、構造を形成する(第
3図(−)。次に、P、層2の表面にリンをイオン注入
する(第3−6))。この時N■P■接合のP、側の表
面にイオン注入し、みかけの不純物濃度の低い11層8
を形成するのであるが、イオン注入は、P雪表面N、表
面に対し全面であっても、部分的でありてもよい。腋P
1層の海さと減面濃度のコント胃−ルの為に熱拡散を行
なう(第3図(C))。この後バッジページ■ン、電極
工Iit経て、本発明によるサイリスクができる。Figure 1(a), 弽) shows a thyristor made by the conventional method, and Figure 1(a) is small! In the case of GTE, Fig. 1 (Fig. 1) is used, and in the case of a large ray, □ Fig. 2 (- is a cross-sectional view of the thyristor O manufactured by the manufacturing method of the embodiment of the present invention, Fig. 2 (Fig. 2) shows its P, N , is an enlarged view of the bonding surface. Turtle 3a(a)~
Main manufacturing methods are shown in parentheses. First, using the conventional method, small I・! A P, N, P, N structure is formed (FIG. 3 (-). Next, phosphorus ions are implanted into the surface of the P layer 2 (3-6)). At this time, ions are implanted into the P side surface of the N■P■ junction, and the 11 layer 8 with a low apparent impurity concentration is
However, the ion implantation may be performed on the entire surface of the P snow surface N or on a partial surface. Armpit P
Heat diffusion is performed to control the one-layer ocean and surface concentration (Figure 3 (C)). After this, the badge page and the electrode work are completed, and the silicon risk according to the present invention is completed.
次に、本発明によるサイリスタの理論を簡単に説明する
。第3図(e)において、P、層8のみかけの不純物濃
度は、N8層直下の28層の不純物濃度より低く、コン
)レールされている。N、 P、接合とs N*P*接
合を比べると5NzPa接合の方が接触電位差V、が小
さい。従って、ゲー)6に正。Next, the theory of the thyristor according to the present invention will be briefly explained. In FIG. 3(e), the apparent impurity concentration of the P layer 8 is lower than the impurity concentration of the 28 layers immediately below the N8 layer, and is compared to the impurity concentration of the 28 layers immediately below the N8 layer. When comparing the N, P junction and the s N*P* junction, the contact potential difference V is smaller in the 5NzPa junction. Therefore, game) 6 is correct.
カソード5に負の電圧管印加し九場合、低い電流領域に
おいては、始めに馬P、接合で流れる。このように、サ
イリスタのトリガに無効な、表面電流を流すことにより
、IGテが大きくなる。When a negative voltage is applied to the cathode 5, in the low current region, the current initially flows at the junction P. In this way, by causing a surface current that is ineffective in triggering the thyristor to flow, the IG temperature increases.
従って、イオン注入のドーズ量、熱拡散の条件の選択に
より21層の濃度を認意にコント田−ルすることにより
s IG?が数岸五〜1mA程度のサイリスクも容易
に、再現性より製造することができる。Therefore, by controlling the concentration of the 21st layer by selecting the ion implantation dose and thermal diffusion conditions, the s IG? A current of about 5 to 1 mA can be easily manufactured with good reproducibility.
第1図(a)は、従来の1.テの小さいサイリスタの断
面図、第1図伽)は従来のIO?の大きいサイリスタの
断面図、第2図(a)は、本発明の実施例によるサイリ
スタの断面図、第2図伽)はそのP、 N、接合表面の
拡大図、第3図−)〜(@)は1本発明のサイリスタ゛
の製法を工程順に示すサイリスタのN、 P、 P。
層の拡大図、である。
なお図において、l・・・°・・高濃度のN、層、2°
°°°°。
23層(ボロン又はガリウム拡散)、3・・・・・・低
濃度のN1層(Nll基板)、4・・・・・・28層(
ボロン又はガリウム拡散)%5・・・・・・カソード電
極、6・・・・・・ゲート電極、7・・・・・・アノー
ド電極、8・・・・・・低義度のP。
層(リンのイオン注入)、である。FIG. 1(a) shows the conventional 1. A cross-sectional view of a thyristor with a small diameter (Fig. 1) is a conventional IO? 2(a) is a cross-sectional view of a thyristor according to an embodiment of the present invention; FIG. 2(a) is an enlarged view of its P, N, and bonding surfaces; FIG. @) indicates the manufacturing method of the thyristor of the present invention in the order of steps. N, P, P of the thyristor. This is an enlarged view of the layers. In the figure, l...°...high concentration N, layer, 2°
°°°°. 23 layers (boron or gallium diffusion), 3...low concentration N1 layer (Nll substrate), 4...28 layers (
boron or gallium diffusion)% 5... cathode electrode, 6... gate electrode, 7... anode electrode, 8... low definition P. layer (phosphorous ion implantation).
Claims (1)
において、P、−N、−P、−N、04層を形成した後
にゲー)h層の表面にエミッタN1層下部における濃度
よりも低い濃度の層管形成すべくリンをイオン注入する
工程と、該リンを熱拡散する工程を有することを特徴と
するすイリスタの製造方法。In the thyristor Oa+ method consisting of four layers of P-N-P-N, after forming the P, -N, -P, -N, and 04 layers, the concentration on the surface of the Gh layer is higher than that in the lower part of the emitter N1 layer. 1. A method for manufacturing an iris star, comprising the steps of ion-implanting phosphorus to form a layer tube with a low concentration, and thermally diffusing the phosphorus.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5489382A JPS58171857A (en) | 1982-04-02 | 1982-04-02 | Manufacture of thyristor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5489382A JPS58171857A (en) | 1982-04-02 | 1982-04-02 | Manufacture of thyristor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58171857A true JPS58171857A (en) | 1983-10-08 |
Family
ID=12983272
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5489382A Pending JPS58171857A (en) | 1982-04-02 | 1982-04-02 | Manufacture of thyristor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58171857A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5079175A (en) * | 1989-12-19 | 1992-01-07 | Eupec Europaeische Gesellsch. F. Liestungshalbleiter Mbh+Co. Kg | Process for the manufacture of short circuits on the anode side of thyristors |
-
1982
- 1982-04-02 JP JP5489382A patent/JPS58171857A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5079175A (en) * | 1989-12-19 | 1992-01-07 | Eupec Europaeische Gesellsch. F. Liestungshalbleiter Mbh+Co. Kg | Process for the manufacture of short circuits on the anode side of thyristors |
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