JPS58165427A - Ｐｌｌ発振器制御回路 - Google Patents

Ｐｌｌ発振器制御回路

Info

Publication number
JPS58165427A
JPS58165427A JP57048521A JP4852182A JPS58165427A JP S58165427 A JPS58165427 A JP S58165427A JP 57048521 A JP57048521 A JP 57048521A JP 4852182 A JP4852182 A JP 4852182A JP S58165427 A JPS58165427 A JP S58165427A
Authority
JP
Japan
Prior art keywords
frequency
divider
output
pll
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57048521A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0224414B2 (enrdf_load_stackoverflow
Inventor
Yoshinori Kameyama
亀山　義典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaesu Musen Co Ltd
Original Assignee
Yaesu Musen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaesu Musen Co Ltd filed Critical Yaesu Musen Co Ltd
Priority to JP57048521A priority Critical patent/JPS58165427A/ja
Publication of JPS58165427A publication Critical patent/JPS58165427A/ja
Publication of JPH0224414B2 publication Critical patent/JPH0224414B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP57048521A 1982-03-26 1982-03-26 Ｐｌｌ発振器制御回路 Granted JPS58165427A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57048521A JPS58165427A (ja) 1982-03-26 1982-03-26 Ｐｌｌ発振器制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57048521A JPS58165427A (ja) 1982-03-26 1982-03-26 Ｐｌｌ発振器制御回路

Publications (2)

Publication Number Publication Date
JPS58165427A true JPS58165427A (ja) 1983-09-30
JPH0224414B2 JPH0224414B2 (enrdf_load_stackoverflow) 1990-05-29

Family

ID=12805654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57048521A Granted JPS58165427A (ja) 1982-03-26 1982-03-26 Ｐｌｌ発振器制御回路

Country Status (1)

Country Link
JP (1) JPS58165427A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943634A (ja) * 1982-09-06 1984-03-10 Trio Kenwood Corp Ｐｌｌ周波数シンセサイザ
US5193013A (en) * 1990-05-29 1993-03-09 Olive Tree Technology, Inc. Scanner with non-linearity compensating pixel clock

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412209A (en) * 1977-06-28 1979-01-29 Alps Electric Co Ltd Pll tv tuner

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412209A (en) * 1977-06-28 1979-01-29 Alps Electric Co Ltd Pll tv tuner

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943634A (ja) * 1982-09-06 1984-03-10 Trio Kenwood Corp Ｐｌｌ周波数シンセサイザ
US5193013A (en) * 1990-05-29 1993-03-09 Olive Tree Technology, Inc. Scanner with non-linearity compensating pixel clock

Also Published As

Publication number Publication date
JPH0224414B2 (enrdf_load_stackoverflow) 1990-05-29

Similar Documents

Publication Publication Date Title
US4573026A (en) FM Modulator phase-locked loop with FM calibration
US4940950A (en) Frequency synthesis method and apparatus using approximation to provide closely spaced discrete frequencies over a wide range with rapid acquisition
JPS63219225A (ja) クロック信号発生器
JP2000509219A (ja) 温度補償および周波数逓倍機能を備えた周波数シンセサイザおよびその製造方法
JPS61245629A (ja) Ｎ分数型周波数シンセサイザ
JPS5825724A (ja) 広帯域周波数シンセサイザ
US4931749A (en) Phase locked loop sweep frequency synthesizer
CN112425077A (zh) 直接调制合成器的高级多增益校准
JPS58165427A (ja) Ｐｌｌ発振器制御回路
US4119925A (en) Frequency synthesizer with frequency modulated output
SU1483632A1 (ru) Цифровой синтезатор частот
JP3144501B2 (ja) 周波数シンセサイザ
SU416839A1 (enrdf_load_stackoverflow)
JPH0323717A (ja) 信号発生装置
SU1283964A1 (ru) Синтезатор частот
JPH0754905B2 (ja) Ｐｌｌシンセサイザ回路
SU1515364A1 (ru) Цифровой синтезатор частоты
JPH03273712A (ja) Ｐｌｌ回路
RU2071173C1 (ru) Квантовый стандарт частоты
SU657575A1 (ru) Устройство дл автоматической подстройки частоты
JPH02235410A (ja) 発振回路
JPH02233019A (ja) 周波数シンセサイザ
SU849414A1 (ru) Цифровой синтезатор частот
SU1022312A1 (ru) Синтезатор частот
SU995337A1 (ru) Генератор