JPS58150394A - 加入者回路の誤制御防止方法 - Google Patents

加入者回路の誤制御防止方法

Info

Publication number
JPS58150394A
JPS58150394A JP3272282A JP3272282A JPS58150394A JP S58150394 A JPS58150394 A JP S58150394A JP 3272282 A JP3272282 A JP 3272282A JP 3272282 A JP3272282 A JP 3272282A JP S58150394 A JPS58150394 A JP S58150394A
Authority
JP
Japan
Prior art keywords
data
control
circuit
frame
subscriber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3272282A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0224080B2 (enrdf_load_stackoverflow
Inventor
Wataru Takeuchi
竹内　亘
Akira Takei
章 武井
Ichio Kawasaki
川崎　市雄
Shiro Enami
榎並　史朗
Kazuhiko Ito
和彦 伊東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP3272282A priority Critical patent/JPS58150394A/ja
Publication of JPS58150394A publication Critical patent/JPS58150394A/ja
Publication of JPH0224080B2 publication Critical patent/JPH0224080B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP3272282A 1982-03-02 1982-03-02 加入者回路の誤制御防止方法 Granted JPS58150394A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3272282A JPS58150394A (ja) 1982-03-02 1982-03-02 加入者回路の誤制御防止方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3272282A JPS58150394A (ja) 1982-03-02 1982-03-02 加入者回路の誤制御防止方法

Publications (2)

Publication Number Publication Date
JPS58150394A true JPS58150394A (ja) 1983-09-07
JPH0224080B2 JPH0224080B2 (enrdf_load_stackoverflow) 1990-05-28

Family

ID=12366728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3272282A Granted JPS58150394A (ja) 1982-03-02 1982-03-02 加入者回路の誤制御防止方法

Country Status (1)

Country Link
JP (1) JPS58150394A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224629A (ja) * 1985-03-29 1986-10-06 Hitachi Ltd 時分割集線装置におけるフレ−ム同期装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224629A (ja) * 1985-03-29 1986-10-06 Hitachi Ltd 時分割集線装置におけるフレ−ム同期装置

Also Published As

Publication number Publication date
JPH0224080B2 (enrdf_load_stackoverflow) 1990-05-28

Similar Documents

Publication Publication Date Title
US3806881A (en) Memory arrangement control system
EP1087296B1 (en) Word width selection for SRAM cache
EP0569755A1 (en) Memory device with redundant disk array
EP0862761B1 (en) Data error detection and correction for a shared sram
JPS58150394A (ja) 加入者回路の誤制御防止方法
WO1981002480A1 (en) Memory addressing apparatus and method
US5748555A (en) Memory address preview control circuit
JP2845187B2 (ja) 半導体記憶装置
US4310902A (en) Information storage arrangements
JPH0340417B2 (enrdf_load_stackoverflow)
JPH0115900B2 (enrdf_load_stackoverflow)
JPH11184761A (ja) リードモディファイライト制御システム
JPH024020B2 (enrdf_load_stackoverflow)
JPH01195552A (ja) メモリアクセス制御方式
JPH01273154A (ja) Ｅｃｃ回路付記憶装置
KR100389760B1 (ko) 아이피씨용 에프아이에프오의 번지 관리 시스템 및 방법
SU1336109A1 (ru) Запоминающее устройство с многоформатным доступом к данным
JPH02137044A (ja) メモリ装置
SU1203527A1 (ru) Устройство дл формировани адреса данных
JPS59132299A (ja) 誤り制御防止方式
JPS5897084A (ja) フォントメモリアクセス回路
JPH08328960A (ja) キャッシュメモリ装置
JPH04344968A (ja) マルチプロセッサにおける高速同報通信方式
JPH0319975B2 (enrdf_load_stackoverflow)
JPS6389951A (ja) キヤツシユメモリ装置