JPS58150161U - Card type data processing device - Google Patents

Card type data processing device

Info

Publication number
JPS58150161U
JPS58150161U JP4558082U JP4558082U JPS58150161U JP S58150161 U JPS58150161 U JP S58150161U JP 4558082 U JP4558082 U JP 4558082U JP 4558082 U JP4558082 U JP 4558082U JP S58150161 U JPS58150161 U JP S58150161U
Authority
JP
Japan
Prior art keywords
connection terminals
card
processing device
data processing
type data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4558082U
Other languages
Japanese (ja)
Other versions
JPS622702Y2 (en
Inventor
山縣 真人
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP4558082U priority Critical patent/JPS58150161U/en
Publication of JPS58150161U publication Critical patent/JPS58150161U/en
Application granted granted Critical
Publication of JPS622702Y2 publication Critical patent/JPS622702Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す配置図、第2図は第1
図の断面図、第3図は本考案の他の実施例の配置図、第
4図は第3図の断面図、第5図は本考案に用いられるカ
ードの他の例を示す斜視図、   ・第6図は本考案装
置の回路部を示すブロック線図、第7図、第8図及び第
9図は第5図のカードのそれぞれ■−■′線上、■−■
′線上及びIX−IX′線上の断面図である。 1はカード、2はカード処理装置、2Aはその信号処理
装置、T11〜T15は第1の複数の接続端子、T21
〜T25は第2の複数の接続端子、そのうちT□5は電
源電圧入力用接続端子、T25は電源電圧出力用接続端
子である。
Fig. 1 is a layout diagram showing one embodiment of the present invention, and Fig. 2 is a layout diagram showing an embodiment of the present invention.
3 is a layout diagram of another embodiment of the present invention, FIG. 4 is a sectional view of FIG. 3, and FIG. 5 is a perspective view showing another example of a card used in the present invention.・Figure 6 is a block diagram showing the circuit section of the device of the present invention, and Figures 7, 8, and 9 are on the ■-■' line and ■-■ of the card in Figure 5, respectively.
FIG. 1 is a card, 2 is a card processing device, 2A is its signal processing device, T11 to T15 are first plural connection terminals, T21
-T25 are a plurality of second connection terminals, among which T□5 is a connection terminal for power supply voltage input, and T25 is a connection terminal for power supply voltage output.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] データ記憶用メモリを含む半導体回路及び該半導体回路
に接続された第1の複数の接続端子を具備するカードと
、該カードの上記第1の複数の接続端子に接続されるよ
うに対応して設けられた第2の複数の接続端子及び該第
2の複数の接続端子に接続された信号処理回路を具備す
るカード処理装置とを有する上記カード式データ処理装
置に於いて、上記第1の複数の接続端子は電源電圧入力
用接続端子を含み、上記第2の複数の接続端子は電源電
圧出力用接続端子を含み、上記電源電圧入力用及び出力
用接続端子は上記第1及び第2の複数の接続端子のうち
の残りの接続端子に比し接続開始点が遅れるように配さ
れて成るカード式データ処理装置。
A card comprising a semiconductor circuit including a data storage memory and a first plurality of connection terminals connected to the semiconductor circuit; and a card correspondingly provided to be connected to the first plurality of connection terminals of the card. and a card processing device comprising a second plurality of connection terminals connected to the second plurality of connection terminals and a signal processing circuit connected to the second plurality of connection terminals. The connection terminals include power supply voltage input connection terminals, the second plurality of connection terminals include power supply voltage output connection terminals, and the power supply voltage input and output connection terminals include the first and second plurality of connection terminals. A card-type data processing device in which connection terminals are arranged so that the connection start point is delayed compared to the remaining connection terminals.
JP4558082U 1982-03-30 1982-03-30 Card type data processing device Granted JPS58150161U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4558082U JPS58150161U (en) 1982-03-30 1982-03-30 Card type data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4558082U JPS58150161U (en) 1982-03-30 1982-03-30 Card type data processing device

Publications (2)

Publication Number Publication Date
JPS58150161U true JPS58150161U (en) 1983-10-07
JPS622702Y2 JPS622702Y2 (en) 1987-01-22

Family

ID=30056593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4558082U Granted JPS58150161U (en) 1982-03-30 1982-03-30 Card type data processing device

Country Status (1)

Country Link
JP (1) JPS58150161U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6348685A (en) * 1986-08-18 1988-03-01 Tokyo Electric Co Ltd Memory card device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6348685A (en) * 1986-08-18 1988-03-01 Tokyo Electric Co Ltd Memory card device

Also Published As

Publication number Publication date
JPS622702Y2 (en) 1987-01-22

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