JPS58151999U - card - Google Patents

card

Info

Publication number
JPS58151999U
JPS58151999U JP4757982U JP4757982U JPS58151999U JP S58151999 U JPS58151999 U JP S58151999U JP 4757982 U JP4757982 U JP 4757982U JP 4757982 U JP4757982 U JP 4757982U JP S58151999 U JPS58151999 U JP S58151999U
Authority
JP
Japan
Prior art keywords
card
semiconductor circuit
connection terminals
zener diode
data storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4757982U
Other languages
Japanese (ja)
Inventor
山懸 真人
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP4757982U priority Critical patent/JPS58151999U/en
Publication of JPS58151999U publication Critical patent/JPS58151999U/en
Pending legal-status Critical Current

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  • Credit Cards Or The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す斜視図、第2図はその
回路部を示すブロック線図、第3図、第4図及び第5図
は夫々第1図のm−m’綿線上■−IV’線上及びv−
v’縁線上断面図である。 1はカード、3は半導体回路、9はメモリ、T11〜T
15は複数の接続端子、そのうちT15は共通接続端子
、D□〜D、はツェナーダイオードである。
FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 is a block diagram showing the circuit section, and FIGS. On the line ■-IV' and v-
It is a sectional view on the v' edge line. 1 is a card, 3 is a semiconductor circuit, 9 is a memory, T11 to T
Reference numeral 15 indicates a plurality of connection terminals, among which T15 is a common connection terminal, and D□ to D are Zener diodes.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] データ記憶用メモリを含む半導体回路及び該半導体回路
に接続された複数の接続端子を有するカードに於いて、
上記半導体回路にツェナーダイオードを設け、該ツェナ
ーダイオードを上記複数の接続端子中の共通接続端子及
び残りの接続端子間に接続して成るカード。
In a card having a semiconductor circuit including a data storage memory and a plurality of connection terminals connected to the semiconductor circuit,
A card comprising: a Zener diode provided in the semiconductor circuit; and the Zener diode is connected between a common connection terminal and the remaining connection terminals among the plurality of connection terminals.
JP4757982U 1982-04-01 1982-04-01 card Pending JPS58151999U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4757982U JPS58151999U (en) 1982-04-01 1982-04-01 card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4757982U JPS58151999U (en) 1982-04-01 1982-04-01 card

Publications (1)

Publication Number Publication Date
JPS58151999U true JPS58151999U (en) 1983-10-12

Family

ID=30058533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4757982U Pending JPS58151999U (en) 1982-04-01 1982-04-01 card

Country Status (1)

Country Link
JP (1) JPS58151999U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54770U (en) * 1977-06-04 1979-01-06
JPS5640675B2 (en) * 1973-12-27 1981-09-22
JPS5651196B2 (en) * 1975-12-30 1981-12-03

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5640675B2 (en) * 1973-12-27 1981-09-22
JPS5651196B2 (en) * 1975-12-30 1981-12-03
JPS54770U (en) * 1977-06-04 1979-01-06

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