JPS58150114A - ディジタル変調装置 - Google Patents

ディジタル変調装置

Info

Publication number
JPS58150114A
JPS58150114A JP57033392A JP3339282A JPS58150114A JP S58150114 A JPS58150114 A JP S58150114A JP 57033392 A JP57033392 A JP 57033392A JP 3339282 A JP3339282 A JP 3339282A JP S58150114 A JPS58150114 A JP S58150114A
Authority
JP
Japan
Prior art keywords
pulse
modulation
circuit
mfm
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57033392A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0452656B2 (enExample
Inventor
Masatoshi Shinpo
正利 新保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57033392A priority Critical patent/JPS58150114A/ja
Publication of JPS58150114A publication Critical patent/JPS58150114A/ja
Publication of JPH0452656B2 publication Critical patent/JPH0452656B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP57033392A 1982-03-02 1982-03-02 ディジタル変調装置 Granted JPS58150114A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57033392A JPS58150114A (ja) 1982-03-02 1982-03-02 ディジタル変調装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57033392A JPS58150114A (ja) 1982-03-02 1982-03-02 ディジタル変調装置

Publications (2)

Publication Number Publication Date
JPS58150114A true JPS58150114A (ja) 1983-09-06
JPH0452656B2 JPH0452656B2 (enExample) 1992-08-24

Family

ID=12385314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57033392A Granted JPS58150114A (ja) 1982-03-02 1982-03-02 ディジタル変調装置

Country Status (1)

Country Link
JP (1) JPS58150114A (enExample)

Also Published As

Publication number Publication date
JPH0452656B2 (enExample) 1992-08-24

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