JPS58147118A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58147118A
JPS58147118A JP57029931A JP2993182A JPS58147118A JP S58147118 A JPS58147118 A JP S58147118A JP 57029931 A JP57029931 A JP 57029931A JP 2993182 A JP2993182 A JP 2993182A JP S58147118 A JPS58147118 A JP S58147118A
Authority
JP
Japan
Prior art keywords
wafer
orientation
cutaway
facets
facet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57029931A
Other languages
English (en)
Japanese (ja)
Other versions
JPH032337B2 (enrdf_load_stackoverflow
Inventor
Masanori Sato
正憲 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57029931A priority Critical patent/JPS58147118A/ja
Publication of JPS58147118A publication Critical patent/JPS58147118A/ja
Publication of JPH032337B2 publication Critical patent/JPH032337B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP57029931A 1982-02-26 1982-02-26 半導体装置の製造方法 Granted JPS58147118A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57029931A JPS58147118A (ja) 1982-02-26 1982-02-26 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57029931A JPS58147118A (ja) 1982-02-26 1982-02-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58147118A true JPS58147118A (ja) 1983-09-01
JPH032337B2 JPH032337B2 (enrdf_load_stackoverflow) 1991-01-14

Family

ID=12289730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57029931A Granted JPS58147118A (ja) 1982-02-26 1982-02-26 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58147118A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH032337B2 (enrdf_load_stackoverflow) 1991-01-14

Similar Documents

Publication Publication Date Title
US5125791A (en) Semiconductor object pre-aligning method
US5238354A (en) Semiconductor object pre-aligning apparatus
JPS6130420B2 (enrdf_load_stackoverflow)
CN102347276A (zh) 切削方法
JPH04284647A (ja) ウエハの中心位置検出方法及びその装置
US5716876A (en) Method for manufacturing completely circular semiconductor wafers
WO2016107080A1 (zh) 对位设备及对位方法
CN108292623A (zh) 晶圆对准方法以及使用该方法的对准设备
JPS58147118A (ja) 半導体装置の製造方法
JPH05343294A (ja) 縮小投影露光装置
JP2010287816A (ja) 基板の位置合わせ装置、及び基板の位置合わせ方法
JP3058289B2 (ja) ウエハのプリアライメント方式
US7072441B2 (en) Alignment diffractometer
JP4440808B2 (ja) 外周研削装置及び貼り合わせ基板の研削方法
JPS6245039A (ja) 円形板状物体の角度位置決め装置
JPH05308098A (ja) ウエハの位置合わせ装置
JPH01209740A (ja) 半導体基板の位置決め方法
JPS63155722A (ja) 露光装置
JPH02234417A (ja) スピンコーティング方法
JPS62279652A (ja) 単結晶基板
JPS6081613A (ja) ウエハ整合装置
JPH03108315A (ja) ウエハ周辺露光方法
JPS6245041A (ja) 円形板状物体の位置決め装置
JPS6351976A (ja) 塗布装置
JPS63102314A (ja) 多層レジストプロセスにおけるアライメント方法