JPS58145144A - Wafers conveying device - Google Patents
Wafers conveying deviceInfo
- Publication number
- JPS58145144A JPS58145144A JP2722982A JP2722982A JPS58145144A JP S58145144 A JPS58145144 A JP S58145144A JP 2722982 A JP2722982 A JP 2722982A JP 2722982 A JP2722982 A JP 2722982A JP S58145144 A JPS58145144 A JP S58145144A
- Authority
- JP
- Japan
- Prior art keywords
- lane
- carrier
- conveyed
- wafers
- robot
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67715—Changing the direction of the conveying path
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
- H01L21/67225—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one lithography chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67727—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations using a general scheme of a conveying path within a factory
Abstract
Description
【発明の詳細な説明】
て、半導体ウド・・−スを処理工程順に前段の製l告装
置から俊段の製造装置ヘコンビー・一タ利側1によ!l
l1賎械的に搬送するようにl〜だウエハース搬送装置
雄シこ関するものである。DETAILED DESCRIPTION OF THE INVENTION Semiconductor wood... is transferred in the order of the processing steps from the manufacturing equipment at the previous stage to the manufacturing equipment at Shundan on the Conbee Ichitari side 1! l
This relates to a wafer transport device for mechanically transporting wafers.
十専坏つエハース処理下程は、フォl− IJソグラフ
ィゾロセス、エノチンクプロセス、拡に’l 7−ロ七
ス、メタリ七一ンヨ/プロセス等の種々のプロセスか1
っ族1ン一っており、これらか11m次くり返さ扛で、
半導体装置が作り出されイ)、、
に記プロセス処理を行なうた.!7)数多くの専14]
の゛1′.導体持潰装置かフロア十V(配置されろ。The lower stages of wafer processing include various processes such as FOL-IJ lithography process, ENOTINC process, wide-ranging process, metallurgical process, etc.
There was one group, and these were repeated for 11 meters,
A semiconductor device was created and the processes described in (a) and (b) were performed. ! 7) Numerous specialized 14]
No゛1'. Conductor crushing device or floor 10V (placed).
半導体ウド・・−ス(t’Cは男常に依卸1なJJl.
1か;酊なわれ、また非常に高純IWのカス処1!I(
か行なわItろため、半導体製造装置か置かノ″1−ろ
フロアは、怜JJ巧t′1、、ゴミを・少なり′1″ろ
心安があり、谷’114’.+体喪コ告装置(まJ用ゼ
■、クリ− ンルーノ、と呼は7する1t91仙ドtウ
エ・・−ス処理′室内に設置されろ。Semiconductor software...
1? Drunk and also a very pure IW dregs 1! I(
The 1st floor, where semiconductor manufacturing equipment is placed, should be cleaned with a little bit of trash for peace of mind. + Mourning notification device (also known as Clean Runo) should be installed in the 1t91 Sendo Wax Processing Room.
ftt米、こI−1,らの半導、q体製造装置′σを用
いてウ−1・・−スを・処理する用台、装置間のウド・
・−区の搬θユは人11」]か行なっていた。その具体
的な例奮第1ン11′ζ乱いて説明する3,第1図は、
従来の半・、9庫1,シー・ハー ス処理1−: 1−
′(Iのうち、ノAトリソタラノイ1イ゛,′のフロア
レイアウトを7J<−すものである。タリー/ノ1−ム
1の中1′(、半導体製造装置絃とし,てフ−A1・し
/ストのセシ町イ1〕ゾリベーク装置62、1」台=g
尾r9 5、5、現像装jび4、外観倹青装置5が配
置6さ,tしてぃる。各装置?tではウェハースを収納
1〜たキ)・リアをローダ−6にセy l□ L 、空
のギヤリアをアンローダ−7にセットし、ローダ−6か
らアンロータ7に向けて実線の矢印で示すように、ウェ
ハースが1枚rつ搬送され、途中プロセスが処理される
1゜処理が終了すると、人間がウェ・・−スの収納され
たキャリアを次の処理装+、t vc破線で示す順にし
たがって運んでいく。ftt U.S., I-1, et al.'s semiconductor, q-body manufacturing equipment 'σ' is used to process the ooze, and the ooze between the equipment.
・-The ward's transportation was carried out by 11 people. 3, Figure 1, which will be explained in detail in the first example, is as follows:
Conventional half, 9 storage 1, Sea hearth processing 1-: 1-
(Of I, the floor layout of No. A trisotaranoi 1,' is 7J<-. 1] Zollibake device 62, 1 = g
The tail r9 5, 5, the developing device 4, and the appearance thinning device 5 are arranged 6, t. Each device? At t, store the wafers (1 to 1), set the rear to the loader 6, set the empty gear rear to the unloader 7, and move from the loader 6 to the unrotor 7 as shown by the solid arrow. , one wafer is transported and intermediate processes are processed. 1° When the processing is completed, a person carries the carrier containing the wafers to the next processing equipment +, t vc in the order shown by the broken line. I'll go.
以上のように、従来のウェ・・−ス処理工程は装置間を
人間がウニ・・−スを運ぶため、多くの工数を必要とし
、またウニ・・−スへのコミ、汚れの装着を直重するだ
めの高価なりリーンルームも人間の歩く空間を含めた広
いフロアを必要とした。また人間はゴミの発生源ともな
るため、人間から発生したゴミかウェー・−スに句膚し
、歩留の低Fの要因どなっていた。As mentioned above, the conventional waste treatment process requires a lot of man-hours because people carry the sea urchins between devices, and it also causes dust and dirt to get on the sea urchins. Lean rooms, which are expensive to carry directly on top of each other, require a large floor space that includes space for people to walk. In addition, since humans are also a source of garbage, the amount of garbage generated by humans is a major factor in low F yields.
一方、最近は無人化、省クリーンルー ムスペースを目
的としたインライン方式と呼ばれる半導体製造装置が作
られている。1これを第2図に示す。On the other hand, recently, semiconductor manufacturing equipment called in-line method has been created with the aim of being unmanned and saving clean room space. 1 This is shown in Figure 2.
しかし、インライン方式ではウェハース処理能力は最も
少ない&taで制限され、第1図および第2図を比較す
ると、第1図では最も処理能ノ戸ノ)少ない目金露光機
6,6を2台配を臂しているの(Ic %j L、、第
2図のインライン方式では目金露光機6は1台しかない
ため、第1図と同一処理能力を持だ七″るには、2シス
テムのインライン装置が必要となる。However, in the in-line method, the wafer processing capacity is limited by the minimum &ta, and when comparing Fig. 1 and Fig. 2, it is found that in Fig. (Ic %j L,) In the in-line system shown in Figure 2, there is only one eyelid exposure machine 6, so in order to have the same processing capacity as in Figure 1, two systems are required. In-line equipment is required.
またインライン方式ではいずれかの装置が故障すると全
ての処理プロセスか停止)−するため、装置の稼動率を
下(する欠点があった。また、いずれかの装置を交換す
る場合、連結する他のプロセス処理装置にまで影響を及
は1−ため、レイアウトの自由度が1会めて低いという
欠点があった。In addition, in the in-line method, if any device fails, the entire processing process stops), which has the disadvantage of lowering the device's operating rate.Also, when replacing any device, it is necessary to replace the other connected devices. This has the disadvantage that the degree of freedom in layout is extremely low because it affects the process equipment.
本発明は前記問題点を解消するもので、ウェノ・−スの
搬送と無人化し、同時にクリーンルームスペースを削減
し、1青白度の高い装置レイアウト金可能とするウェハ
ースの搬送装置を提供することを目白つとするものであ
る。The present invention aims to solve the above-mentioned problems, and aims to provide a wafer transfer device that allows wafer transfer to be carried out unmanned, reduces clean room space, and enables an equipment layout with high whiteness. This is one thing.
以−ト、本発明の一実施例を図面VCよって説明する。An embodiment of the present invention will now be described with reference to drawing VC.
第6図において、本発明は、半導体ウェハースを収納し
たキャリア9を一定方向に搬送する第1のレ−/10と
、第1のレーンから選択的に取り出されたキャリアを半
導体製造装置に搬送する、射2のレーン11と、半導体
製造装置からキ・)・リア9を前記第1のレーン10に
戻す第6のレーン11′と、第2及び第6のレーンii
、+1と半導体装置との1t」1でキャリアの授受を行
なうロボット8゜8′とから倫成したものであり、キャ
リアの搬送をi械化してコンビー−夕制御により行なう
ようにしたものである。In FIG. 6, the present invention includes a first lane 10 that transports carriers 9 containing semiconductor wafers in a fixed direction, and a carrier that is selectively taken out from the first lane and transports them to a semiconductor manufacturing apparatus. , a sixth lane 11' for returning the semiconductor manufacturing equipment to the first lane 10, and a second and sixth lane ii.
, +1 and a robot 8゜8' that transfers carriers to and from semiconductor devices at 1t''1, and carries the carriers using an i-machine and controls the conveyance of the carriers. .
第3図は、本発明のウェノ・−ス搬送装置を適用したフ
ォトリソグラフイエ程を示す装置レイアウト図である。FIG. 3 is an apparatus layout diagram showing a photolithography process to which the wax conveying apparatus of the present invention is applied.
ウェ・・−スを収納したギヤリア9はコンビ=−タ(図
示せず)の指示で第1のレーン10上を順次搬送される
。フォトレジスト塗布・プリベーク装置2に連がる第2
のし〜ン11との交点で、キャリア9は第1のレー/1
0から第2のレー;/ 11 (/(移る。第2のレー
ン11で進ばれたキャリア9は塗布・プリベーク装置
t 2のロータ一部6にロボット8により装着される。The gear rear 9 containing the waste is sequentially conveyed on the first lane 10 according to instructions from a combination controller (not shown). The second device connected to the photoresist coating/prebake device 2
At the intersection with lane 11, carrier 9 moves to the first lane/1
0 to the second lane; / 11 (/(Moves. The carrier 9 advanced in the second lane 11 is mounted by the robot 8 on the rotor part 6 of the coating/prebaking device t2.
塗布・グリ〈−り処理が終了したウェ・・−スは、ア/
ローダ−7のキャリアに収納され、ロボット8′により
第5のレーン11へと移さ扛る。第3のレーン11′で
ギヤリアは搬送され、第1のレーン10に丙び移され、
第1のレーン10上を次の処理装置rで搬送される。前
記同様に目金露光機3またはn合畜光機6′、以下現像
装置4、外観検査装置5 Vcギヤリアが次々と搬送さ
れ、プロセス処理か順次行なわれろ。目金露光機3また
は6のいずれで処理するかはコンビーータの指示で行な
われる。面クリーンルーム(図示せず)は、ギヤリアを
搬送する第1.第2および第6のし〜ンと、ロボットと
、半導体製造装置の上をカバーする。The wafer that has been coated and greased is
It is stored in the carrier of the loader 7 and transferred to the fifth lane 11 by the robot 8'. The gear rear is transported in the third lane 11' and transferred to the first lane 10,
It is transported on the first lane 10 to the next processing device r. Similarly to the above, the eyelid exposure machine 3 or the n-column exposure machine 6', hereafter the developing device 4, the visual inspection device 5, and the Vc gear are transported one after another, and the processing is performed one after another. Which of the eyelid exposure devices 3 and 6 is used for processing is determined by instructions from the conbeater. A surface clean room (not shown) is provided with the first clean room for transporting the gear rear. It covers the second and sixth stages, the robot, and the semiconductor manufacturing equipment.
以上述べたように、本発明は装置間の搬送を無人化にで
き、工数削減および人間からのゴミ装着がなくなるため
、歩留を向」こすることができる。As described above, the present invention enables unmanned transportation between devices, reduces man-hours, and eliminates the need for humans to attach dust, thereby improving yield.
また、高価なりリーンルームはキャリアの搬送される部
分および半導体製造装置のうちウニ・・−スの流れる部
分だげに設ければ良いので、工場建設費および卸、特賞
を削減することができる。さらに、装置tを他の装置u
に置き換える場合および装置が故障した場合等は連結す
る他の装置に影響を与えないので、装置レイアウトを自
由度の冒いものとすることかでさる。In addition, since expensive lean rooms need only be provided in the areas where carriers are transported and the parts of the semiconductor manufacturing equipment where the sea urchins flow, it is possible to reduce factory construction costs, wholesale costs, and special awards. Furthermore, device t is connected to another device u.
If the device is replaced or if the device breaks down, it will not affect other connected devices, so the degree of freedom in the device layout will be compromised.
したがって本発明によれば、半導体ウニ・・−スを収納
したキャリアの搬送を機械化することにより、キャリア
の搬送をコンビーータ制御で円滑に行なうことができる
効果を有するものである。Therefore, according to the present invention, by mechanizing the conveyance of the carrier containing the semiconductor unicorns, the conveyance of the carrier can be carried out smoothly under the control of the converter.
なお、実施例ではフォトIJソゲラフイエ程に適用した
場合を述べたが、エノテング工程、拡散工程等、他の工
程にも適用でさる。In the embodiment, the case where the present invention is applied to a photo IJ soger coating process is described, but it can also be applied to other processes such as an etching process and a diffusion process.
第1図および第2図は従来のフォトリソグラフイエ程の
フロアレイアウト図、第6図は本発明のウェハース搬送
装置を適用したフ第1・リソグラフィ工程のフロアレイ
アウトの一実施例である。
1 ・ クリーンルーム、2・・・7.i−トレカト塗
布・グリベーク装置6.3′・間合露光機、4・・・現
像装置、5・外観検査装置6・・・ロー、#ロー1 7
・・・アンローダ−1818・・・ロボット?・キャリ
ア、 10・・・第1のレーン11、 +2.13.+
4.15・・・第2のレーン11.12,13.+
4.15・・・第3のレーン特許出願人 日本電気株式
会社1 and 2 are floor layout diagrams of a conventional photolithography process, and FIG. 6 is an example of a floor layout of a first lithography process to which the wafer transfer apparatus of the present invention is applied. 1. Clean room, 2...7. i-Trecato coating/gribake device 6.3'・interval exposure machine, 4...developing device, 5・appearance inspection device 6...row, #row 1 7
...Unloader-1818...robot? -Carrier, 10...first lane 11, +2.13. +
4.15...Second lane 11.12, 13. +
4.15...Third Lane Patent Applicant NEC Corporation
Claims (1)
一定方向に搬送する第1のレーンと、該第1のレーンか
ら選択的に取り出されたキャリアを半導体製造装置(/
(搬送する第2のレーンと、半導体製造装置からギヤリ
アを前記第1のレーンに戻す第3のレーンと、第2及び
第3のレーンと半導体製造装置tf=tとの間でギA・
リアの授受を行なうロボットとから溝ルにしたことをt
時機とするウド・・−ス搬送装置6.(1) A first lane for transporting carriers in a certain direction for storing semiconductor substrates, and a semiconductor manufacturing equipment (/
(The second lane for transporting, the third lane for returning the gear rear from the semiconductor manufacturing equipment to the first lane, and the gear A between the second and third lanes and the semiconductor manufacturing equipment tf=t.
It is said that the robot that gives and receives the rear is changed to a groove.
6. Timely Udo-su conveyance device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2722982A JPS58145144A (en) | 1982-02-22 | 1982-02-22 | Wafers conveying device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2722982A JPS58145144A (en) | 1982-02-22 | 1982-02-22 | Wafers conveying device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58145144A true JPS58145144A (en) | 1983-08-29 |
Family
ID=12215248
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2722982A Pending JPS58145144A (en) | 1982-02-22 | 1982-02-22 | Wafers conveying device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58145144A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0334441A (en) * | 1989-06-30 | 1991-02-14 | Fujitsu Ltd | System for continuously processing semiconductor substrates |
JPH077067A (en) * | 1993-12-13 | 1995-01-10 | Tokyo Electron Ltd | Apparatus and method for resist processing |
JPH0851139A (en) * | 1990-03-30 | 1996-02-20 | Tokyo Electron Ltd | Processor |
JPH08227930A (en) * | 1988-02-12 | 1996-09-03 | Tokyo Electron Ltd | Manufacturing system and manufacturing method |
JPH1064977A (en) * | 1997-06-23 | 1998-03-06 | Hitachi Ltd | Vacuum treatment unit and wafer treatment method |
-
1982
- 1982-02-22 JP JP2722982A patent/JPS58145144A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08227930A (en) * | 1988-02-12 | 1996-09-03 | Tokyo Electron Ltd | Manufacturing system and manufacturing method |
JPH0334441A (en) * | 1989-06-30 | 1991-02-14 | Fujitsu Ltd | System for continuously processing semiconductor substrates |
JPH0851139A (en) * | 1990-03-30 | 1996-02-20 | Tokyo Electron Ltd | Processor |
JPH077067A (en) * | 1993-12-13 | 1995-01-10 | Tokyo Electron Ltd | Apparatus and method for resist processing |
JPH1064977A (en) * | 1997-06-23 | 1998-03-06 | Hitachi Ltd | Vacuum treatment unit and wafer treatment method |
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