JPS58144848U - Hybrid IC - Google Patents

Hybrid IC

Info

Publication number
JPS58144848U
JPS58144848U JP4028782U JP4028782U JPS58144848U JP S58144848 U JPS58144848 U JP S58144848U JP 4028782 U JP4028782 U JP 4028782U JP 4028782 U JP4028782 U JP 4028782U JP S58144848 U JPS58144848 U JP S58144848U
Authority
JP
Japan
Prior art keywords
hybrid
substrate
lead wire
top surface
case
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4028782U
Other languages
Japanese (ja)
Inventor
楢本　剛久
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP4028782U priority Critical patent/JPS58144848U/en
Publication of JPS58144848U publication Critical patent/JPS58144848U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のパイブリッドＩＣの構造を説明するため
の図、第２図は本考案によるハイブリッドＩＣの構造を
説するための図である。 図面に於いて、１１はセラミック基板、１２は抵抗、１
３は導体、１４はバット状端子、１５はトランジスタ、
１６はリード線、１７は密封用ケース、１８は貫通孔を
それぞれ示す。FIG. 1 is a diagram for explaining the structure of a conventional hybrid IC, and FIG. 2 is a diagram for explaining the structure of a hybrid IC according to the present invention. In the drawing, 11 is a ceramic substrate, 12 is a resistor, 1
3 is a conductor, 14 is a bat-shaped terminal, 15 is a transistor,
16 is a lead wire, 17 is a sealing case, and 18 is a through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路素子が搭載されたセラミック基板上面に回路素子密
封用のケースを取付けたハイブリッドＩＣにおいて、前
記セラミック基板にはリード線をケース内より基板側方
の外部に引出すための貫通孔を設け、該貫通孔より前記
リード線を前記基板上面とほぼ平行に引出したことを特
徴とするハイブリッドＩＣ０In a hybrid IC in which a case for sealing the circuit elements is attached to the top surface of a ceramic substrate on which circuit elements are mounted, a through hole is provided in the ceramic substrate for leading out the lead wire from the inside of the case to the outside on the side of the substrate. A hybrid IC0 characterized in that the lead wire is drawn out from the hole substantially parallel to the top surface of the substrate.
JP4028782U 1982-03-24 1982-03-24 Hybrid IC Pending JPS58144848U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4028782U JPS58144848U (en) 1982-03-24 1982-03-24 Hybrid IC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4028782U JPS58144848U (en) 1982-03-24 1982-03-24 Hybrid IC

Publications (1)

Publication Number Publication Date
JPS58144848U true JPS58144848U (en) 1983-09-29

Family

ID=30051518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4028782U Pending JPS58144848U (en) 1982-03-24 1982-03-24 Hybrid IC

Country Status (1)

Country Link
JP (1) JPS58144848U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62254516A (en) * 1986-04-28 1987-11-06 Mitsubishi Electric Corp Sequencer solid-state relay

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62254516A (en) * 1986-04-28 1987-11-06 Mitsubishi Electric Corp Sequencer solid-state relay

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