JPS58135662A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPS58135662A
JPS58135662A JP1864282A JP1864282A JPS58135662A JP S58135662 A JPS58135662 A JP S58135662A JP 1864282 A JP1864282 A JP 1864282A JP 1864282 A JP1864282 A JP 1864282A JP S58135662 A JPS58135662 A JP S58135662A
Authority
JP
Japan
Prior art keywords
resistors
substrate
thin film
constituted
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1864282A
Other languages
Japanese (ja)
Other versions
JPH0454386B2 (en
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP1864282A priority Critical patent/JPS58135662A/en
Publication of JPS58135662A publication Critical patent/JPS58135662A/en
Publication of JPH0454386B2 publication Critical patent/JPH0454386B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the area occupied by resistors in an IC device and contrive further higher density and larger integration, by arranging thin film resistors in vertical type or three dimensions to the main substrate for IC constitution. CONSTITUTION:A thick insulation film 2 constituted of an SiO2 is formed on the P type Si substrate 1, then holes are opened by an automatic etching technique, etc., and a prescribed N type conductive impurity is diffused from hole parts into the Si substrate resulting in the formation of wiring layers 3, etc. On the side wall part of holes, the thin film resistors 4 and 5 constituted of CrSi (chrome silicide) are formed by an oblique evaporation method or a chemical evaporation method. Thus, thin film resistors in vertical type or three dimensional arrangement are constituted by contacting the side wall of uneven parts of an insulator or an insulation film to resistors, and the upper and lower part thereof to wiring layers.

Description

【発明の詳細な説明】 本発明は集積回路装置に係り、とりわけ抵抗体の構造に
関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit device, and more particularly to the structure of a resistor.

従来、集積回路装置における抵抗体部の構造は、平担な
絶縁体または絶縁膜基体表面に薄膜抵抗体を平担に形成
する構造が用いられていた。Conventionally, the structure of a resistor portion in an integrated circuit device has been such that a thin film resistor is formed flat on the surface of a flat insulator or insulating film substrate.

しかし、上記従来技術では、抵抗体が二次元配置される
為に、集積回路装置を高密度化、大集積化する場合に、
大面積を要し、集積度の向上に向かないという欠点があ
った。However, in the above-mentioned conventional technology, since the resistors are arranged two-dimensionally, when increasing the density and large-scale integration of the integrated circuit device,
It has the disadvantage that it requires a large area and is not suitable for improving the degree of integration.

本発明は拘る従来技術の欠点をなくし、高密度で大集積
化可能な集積回路装置の抵抗体部の構造を提供すること
を目的とする。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the related art and to provide a structure of a resistor portion of an integrated circuit device that can be integrated at high density and large scale.

上記目的を達成するための本発明の基本的な構成は、集
積回路装置に於て、基板または基板表面は絶縁物または
絶縁膜でＷｌ成され、該絶縁物または絶縁膜の表面は凹
凸状に加工され、該凹凸状絶縁物または絶縁膜の基板に
対して望ましくは垂直、または傾斜をもった少なくとも
側壁には抵抗体が形成されて成る事を特徴とする。The basic structure of the present invention for achieving the above object is that, in an integrated circuit device, a substrate or a surface of the substrate is made of an insulating material or an insulating film, and the surface of the insulating material or the insulating film is uneven. It is characterized in that a resistor is formed on at least a side wall of the uneven insulator or insulating film that is processed and is preferably perpendicular to or inclined to the substrate.

以下実施例により本発明を詳述する。The present invention will be explained in detail with reference to Examples below.

第１図は本発明の実施例を示す要部の断ｍａａである。FIG. 1 is a cross-sectional view of main parts showing an embodiment of the present invention.

Ｐ型Ｓ１基板１上にはｓ　ｉ　ｏ、からなる厚い絶縁膜
２が形ｔＬされ、該絶縁膜２にはオート・エツチング技
術等により穴開けがなされ、該穴部からＭＩＩｉＩ電型
決定不純物を拡散により８１基板に拡散配線度３等を形
成すると共に、該穴部の少なくとも側壁部にＱｒｌｉｊ
ｉ　（クロム・ミリサイド）からなる薄膜抵抗体４、お
よび５を斜め蒸着法や化学蒸着法により形成したもので
ある。この様に絶縁体または絶縁膜の凹凸部の側壁を抵
抗体と、その上部及び下部を配線層と接触させることに
より、縦型配置あるいは三次元配置の薄膜抵抗体が構成
できる。A thick insulating film 2 made of sio is formed on the P-type S1 substrate 1, and a hole is made in the insulating film 2 by auto-etching or the like, and the MIIIiI type-determining impurity is removed from the hole. By diffusion, a diffusion wiring degree of 3 or the like is formed on the 81 substrate, and Qrlij is formed on at least the side wall of the hole.
Thin film resistors 4 and 5 made of i (chromium miricide) are formed by oblique vapor deposition or chemical vapor deposition. In this way, by bringing the sidewall of the uneven portion of the insulator or insulating film into contact with the resistor and its upper and lower parts with the wiring layer, a vertically or three-dimensionally arranged thin film resistor can be constructed.

第２図は、その他の実施例であり、Ｐ型Ｓ１基板１１に
異方性エツチングより大開けし、ＩＩＩ導電型決定不純
物を拡散した層１３を形成すると共に、穴部の側層及び
８１表面にＳｉｎ！ＩＩからなる絶縁膜を残して形成し
、０５８１からなる薄膜抵抗体１４を縦型あるいは三次
元配置したものである。FIG. 2 shows another embodiment, in which a large hole is formed in the P-type S1 substrate 11 by anisotropic etching, a layer 13 is formed in which impurities for determining the conductivity type III are diffused, and the layer 13 on the side of the hole and the surface 81 is formed. niSin! The thin film resistor 14 made of 0581 is vertically or three-dimensionally arranged, with an insulating film made of 0581 remaining.

この様に薄膜抵抗体は主たる集積回路構成基板に対し従
来の如く横型配置または二次元配置ではなく、縦型配置
または三次元配置となすことにぼり、集積回路装置にお
ける抵抗体の占める面積を小さくでき、一層の高密度化
、大集積化を計ることができる効果がある。In this way, thin-film resistors are placed vertically or three-dimensionally on the main integrated circuit component substrate, rather than horizontally or two-dimensionally as in the past, reducing the area occupied by the resistors in integrated circuit devices. This has the effect of enabling even higher density and larger integration.

なお、薄膜抵抗体は他の絶縁基板上に形成後、主たる集
積回路基板に対し垂直に形成あるいは貼付けても良い。Note that the thin film resistor may be formed on another insulating substrate and then formed or attached perpendicularly to the main integrated circuit board.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図および第２図は本発明の実施例を示す要部の断面
図である。 １．１１・・・・・・基板 ２．１２・・・・・・絶縁体 ３．１３・・・・・・配線層 ４．５，１４・・・・・・薄膜抵抗体 具　　上 出願人　　株式会社諏訪精工舎 代理人　　弁理士　最上　　務 ）・1 and 2 are sectional views of essential parts showing an embodiment of the present invention. 1.11... Substrate 2.12... Insulator 3.13... Wiring layer 4.5, 14... Thin film resistor device Suwa Seikosha Co., Ltd. Agent Patent Attorney Tsutomu Mogami)

Claims (1)

【特許請求の範囲】[Claims] 基板または基板表面は絶縁物または絶縁膜で形成され、
該絶縁物または絶縁膜の表面は凹凸状に加工され、該凹
凸状絶縁物または絶縁膜の基板に対して望ましくは垂直
、または傾斜をもりた少なくとも側壁には抵抗体が形成
されて成する事を特徴とする集積回路装置。The substrate or substrate surface is formed of an insulating material or an insulating film,
The surface of the insulator or insulating film is processed to have an uneven shape, and a resistor is formed on at least a side wall of the uneven insulator or insulating film that is preferably perpendicular to the substrate or inclined. Features of integrated circuit devices.
JP1864282A 1982-02-08 1982-02-08 Integrated circuit Granted JPS58135662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1864282A JPS58135662A (en) 1982-02-08 1982-02-08 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1864282A JPS58135662A (en) 1982-02-08 1982-02-08 Integrated circuit

Publications (2)

Publication Number Publication Date
JPS58135662A true JPS58135662A (en) 1983-08-12
JPH0454386B2 JPH0454386B2 (en) 1992-08-31

Family

ID=11977250

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1864282A Granted JPS58135662A (en) 1982-02-08 1982-02-08 Integrated circuit

Country Status (1)

Country Link
JP (1) JPS58135662A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007066037A1 (en) * 2005-12-06 2007-06-14 Stmicroelectronics Sa Resistance in an integrated circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5426747A (en) * 1977-07-30 1979-02-28 Tdk Corp Heat-sinsitive printing head
JPS5593251A (en) * 1978-12-30 1980-07-15 Fujitsu Ltd Manufacture of semiconductor device
JPS5643749A (en) * 1979-09-18 1981-04-22 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5426747A (en) * 1977-07-30 1979-02-28 Tdk Corp Heat-sinsitive printing head
JPS5593251A (en) * 1978-12-30 1980-07-15 Fujitsu Ltd Manufacture of semiconductor device
JPS5643749A (en) * 1979-09-18 1981-04-22 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007066037A1 (en) * 2005-12-06 2007-06-14 Stmicroelectronics Sa Resistance in an integrated circuit
US7902605B2 (en) 2005-12-06 2011-03-08 St Microelectronics Sa Resistor in an integrated circuit
US8232169B2 (en) 2005-12-06 2012-07-31 Stmicroelectronics S.A. Resistor in an integrated circuit

Also Published As

Publication number Publication date
JPH0454386B2 (en) 1992-08-31

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