JPS58124251A - Resin-sealed type semiconductor device - Google Patents
Resin-sealed type semiconductor deviceInfo
- Publication number
- JPS58124251A JPS58124251A JP57007957A JP795782A JPS58124251A JP S58124251 A JPS58124251 A JP S58124251A JP 57007957 A JP57007957 A JP 57007957A JP 795782 A JP795782 A JP 795782A JP S58124251 A JPS58124251 A JP S58124251A
- Authority
- JP
- Japan
- Prior art keywords
- alpha
- ray
- ray shielding
- resin
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
- H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
本発明に封止用樹脂からのα線照射によってソフトエラ
ーが生じるのを防止した樹脂封止形半導体装置に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resin-sealed semiconductor device that prevents soft errors from occurring due to α-ray irradiation from a sealing resin.
近年、半導体メモＩＪＩｃの高集積度化に伴い、封止樹
脂に含まれる微量のＵ、 Ｔｈ等の放射性元素からでた
α線が半導体素子表面のメモリー領域に入射し、α線の
エネルギーによってメモリーが反転するというソフトエ
ラーが問題になっている。In recent years, as semiconductor memory devices (IJIc) have become more highly integrated, alpha rays emitted from trace amounts of radioactive elements such as U and Th contained in the sealing resin enter the memory area on the surface of the semiconductor element, and the energy of the alpha rays causes the memory to become damaged. A soft error in which the image is reversed has become a problem.
αｌ１ｌｉｌに物質透過に際し、物質にエネルギーを与
え、自らにその運動エネルギーを失なっていくため、物
質透過力に少なく、半導体素子のメモリー領域上にα線
じゃへい膜を設ければソフトエラーは防止できる事が知
られている。When αl1lil passes through a substance, it imparts energy to the substance and loses its kinetic energy to itself, so the ability to penetrate the substance is small, and soft errors can be prevented by providing an α-ray blocking film over the memory area of the semiconductor element. It is known that it can be done.
従来、半導体素子のメモリー表面領域をα線じゃへい材
料で被覆する方法として、半導体集子金リードフレーム
にマウントしたのち、半導体素子表面をα線じゃへい材
料で厚くボッティング法にて塗布し、固化してからエポ
キシ樹脂等の封止樹脂で封止する方法と、ウェハ状態で
α線じゃへい材料全スピナー塗布方法でα線じゃへい膜
を形成する方法が用いられていた。α線じゃへい材料と
してはポリイミド樹脂等の耐熱性高分子材料が用いられ
ていた。Conventionally, the method of coating the memory surface area of a semiconductor element with an alpha-ray repellent material is to mount the semiconductor element on a gold lead frame and then coat the semiconductor element surface thickly with an alpha-ray repellent material using a botting method. Two methods have been used: one is to solidify the material and then seal it with a sealing resin such as epoxy resin, and the other is to form an α-ray repellent film by coating the entire α-ray repellent material on a wafer with a spinner. Heat-resistant polymer materials such as polyimide resin have been used as α-ray blocking materials.
しかしながら、ボッティング法の場合、α線しやへい樹
脂を塗布した時に半導体素子の電極から外部リードに接
続するＡｕワイヤにα線じゃへい樹脂が接触し、エポキ
シ樹脂等で封止したのち、熱ストレス試験において封止
樹脂とα線じゃへい樹脂の熱膨張係数の違いにより、し
やへい材と封止材の界面でＡｕワイヤが破断し易いとい
う問題があった。However, in the case of the botting method, when the alpha-ray-resistant resin is applied, the alpha-ray-resistant resin comes into contact with the Au wires connected from the electrodes of the semiconductor element to the external leads, and after being sealed with epoxy resin, etc., heat is applied. In stress tests, there was a problem in that the Au wire was prone to breakage at the interface between the sealing material and the sealing material due to the difference in thermal expansion coefficient between the sealing resin and the alpha-ray blocking resin.
また、コート厚のバラツキが大きく、特に半導体素子の
周辺部に薄＜’ｉｖ易く、αＭをしゃ断するに十分な厚
みが得られないという事があった。In addition, the coating thickness varies widely, and the coating tends to be thin especially in the peripheral area of the semiconductor element, making it difficult to obtain a sufficient thickness to cut off αM.
スピナー塗布法の場合はα線じゃへい膜厚が最大２０μ
ｍ程度しか得られず、α線のエネルギーを完全に吸収す
るに必要な４０μｍ以上の膜厚を得る事かで＠ないとい
う欠点があった。In the case of spinner coating method, the maximum α-ray film thickness is 20μ
However, there was a drawback that it was difficult to obtain a film thickness of 40 μm or more, which is necessary to completely absorb the energy of α-rays.
本発明は従来の欠点に鑑みて、α線エネルギーを完全に
しゃ断した信頼性の高い樹脂封止形半導体装置を提供す
るものであり、半導体素子表面にα線じゃへい材料をス
ピナ塗布法にて薄く形成すると共に、耐熱性接着剤を介
して、α線じゃへいシートを固着した事を特徴とする。In view of the drawbacks of the conventional art, the present invention provides a highly reliable resin-sealed semiconductor device that completely blocks alpha ray energy. It is characterized by being formed thinly and having an α-ray repellent sheet fixed to it via a heat-resistant adhesive.
以下本発明の実施例について説明する。Examples of the present invention will be described below.
第１図、第２図に本発明によるα線じゃへいを施した半
導体装置の構造を示すものである。FIGS. 1 and 2 show the structure of a semiconductor device subjected to α-ray shielding according to the present invention.
まず、ウェハ状態でα線じゃへい材料例えはポリイミド
樹脂をスピナー塗布法によりウェハ表面に薄くα線じゃ
へい膜を形成し、これをエツチング法にて所望形状にエ
ツチングして半導体素子表面のｍ−極部全露出させると
共に、少なくともソフトエラーを発生する半導体素子（
２）の活性化表面領域（７）以上の範囲を覆うようにα
線しゃへい膜ｆｌｌ’に形成する。First, in a wafer state, a thin α-ray blocking film is formed on the wafer surface using an α-ray blocking material such as polyimide resin using a spinner coating method, and this is etched into a desired shape using an etching method to form m- In addition to fully exposing the extreme parts, the semiconductor element (
2) so as to cover the activated surface area (7) or more.
It is formed on the line shielding film fll'.
前記α線じゃへいコートされた半導体素子（２）ヲリー
ドフレーム（３）のマウント部にロー材（４）ヲ介して
マウントし半導体素子（２）の電極部とリードフレーム
（３）とｋＡｕワイヤ（９）で接続したのち、α線じゃ
へい効果ヲ有する耐熱性接着剤（５）例えばエポキシ樹
脂を介してα線じゃへいシート（６）例えばポリイミド
シートを固着する。この状態で第２図に示すように全体
を封止樹脂（８）で被覆することにより半導体装置が完
成する。なお、α線じゃへいシート（６）の厚みとじて
にα線エネルギーを完全にしゃ断するという意味から４
０μｍ以上が望ましく、またα線じゃへいシートの固着
範囲に半導体素子（２）の活性化表部領域（７）以上で
、前記α線しやへい膜（１）の範囲と同等もしくに狭い
範囲とする。The semiconductor element (2) coated with the α-ray repellent is mounted on the mount part of the lead frame (3) through the brazing material (4), and the electrode part of the semiconductor element (2), the lead frame (3) and the kAu wire are attached. After connecting in (9), an α-ray blocking sheet (6) such as a polyimide sheet is fixed via a heat-resistant adhesive (5) having an α-ray blocking effect, such as an epoxy resin. In this state, the entire semiconductor device is covered with a sealing resin (8) as shown in FIG. 2, thereby completing the semiconductor device. In addition, the thickness of the α-ray blocking sheet (6) is 4 to completely block the α-ray energy.
It is desirable that the thickness is 0 μm or more, and the adhesive range of the α-ray shielding sheet should be equal to or narrower than the area of the activated surface area (7) of the semiconductor element (2), which is equal to or narrower than the range of the α-ray shielding film (1). range.
本発明にα線じゃへいとして第一層のα線じゃへい膜上
にα線じゃへいシートを固着した点に特徴があり、次に
述べるような効果が得られる。The present invention is characterized in that an α-ray shielding sheet is fixed on the first layer of α-ray shielding film as an α-ray shield, and the following effects can be obtained.
（イ） α線じゃへいシート材を半導体素子表面に直接
接着剤を介して固着すると、シート固着時に接着面の一
部に空気が残るため、半導体素子表面の一部が中空の状
態となり、耐湿試験等において樹脂内部を浸透してきた
湿気が溜り、短時間に半導体素子表面のＡＩ！配線を腐
蝕するという欠点があったが、第一層にスピナ塗布法に
より薄く均一なα線じゃへい膜ｔｌ＋を形成してＡるた
め、これとα線じゃへいシート（６）の間にすき壕が生
じても半導体素子表面に第一層のα線じゃへい膜＋ｌ＋
で保護されているため耐湿試験等で短時間にＡＩ！腐蝕
を生じず、極めて信頼性が高くなる。(b) When an α-ray resistant sheet material is directly attached to the surface of a semiconductor element with an adhesive, air remains on a part of the adhesive surface when the sheet is attached, leaving a part of the semiconductor element surface in a hollow state, making it moisture resistant. Moisture that has penetrated the inside of the resin during tests, etc. accumulates, and in a short period of time, AI! Although it had the disadvantage of corroding the wiring, since a thin and uniform α-ray repellent film tl+ is formed on the first layer using the spinner coating method, there is no gap between this and the α-ray repellent sheet (6). Even if a trench occurs, the first layer of α-ray blocking film +l+ remains on the surface of the semiconductor element.
Because it is protected by AI in a short time during moisture resistance tests, etc. No corrosion and extremely high reliability.
（ロ） じゃへい材料としてシートを用いているため、
α線エネルギーをじゃへいするに必要な厚みが均一に且
つ容易に得られる。(b) Since a sheet is used as a barrier material,
The thickness necessary to block α-ray energy can be obtained uniformly and easily.
（ハ） じゃへい材料がＡｕワイヤ（９）に接触しない
ため、ＡｕワイヤのＦｉ線が起こらず歩留りを向上でき
る。(c) Since the barrier material does not come into contact with the Au wire (9), the Fi line of the Au wire does not occur and the yield can be improved.
第１図および第２図に本発明の一実施例を示すもので、
第１図に樹脂封止前の半導体素子の平面図を示し、第２
図に樹脂封止後の半導体素子の断面図を示す。
図において、ｆｉ＋・・・α線じゃへい膜、（２）・・
・半導体Ｘ子、［３１・・・リードフレーム、（４）・
・・ロー材、ｔ５＋・・・α線じゃへい接着剤、（６）
・・・α線じゃへいシート、（７）・・・活性化表面領
域、（８）・・・封止樹脂、（９）・・・Ａｕワイヤで
ある。
代理人 葛野信−
手続補正書（自発）
特許庁長官殿
１、事件の表示 特願昭 ５７−００７９５７号
２、発明の名称 樹脂封止形半導体装置３、補正を
する者
事件との関係 特許出願人
（＋）
５、補正の対象
明細書の発明の詳細な説明の欄
６、補正の内容
明細書をつぎのとおり訂正する。An embodiment of the present invention is shown in FIGS. 1 and 2.
Fig. 1 shows a plan view of the semiconductor element before resin sealing, and Fig.
The figure shows a cross-sectional view of the semiconductor element after resin sealing. In the figure, fi+...α-ray barrier membrane, (2)...
・Semiconductor X element, [31...Lead frame, (4)・
...Raw material, t5+...α-ray blocking adhesive, (6)
. . . alpha ray shielding sheet, (7) . . . activated surface region, (8) . . . sealing resin, (9) . . . Au wire. Agent Makoto Kuzuno - Procedural amendment (voluntary) Commissioner of the Japan Patent Office 1. Indication of the case: Japanese Patent Application No. 57-007957 2. Title of the invention: Resin-encapsulated semiconductor device 3. Relationship with the person making the amendment: Patent application Person (+) 5. Column 6 of the detailed description of the invention in the specification to be amended, amend the description of the contents of the amendment as follows.
Claims (1)
膜を形成すると共に前記α線じゃへい膜上にα線しやへ
い効果を有する耐熱性接着剤を介してα線じゃへいシー
トを固着し、さらに全周を封止樹脂により封止して成る
事を特徴とする樹脂封止形半導体装置。An α-ray repellent film is formed to cover the active surface area of the semiconductor element, and an α-ray repellent sheet is fixed onto the α-ray repellent film via a heat-resistant adhesive having an α-ray repellent effect. , a resin-sealed semiconductor device characterized in that the entire circumference is further sealed with a sealing resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57007957A JPS58124251A (en) | 1982-01-20 | 1982-01-20 | Resin-sealed type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57007957A JPS58124251A (en) | 1982-01-20 | 1982-01-20 | Resin-sealed type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58124251A true JPS58124251A (en) | 1983-07-23 |
Family
ID=11679963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57007957A Pending JPS58124251A (en) | 1982-01-20 | 1982-01-20 | Resin-sealed type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58124251A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS647628A (en) * | 1987-06-30 | 1989-01-11 | Hitachi Ltd | Semiconductor device and manufacture thereof |
| WO2016150582A1 (en) * | 2015-03-20 | 2016-09-29 | Robert Bosch Gmbh | Electronics module comprising alpha-radiation protection for a transmission control unit and transmission control unit |
-
1982
- 1982-01-20 JP JP57007957A patent/JPS58124251A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS647628A (en) * | 1987-06-30 | 1989-01-11 | Hitachi Ltd | Semiconductor device and manufacture thereof |
| WO2016150582A1 (en) * | 2015-03-20 | 2016-09-29 | Robert Bosch Gmbh | Electronics module comprising alpha-radiation protection for a transmission control unit and transmission control unit |
| CN107637186A (en) * | 2015-03-20 | 2018-01-26 | 罗伯特·博世有限公司 | Electronic apparatus module and transmission control units with the alpha ray protection for transmission control units |
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