JPH01244624A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an Al electrode, from which a bonding pad section for a chip housed in a resin seal type package is exposed, from being corroded by attaching a polyimide film onto a plasma CVD SiN film. CONSTITUTION:A base region 2 and an emitter region 3 are formed to a collector region 1, the surface is coated with a thermal oxide film and windows for electrodes are bored, and the emitter electrode 4 and the base electrode 5 are form by Al. A CVD SiO2 film 6 is attached and passivated with a plasma CVD film 7. A polyimide film 8 is further annexed onto the film 7, and the surface of a chip is passivated. Lastly, the windows for the bonding electrodes for an emitter and a base are bored for wire bonding. When the size of the windows is made equal to, or as smaller as possible than, the ball diameters of bonding wires, excellent moisture resistance is acquired.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device.

[Conventional technology]

Conventionally, the structure of surface passivation of a chip in a resin-sealed semiconductor device is to first passivate it onto an electrode at a relatively low temperature.
CVD SiO2 was deposited to an appropriate thickness, and the surface was further passivated with a SiN film to an appropriate thickness by plasma CVD.

When passivating the surface of a chip, only the bonding pad portion of the chip surface electrode is opened, and the other portions are completely covered to prevent contamination such as moisture and impurities from outside.

FIG. 3 is a cross-sectional view of a conventional semiconductor device.

After forming a base region 2 and an emitter region 3 in the collector region 1, the surface is covered with a thermal oxide film and an electrode window is formed, and then an emitter electrode 4 and a base electrode 5 are formed using Affi.

Thereafter, a CVD5i02 film 6 of 300 to 500 nm is deposited.

Next, the plasma CVDSiN film 7 is passivated to a thickness of 300 to 500 nm.

Finally, windows were made on the emitter and base bonding pads for wire bonding.

[Problem to be solved by the invention]

The conventional semiconductor device described above has a chip surface passivation structure, but in recent small resin-sealed packages, moisture that has entered the inside of the package reaches the surface of the bonding pad electrode and is particularly damaged by the electrode due to electrochemical action. When the material is A (or its alloy, etc.), there is a drawback that corrosion is likely to occur.

That is, in order to bond the bonding pad electrode to the lead, a window must be opened, which poses a fatal problem of exposing the electrode.

The object of the present invention is to provide a semiconductor device with passivation TF4 on the chip surface, which dramatically improves moisture resistance even if the bonding pad electrode is exposed to some extent, which is a fatal problem.

[Means to solve the problem]

The semiconductor device of the present invention is intended to improve the above-described disadvantages of the conventional semiconductor device.

After the Affl electrode is formed, first deposit CVD5i02 to a suitable thickness and then passivate the plasma CVDSiN.

A polyimide film is further attached thereon.

In this case, it is advantageous to make the window size of the bonding pad as small as possible while wire bonding is possible.

Experiments have shown that a polyimide film having a thickness of 2 to 3 μm is sufficiently effective.

The polyimide film is hygroscopic and absorbs moisture that enters through the resin or the gap between the resin and the lead.

〔Example〕

Next, embodiments of the present invention will be described with reference to FIGS. 1 to 3.

FIG. 1 is a sectional view of a first embodiment of the invention.

After forming a base region 2 and an emitter region 3 in the collector region 1, the surface is covered with a thermal oxide film and an electrode window is formed, and then an emitter electrode 4 and a base electrode 5 are formed using A1.

After decaling, CVD5i02 film 6 is deposited to a thickness of 3° to 500 nm, and then plasma CVDM 7 is deposited to a thickness of 3° to 500 nm.
Passivate.

A layer of polyimide fi8 having a thickness of 2 to 3 .mu.m is further adhered thereon to passivate the surface of the chip.

Finally, holes are made for the emitter and base bonding pad electrodes for wire bonding.

In this case, the window size should be equal to or as small as the ball diameter of the bonding wire for better moisture resistance.

FIG. 2 is a sectional view of a second embodiment of the invention.

After forming a base region 2 and an emitter region 3 in the collector region 1, the surface is covered with a thermal oxide film and an electrode window is formed, and then an emitter electrode 4 and a base electrode 5 are formed by AJ.

After that, the CVD5i02 film 7 is coated with a thickness of 300 to 500 nm.
A polyimide film 8 with a thickness of 2 to 3 μm is deposited thereon to passivate the chip surface.

Finally, holes are made on the emitter and base bonding pads to which the wires will be bonded.

〔Effect of the invention〕

As explained above, in the present invention, the bonding pad portion of the chip housed in the resin-sealed package is exposed by further attaching a polyimide film on the plasma CVD5 i NJli due to the passivation structure on the chip surface. A (The effect of preventing electrodes from corrosion was confirmed.

That is, as a test to confirm the effectiveness of moisture resistance, we conducted a pressure pressure test (PCT) and compared the structure of the present invention with the conventional structure.
No corrosion of the electrodes was observed.

However, in the conventional structure, about 100H, A, 12r
A tendency towards K corrosion appeared and severe corrosion occurred at 250H.

Therefore, the passivation structure on the chip surface of the present invention is effective as a method for improving moisture resistance, especially in small resin-sealed semiconductor packages.

[Brief explanation of the drawing]

1 is a sectional view of a first embodiment of the present invention, FIG. 2 is a sectional view of a second embodiment of the invention, and FIG. 3 is a sectional view of a conventional semiconductor device. 1... Collector area, 2... Base area, 3...
Emitter region, 4... Emitter electrode, 5... Base electrode, 6... CV D Si O2 film, 7... Plasma CVDSiN film, 8... Polyimide film.

Claims (1)

[Claims] A semiconductor device on a chip surface, characterized in that, in surface passivation of a semiconductor chip, a polyimide film is passivated on a plasma CVDSiN film.