JPS5812292A - Dimming circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a dimming circuit that lights up a lighting load based on a control record sent from a transmitter, and its first object is to By selecting the secondary light level of the lighting load corresponding to each control code, you can control multiple types of dimming by operating the switch.
Our goal is to provide IK-based dimming that can be done today, and the first objective is to provide smooth dimming in degrees even when the number of control cords is small. Our goal is to provide a dimming circuit that can be used in a variety of ways.

In general, this type of sub-optical circuit is one that leaks NAV% as a power line carrier type dimming circuit that uses the commercial wiring as the signal line, and Figures 1 to 8 show power line carrier l optical systems. It is a figure showing a schematic structure of.

In the diagram, 1 凰) is a 4-pin soto control code (D,
)~(0+・) (collectively referred to as Do), the transmitter receives the control code F(D,) transmitted via the +21 d power line O1, and transmits the control code ( Do) VcI & is a receiver that controls the phase of the lighting load (1), and the transmission data (2)ri sent out from the transmitter 511) is a 4-pit control 0-
Do) K 1 pit start mark (Dl
), 6-pit address data (DA), and 1-pit end mark (DH) are added, and each address of the transmission data (2) is 1! Ori 0
2 synchronous bus (Pa) is transmitted and received as a synchronous signal,
One piece of data is transmitted every half cycle of the commercial ms source (Ao). This is an example of transmission of the atg #: of commercial g filter (Ao). 4 points between 0 and 0 points
The sub-pit transmission sections (S,) to (54) are kept constant by dividing, and a carrier high frequency wave (RF) is applied to each transmission section (sl) to (S4).
) is superimposed as %lI, and when it is not superimposed as kameOl, sub-pit l-yu(2)' is now transmitted, and the sub-pit configuration of transmission l-yu(c) is Start mark (Ds) 6&%010"1#, end marker (DH) is %θth 1g, control o-record (, Do,) and address data (DA) data value %II is '0111# , data value 10';
Part 1. Il is t! 0s 0s synchronization, generates a pulse (Pa) t! Oris detection unit, (・l-
dt! Ori0s synchronization basis (P7Z) and transmission!
-1 signal generation unit that generates a tie signal (VT,) and zero pulse (PO) for regenerating transmission zero (6) based on the -1 signal (V, +);
+71 ri sweets〒(,5W)Ic received 11)! l
An address setting section 41 sets the unique address of the transmission data (DLL) based on the input signal (V7) K, and both transmit data (2).
Address requester (DA) and address setting IIA (6
If the unique address set in 1 matches,
The reception section that outputs the control code 0-L hood (Do) followed by the control code (Do) is the triac 101 for illumination negative #I3) control based on the above control code (Do). A one-light system, B, which generates a trigger pulse ('Pτ), is applied to the gate of the trigger signal via a trigger pulse ((FT) rilvertance, 2). The dimming control circuit (9) emits and receives a tie-three signal 1! A latch circuit that latches the control O-record (Do) output from Bt81', and a decode circuit that converts the 4-pit control 1-code (Do) into a 16-pit phase code (D', ). - and t! output from the timing signal generation circuit (6). The wave number between commercial power sources (5
Counting high frequency pulses and pulses (PO)
Output (Ql) of the sub-calashita circuit and the calinter circuit
~(Qll) is suitably inverted and bent, and one of the decoding circuit outputs (S+) ~(S'@)
(n+1) input AND circuit output and AND circuit output: OR circuit (0
1) The trigger generation circuit consists of the following:
In this conventional example, by setting rin-s, 11 = 200ic, half a cycle of commercial power (AC) can be achieved! O
Divide into O phase intervals and write cositrol code (Do)
It was possible to set the dimming level (brightness) of each dimming stage (L+) to (Ltd) in 200 steps.
The generation phase (θ) of fF, PT) can be set in 200 steps. Therefore, as shown in FIG.
This means that the dimming curve (LA) of ~L1 can also be set to be substantially linear. In addition, each light control stage L1 to L+-
dimming level L (parent is counter circuit 14 output (Ql) ~ (
Output (Ql) which is input without being inverted out of Qn) ~
It is set by □(Qn). By the way, in such a conventional example, it is not possible to set a single dimming and bell force for the control code (Do), so Vh9 cannot be set, so the adjustment for the control code ('DO) cannot be performed. The light level is determined at the darkest point in the design, and the disadvantage is that the user cannot change the dimming curve as necessary. If the number of pits in (Do) is small, the dimming level will change significantly digitally, making it impossible to adjust the brightness and make smooth changes in the bell. was determined by looking at the above point Kjl.

Examples will be described below using figures. The diagram shows one embodiment of the present invention, and since the receiving section I81, the entator signal generating circuit (@), and the counter circuit 4 are the same as those in the conventional example, their explanation will be omitted. g, I) is FROM
A dimming data storage circuit and a dimming switch! J
9 (25m) (25b) (25o) The dimming data storage circuit is a latte circuit @
A2 with the Kositrol code (Do) held in
Multiple types of dimming data (DL) can be stored in addresses that are combined in the
) (!5a) to display multiple types of dimming data (!5a) stored in the same location.
ill light control day 9 (DL) is selected and read out from among DL). In other words, switch the dimming switch (25 turtle) (1!6b) (!Ss) as appropriate.
C, and KjO,"r1m17)]:]yto0-L1-doD,)K, the related light level (DL) output from the sorter conversion circuit ring can be changed freely. It is a trigger generation circuit, which consists of n exclusion circuits ('EO) and NOR circuits (N
o), and the output (Qs) of the Kalashita circuit (Qs) ~C
Qn ) and the sub-light output (DL) output from the 9-event conversion circuit 2υ match, the pot and each exclusive I
The output of the outer circuit (EO) is at the L level, and the triac sound trigger basis (PT) is designed to combine the outputs. In this embodiment, the light can be adjusted in 200 steps (Ill-"200)K as in the conventional example, and the number of pits n in the counter circuit is 8, but l and n can be set arbitrarily. However, if the cositroll code (DQ) is 4 bits, rise) 1g, n
Generally, it is set to ≧6. , Now, in the example, the dimming changeover switch (!5.a) (25
b) By switching (250), three types of dimming Dakota (DL) can be selectively obtained from 1F, - evening conversion circuit C2υ for one cocitrol code (D, )K, and 93
It is now possible to set the dimming level of the species. Therefore, it is possible to easily switch between the three types of VC line light guards (LA), (Ls), and (Lo) as shown in FIG. 7 by operating a switch.

FIG. 1O shows another embodiment.
It is equipped with a comparison control circuit consisting of I(At) and a dimmer control circuit corresponding to the control code (Do) previously received by the uptown counter 21VCr timing signal (v8). DL) is now preset, and the low RrIt 0 bus (Pt) is input to the RI 0 pin through the AND circuit (8s), and the comparison control circuit 21 up-down The 1-light data (I)'I) output from the power output example and the control code (D,)K that corresponds to the control code (D,)K that has been received this time.
The time is controlled so that the data (Dt) and the data (Dt) coincide with each other in the minimum time. The trigger generation circuit @ is the output of the counter circuit (Ql) ~ (Qn'
J and the output of the uptown counter example (Ql) ~ (Qa
), and when both outputs match, a trigger pulse (PT) of the triac is generated.

In addition, the number of shoulder waves with low shoulder wave (CPI) is as follows in one transmission cycle (if transmission data 0 is composed of 12 pits, it corresponds to 6 cycles of commercial power line 11 [(AC))] It is set to a horse wave number (for example, twice the electric frequency for lighting) that can raise or lower the light control level (Ls)-(Lu) by one level.

-1, Last received Koshitrol code (1000)
K corresponding dimming '/-511 (1000000G), and the Kositrol code (1001) that was received this time
If the corresponding dimming data is (1001000G),
The uptown counter @ is preset to (10000000), and the sorter conversion circuit @ day is preset to (10010).
00) is output. Therefore, the comparison time jl (17m)
The A-B terminals of A) and B become H level, and the uptown counter m counts the low shoulder wave and 0 pulses (Pj) and steps up, and the output of the uptown counter (Ql ) ~ (Qn) and the outputs (Ml) ~ (M, ) of the sorter conversion circuit match. When the A-8 terminal of the comparison circuit (27m) becomes H and becomes a bell, the uptown counter starts counting. Stop operation. That is, the comparison control 'II jl @ converts the output (Ql) to (Q,) of the uptown counter to the output (Q,) of the data conversion circuit Q
+) to (Q'nMt) The trigger pulse (PT) of the triac IWII is controlled to match the output (Ql) to (Qn) of the uptown counter (to). Output of the counter circuit.

If (Ql) to (Q, ) match, it will be output to the meeting, and the steady up or step town synchronization of the atazu town counter is based on the period of the low wave ripple pulse (Pj). Therefore, triac −
The trigger pulse (Pj) is K11 as shown in FIG.
From the trigger pulse (FT) generated in 01 phase based on one cositroll code (1000)K, this time, the control 0-Cyco F (Soot) 03 is generated based on K.
It is generated so as to interpolate between the phase trigger pulse (FT) and the interpolated trigger pulse (PT'), so that the dimming level changes relatively smoothly. In other words, it is possible to achieve the same dimming operation as when the number of dimming steps is increased by increasing the number of pitches of the Ktllt & L code (Do).
In the first location, the data conversion circuit is accessed by each code, so multiple types of optical leaks occur at each address. An optical data storage circuit and a one-light switching switch that selects one light output from among the plurality of types of dimming data mentioned above.
By matching the values, the dimming data output from the sorter converter circuit can be changed freely for one cositroll code by changing the dimming changeover switch at will, making it easy to operate the switch. This has the advantage of easily realizing a plurality of types of dimming curves, and of being able to perform dimming according to the user's preference or the situation at the site.

In addition, for the Tsutsuyuki 0*li1, the dimming data corresponding to the previously received Kositrol code is preset and a reset type Atsuzutaushigau-J9 is installed that counts low dovetail 0tsuk pulses. A comparison mWA path is provided to control the 7-way counter so that the output of the uptown counter and the dimmer corresponding to the received O-L hood match in the minimum time, and a comparison mWA path is provided in the trip force generation circuit. The dimming data output from the uptown counter is compared with the output of the counter circuit, and when both outputs match, a life-threatening pulse is generated, so if the control O-L code changes. A trigger pulse is generated that interpolates between the trigger pulses generated corresponding to each Kosito Roll code, so even if the Kosito O-L hood has a small number of pits, smooth step dimming can be achieved. There is an advantage that we can meet each other to do the same thing.

[Brief explanation of drawings]

Figures 1 to 3gl are explanatory diagrams of the power line carrier dimming system;
4 and 6 are circuit diagrams of the conventional example, Tsuruhe diagram and FIG. 7 are operation and explanatory diagrams of the same as above, FIG. Figure 1110 is a circuit diagram of another embodiment, and Figure @l1 is an explanatory diagram of the same operation. , 1] is the transmitter, (easy) is the reception S%21) is the data conversion circuit, slope is the carinter circuit, (to) is the trigger generation circuit, sub is the dimming sorter storage circuit, (26 &) ~ (goo) are Sekiguang selection switch, (to) Uptown Karashita, vI
ti comparison control circuit. Agent Patent Attorney Ishi 1) Choshichi

Claims (1)

[Claims] (1) A receiver S that receives the control code sent out from the transmitter, a router conversion circuit that converts the control code output from the receiver into a dimming sorter, and a commercial power
The t! The meeting revealed that the output of the color filter circuit that counts high-frequency zero pulses, which is sufficiently higher than the same wave number of the commercial power supply, and the counter circuit output matched the dimming sorter. In a dimmer circuit consisting of a power generation circuit that generates trigger pulses for load-controlled tiered toring, multiple types of dimmers are installed at addresses that can be accessed using each control code to control the sorter conversion circuit. It consists of a dimming sorter storage circuit consisting of a storable FROM and a dimming changeover switch that selects one dimming data from among multiple types of dimming data. A dimmer circuit characterized in that the dimmer data that can be output from a switch circuit can be freely changed for one control code by appropriately switching the output voltage. (!) A receiving section that receives the control code sent out from the transmitter, a sorter conversion circuit that converts the control code output from the receiving section into dimming data, and the t! At the zero/zero synchronization bassis, the commercial power line's wave number #J is also sufficiently high, and the counter circuit output is the dimming data. In one optical path, which consists of a trigger generation circuit that generates a trigger pulse for the lighting load when it matches the lighting load, a dimmer sorter corresponding to the control code that has been received IQ times is set to 6 to generate a low interference wave. In addition to providing a preset uptown counter that counts 0 digits, the uptown counter is controlled so that the outputs of the dimming sorter and uptown counter that correspond to the control code received this time match in the minimum time. - A comparison control circuit is provided, and the trigger generation circuit compares the output of the uptown printer -1 and the output of the Gown 5 circuit, and when both outputs match, the trigger pulse is set to Secondary light Q is characterized by its cicada-like appearance.